[yocto] [PATCH 1/1] Fix AARCH64_TLSDESC relocation conflict

[Vaneet Narang]

On 11/3/15 5:44 AM, Manjeet Pawar wrote:
>> This patch needs to be applied to 'cross_prelink_aarch64' branch.
>> It fixes tls1, tls2, tls4, tls5, tls6 test cases of prelink testsuite.
>> tls3 gets failed but this test case fails without prelink as well on AARCH64
>
>I'm still getting segfaults here.
>
>The way I am testing is building a Yocto Project (jethro) system
>core-image-base, and adding to it:
>"packagegroup-core-buildessential,libelf,elfutils-dev,binutils-staticdev,glibc-staticdev"
>
>The copying a checked out version of the prelink-cross repository with the
>prelink_cross_aarch64 branch checked out.
>
>On the target:
>
>autoreconf -if
>./configure
>make
>make -C testsuite check
>
>Most tests still fail, and all of the TLS tests result in a segfault.
>
>(I do have the 'aarch64/dl-machine.h: Fix load-address for prelink support'
>applied to my glibc.  Are there any other patches that may need to be applied?)
>
>--Mark
Hi Mark,

Apart from fixing load-address changes, I have done one more change in _dl_tlsdesc_undefweak function 
of loader to handle AARCH64_TLSDESC relocation type. Samething I have mentioned in patch description of 
[PATCH 1/1] prelink: AARCH64 support added. This is kind of a quick fix, so I am open to suggestion regarding proper fix.

Change done in _dl_tlsdesc_undefweak
--- a/ports/sysdeps/aarch64/dl-tlsdesc.S
+++ b/ports/sysdeps/aarch64/dl-tlsdesc.S
@@ -98,7 +98,6 @@ _dl_tlsdesc_undefweak:
        cfi_adjust_cfa_offset(16)
        ldr     x0, [x0, #8]
        mrs     x1, tpidr_el0
-       sub     x0, x0, x1
        ldr     x1, [sp], #16
        cfi_adjust_cfa_offset(16)
        RET


Reason for this change: 
To handle AARCH64_TLSDESC, I have referred  below patch which state create a conflict for TLSDESC.
[yocto] [prelink-cross][PATCH] Always create a conflict for R_ARM_TLS_DESC relocs. 
http://git.yoctoproject.org/cgit/cgit.cgi/prelink-cross/commit/?h=cross_prelink_aarch64&id=faa069deec99bf61418d0bab831c83d7c1b797ca

I have done the same implementation for AARCH64.  Loader handles AARCH64_TLSDESC conflict as below.
case R_AARCH64_TLSDESC:
....
            if (! sym)
              {
                td->arg = (void*)reloc->r_addend;
                td->entry = _dl_tlsdesc_undefweak;
              }
 
After this change, all the access to __thread variable will end up calling _dl_tlsdesc_undefweak function. 
_dl_tlsdesc_undefweak returns addend minus  thread pointer but access to __thread expects only addend as per assembly. 
So removed subtraction operation from code.

Example of simple __thread variable getting accessed in shared library.
__thread int i = 10;
dummy() {
    printf("Value of i %d \n",i);
}

Objdump of above code:
000000000000088c <dummy>:
 890:   d53bd041    mrs x1, tpidr_el0   // Read coprocessor register for thread pointer. x1 will contain thread pointer
 894:   90000080    adrp    x0, 10000 <__FRAME_END__+0xf628>
 898:   f9462802    ldr x2, [x0,#3152]  // Read .got.plt section to fetch address of tls handler (_dl_tlsdesc_undefweak)
 89c:   91314000    add x0, x0, #0xc50
 8a0:   d63f0040    blr x2   // Function call to _dl_tlsdesc_undefweak, after fuction call x0 will contain addend - thread pointer
 8a4:   910003fd    mov x29, sp
 8a8:   90000002    adrp    x2, 0 <i>
 8ac:   a8c17bfd    ldp x29, x30, [sp],#16
 8b0:   b8606821    ldr w1, [x1,x0] // Access to x0 (addend - thread pointer) + x1 (thread pointer). Access to addend will result seg fault
 8b4:   91234040    add x0, x2, #0x8d0
 8b8:   17ffffaa    b   760 <printf at plt>

So change done in loader to make _dl_tlsdesc_undefweak return only addend.

Thanks & Regards,
Vaneet Narang