[meta-freescale] iMX6 - CPU frequency lowered during LDO bypass setting

ansaris ansaris at iwavesystems.com
Mon Apr 20 05:53:14 PDT 2015


Dear Lauren Post,

Thank you for your valuable input.

Regards,
Ansari

On Monday 20 April 2015 06:14 PM, Lauren Post wrote:
> I forwarded your question to our engineering team and got this answer
>
> Firstly, we have to decrease VDDARM_IN from 1.375V to 1.175V @792Mhz before LDO bypass mode enabled, otherwise there is window that VDDARM_IN keep 1.375V (violate rule VDDARM_IN <=1.3V in ldo-bypass mode)after LDO bypass mode enabled but before kernel cpufreq change with 1.175V at 792Mhz.
> Secondly, there is also narrow window that VDDARM_IN in 1.175V with ldo-enabled mode after VDDARM_IN decreased from 1.375V to 1.175V but before ldo-bypass mode enabled. VDDARM_IN 1.175V at 792Mhz in ldo-enable mode also violate the rule >= 1.275V. So we have to decrease CPU frequency to 396Mhz to make all voltage setting mach the data sheet.
>
> Lauren Post
>
> -----Original Message-----
> From: meta-freescale-bounces at yoctoproject.org [mailto:meta-freescale-bounces at yoctoproject.org] On Behalf Of Andrea Scian
> Sent: Friday, April 17, 2015 3:14 PM
> To: ansaris at iwavesystems.com
> Cc: meta-freescale at yoctoproject.org
> Subject: Re: [meta-freescale] iMX6 - CPU frequency lowered during LDO bypass setting
>
>
> Il 17/04/2015 15:03, ansaris ha scritto:
>> We would like to know, during the LDO bypass settings why the CPU
>> frequency is lowered in File-1(Linux 3.14.28_1.0.0-GA)?  Is it
>> recommended  to do the same.?
> I think that the answer is here:
>
> http://git.freescale.com/git/cgit.cgi/imx/uboot-imx.git/commit/?id=404fd02e96d33840f58f83f88815e2a259cdc532
>
> During bypass procedure you violate datasheet power constraint if running at 800MHz: in LDO mode VDD_ARM must be 125mV higher that the LDO output voltage, while you need to lower VDD_ARM (on PMIC) before switching to bypass mode.
> To fill the 125mV gap you need to:
> - switch to 400MHz
> - lower PMIC voltages
> - switch to bypass mode (which remove the 125mV gap)
> - switch back to 800MHz
>
> If you skip the first step you may have 1.175-0.125 = 1.050V which is below the required power supply for VDD_ARM
>
> I think this is the meaning of the commit, please correct me if I'm wrong, of course.
>
> Kind Regards,
>



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