[meta-freescale] [PATCH 2/3] cm-fx6:kernel: add cm-fx6 kernel configuration files

[Valentin Raevsky]

Add cm-fx6 kernel configuration files.
This is a fork of the linux-imx 3.10.17.ga with the CompuLab patches
for cm-fx6 boards.

Signed-off-by: Valentin Raevsky <valentin at compulab.co.il>
---
 .../linux/linux-cm-fx6-3.10.17/cm_fx6_defconfig    | 3910 +++++++++++++
 .../linux/linux-cm-fx6-3.10.17/cm_fx6_kernel.patch | 5782 ++++++++++++++++++++
 .../linux/linux-cm-fx6-3.10.17/defconfig           |    1 +
 recipes-kernel/linux/linux-cm-fx6_3.10.17.bb       |   20 +
 4 files changed, 9713 insertions(+)
 create mode 100644 recipes-kernel/linux/linux-cm-fx6-3.10.17/cm_fx6_defconfig
 create mode 100644 recipes-kernel/linux/linux-cm-fx6-3.10.17/cm_fx6_kernel.patch
 create mode 120000 recipes-kernel/linux/linux-cm-fx6-3.10.17/defconfig
 create mode 100644 recipes-kernel/linux/linux-cm-fx6_3.10.17.bb

diff --git a/recipes-kernel/linux/linux-cm-fx6-3.10.17/cm_fx6_defconfig b/recipes-kernel/linux/linux-cm-fx6-3.10.17/cm_fx6_defconfig
new file mode 100644
index 0000000..b387969
--- /dev/null
+++ b/recipes-kernel/linux/linux-cm-fx6-3.10.17/cm_fx6_defconfig
@@ -0,0 +1,3910 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# Linux/arm 3.10.17 Kernel Configuration
+#
+CONFIG_ARM=y
+CONFIG_MIGHT_HAVE_PCI=y
+CONFIG_SYS_SUPPORTS_APM_EMULATION=y
+CONFIG_HAVE_PROC_CPU=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_ARCH_HAS_CPUFREQ=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_ZONE_DMA=y
+CONFIG_NEED_DMA_MAP_STATE=y
+CONFIG_FIQ=y
+CONFIG_VECTORS_BASE=0xffff0000
+CONFIG_ARM_PATCH_PHYS_VIRT=y
+CONFIG_GENERIC_BUG=y
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_IRQ_WORK=y
+CONFIG_BUILDTIME_EXTABLE_SORT=y
+
+#
+# General setup
+#
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_CROSS_COMPILE=""
+CONFIG_LOCALVERSION="-cm-fx6-1-beta4"
+CONFIG_LOCALVERSION_AUTO=y
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_LZMA=y
+CONFIG_HAVE_KERNEL_XZ=y
+CONFIG_HAVE_KERNEL_LZO=y
+# CONFIG_KERNEL_GZIP is not set
+# CONFIG_KERNEL_LZMA is not set
+# CONFIG_KERNEL_XZ is not set
+CONFIG_KERNEL_LZO=y
+CONFIG_DEFAULT_HOSTNAME="(none)"
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+# CONFIG_POSIX_MQUEUE is not set
+# CONFIG_FHANDLE is not set
+# CONFIG_AUDIT is not set
+CONFIG_HAVE_GENERIC_HARDIRQS=y
+
+#
+# IRQ subsystem
+#
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_GENERIC_IRQ_SHOW=y
+CONFIG_HARDIRQS_SW_RESEND=y
+CONFIG_GENERIC_IRQ_CHIP=y
+CONFIG_IRQ_DOMAIN=y
+# CONFIG_IRQ_DOMAIN_DEBUG is not set
+CONFIG_SPARSE_IRQ=y
+CONFIG_KTIME_SCALAR=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+CONFIG_ARCH_HAS_TICK_BROADCAST=y
+CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y
+
+#
+# Timers subsystem
+#
+CONFIG_TICK_ONESHOT=y
+CONFIG_NO_HZ_COMMON=y
+# CONFIG_HZ_PERIODIC is not set
+CONFIG_NO_HZ_IDLE=y
+CONFIG_NO_HZ=y
+CONFIG_HIGH_RES_TIMERS=y
+
+#
+# CPU/Task time and stats accounting
+#
+CONFIG_TICK_CPU_ACCOUNTING=y
+# CONFIG_IRQ_TIME_ACCOUNTING is not set
+# CONFIG_BSD_PROCESS_ACCT is not set
+# CONFIG_TASKSTATS is not set
+
+#
+# RCU Subsystem
+#
+CONFIG_TREE_PREEMPT_RCU=y
+CONFIG_PREEMPT_RCU=y
+CONFIG_RCU_STALL_COMMON=y
+# CONFIG_RCU_USER_QS is not set
+CONFIG_RCU_FANOUT=32
+CONFIG_RCU_FANOUT_LEAF=16
+# CONFIG_RCU_FANOUT_EXACT is not set
+# CONFIG_RCU_FAST_NO_HZ is not set
+# CONFIG_TREE_RCU_TRACE is not set
+# CONFIG_RCU_BOOST is not set
+# CONFIG_RCU_NOCB_CPU is not set
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_LOG_BUF_SHIFT=18
+CONFIG_CGROUPS=y
+# CONFIG_CGROUP_DEBUG is not set
+# CONFIG_CGROUP_FREEZER is not set
+# CONFIG_CGROUP_DEVICE is not set
+# CONFIG_CPUSETS is not set
+# CONFIG_CGROUP_CPUACCT is not set
+# CONFIG_RESOURCE_COUNTERS is not set
+# CONFIG_CGROUP_PERF is not set
+# CONFIG_CGROUP_SCHED is not set
+# CONFIG_BLK_CGROUP is not set
+# CONFIG_CHECKPOINT_RESTORE is not set
+# CONFIG_NAMESPACES is not set
+CONFIG_UIDGID_CONVERTED=y
+# CONFIG_UIDGID_STRICT_TYPE_CHECKS is not set
+# CONFIG_SCHED_AUTOGROUP is not set
+# CONFIG_SYSFS_DEPRECATED is not set
+CONFIG_RELAY=y
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_RD_GZIP=y
+# CONFIG_RD_BZIP2 is not set
+# CONFIG_RD_LZMA is not set
+# CONFIG_RD_XZ is not set
+# CONFIG_RD_LZO is not set
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_SYSCTL=y
+CONFIG_ANON_INODES=y
+CONFIG_HAVE_UID16=y
+CONFIG_HOTPLUG=y
+CONFIG_EXPERT=y
+CONFIG_UID16=y
+# CONFIG_SYSCTL_SYSCALL is not set
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_ALL is not set
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_AIO=y
+CONFIG_PCI_QUIRKS=y
+# CONFIG_EMBEDDED is not set
+CONFIG_HAVE_PERF_EVENTS=y
+CONFIG_PERF_USE_VMALLOC=y
+
+#
+# Kernel Performance Events And Counters
+#
+CONFIG_PERF_EVENTS=y
+# CONFIG_DEBUG_PERF_USE_VMALLOC is not set
+CONFIG_VM_EVENT_COUNTERS=y
+# CONFIG_SLUB_DEBUG is not set
+# CONFIG_COMPAT_BRK is not set
+# CONFIG_SLAB is not set
+CONFIG_SLUB=y
+# CONFIG_SLOB is not set
+# CONFIG_PROFILING is not set
+CONFIG_HAVE_OPROFILE=y
+# CONFIG_KPROBES is not set
+# CONFIG_JUMP_LABEL is not set
+# CONFIG_HAVE_64BIT_ALIGNED_ACCESS is not set
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+CONFIG_HAVE_ARCH_TRACEHOOK=y
+CONFIG_HAVE_DMA_ATTRS=y
+CONFIG_HAVE_DMA_CONTIGUOUS=y
+CONFIG_USE_GENERIC_SMP_HELPERS=y
+CONFIG_GENERIC_SMP_IDLE_THREAD=y
+CONFIG_GENERIC_IDLE_POLL_SETUP=y
+CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y
+CONFIG_HAVE_CLK=y
+CONFIG_HAVE_DMA_API_DEBUG=y
+CONFIG_HAVE_HW_BREAKPOINT=y
+CONFIG_HAVE_ARCH_JUMP_LABEL=y
+CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y
+CONFIG_HAVE_ARCH_SECCOMP_FILTER=y
+CONFIG_HAVE_CONTEXT_TRACKING=y
+CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y
+CONFIG_HAVE_MOD_ARCH_SPECIFIC=y
+CONFIG_MODULES_USE_ELF_REL=y
+CONFIG_CLONE_BACKWARDS=y
+CONFIG_OLD_SIGSUSPEND3=y
+CONFIG_OLD_SIGACTION=y
+
+#
+# GCOV-based kernel profiling
+#
+# CONFIG_GCOV_KERNEL is not set
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_RT_MUTEXES=y
+CONFIG_BASE_SMALL=0
+CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+CONFIG_MODVERSIONS=y
+CONFIG_MODULE_SRCVERSION_ALL=y
+# CONFIG_MODULE_SIG is not set
+CONFIG_STOP_MACHINE=y
+CONFIG_BLOCK=y
+CONFIG_LBDAF=y
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_BLK_DEV_BSGLIB is not set
+# CONFIG_BLK_DEV_INTEGRITY is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+CONFIG_EFI_PARTITION=y
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
+# CONFIG_DEFAULT_DEADLINE is not set
+CONFIG_DEFAULT_CFQ=y
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="cfq"
+CONFIG_UNINLINE_SPIN_UNLOCK=y
+CONFIG_MUTEX_SPIN_ON_OWNER=y
+CONFIG_FREEZER=y
+
+#
+# System Type
+#
+CONFIG_MMU=y
+CONFIG_ARCH_MULTIPLATFORM=y
+# CONFIG_ARCH_INTEGRATOR is not set
+# CONFIG_ARCH_REALVIEW is not set
+# CONFIG_ARCH_VERSATILE is not set
+# CONFIG_ARCH_AT91 is not set
+# CONFIG_ARCH_CLPS711X is not set
+# CONFIG_ARCH_GEMINI is not set
+# CONFIG_ARCH_EBSA110 is not set
+# CONFIG_ARCH_EP93XX is not set
+# CONFIG_ARCH_FOOTBRIDGE is not set
+# CONFIG_ARCH_NETX is not set
+# CONFIG_ARCH_IOP13XX is not set
+# CONFIG_ARCH_IOP32X is not set
+# CONFIG_ARCH_IOP33X is not set
+# CONFIG_ARCH_IXP4XX is not set
+# CONFIG_ARCH_DOVE is not set
+# CONFIG_ARCH_KIRKWOOD is not set
+# CONFIG_ARCH_MV78XX0 is not set
+# CONFIG_ARCH_ORION5X is not set
+# CONFIG_ARCH_MMP is not set
+# CONFIG_ARCH_KS8695 is not set
+# CONFIG_ARCH_W90X900 is not set
+# CONFIG_ARCH_LPC32XX is not set
+# CONFIG_ARCH_PXA is not set
+# CONFIG_ARCH_MSM is not set
+# CONFIG_ARCH_SHMOBILE is not set
+# CONFIG_ARCH_RPC is not set
+# CONFIG_ARCH_SA1100 is not set
+# CONFIG_ARCH_S3C24XX is not set
+# CONFIG_ARCH_S3C64XX is not set
+# CONFIG_ARCH_S5P64X0 is not set
+# CONFIG_ARCH_S5PC100 is not set
+# CONFIG_ARCH_S5PV210 is not set
+# CONFIG_ARCH_EXYNOS is not set
+# CONFIG_ARCH_SHARK is not set
+# CONFIG_ARCH_U300 is not set
+# CONFIG_ARCH_DAVINCI is not set
+# CONFIG_ARCH_OMAP1 is not set
+
+#
+# Multiple platform selection
+#
+
+#
+# CPU Core family selection
+#
+# CONFIG_ARCH_MULTI_V6 is not set
+CONFIG_ARCH_MULTI_V7=y
+CONFIG_ARCH_MULTI_V6_V7=y
+# CONFIG_ARCH_MULTI_CPU_AUTO is not set
+# CONFIG_ARCH_MVEBU is not set
+# CONFIG_ARCH_BCM is not set
+CONFIG_GPIO_PCA953X=y
+# CONFIG_KEYBOARD_GPIO_POLLED is not set
+# CONFIG_ARCH_HIGHBANK is not set
+CONFIG_ARCH_MXC=y
+
+#
+# Freescale i.MX support
+#
+# CONFIG_MXC_IRQ_PRIOR is not set
+CONFIG_MXC_TZIC=y
+CONFIG_MXC_DEBUG_BOARD=y
+CONFIG_HAVE_IMX_RNG=y
+CONFIG_HAVE_IMX_ANATOP=y
+CONFIG_HAVE_IMX_GPC=y
+CONFIG_HAVE_IMX_MMDC=y
+CONFIG_HAVE_IMX_SRC=y
+CONFIG_ARCH_MXC_IOMUX_V3=y
+CONFIG_SOC_IMX5=y
+CONFIG_SOC_IMX51=y
+
+#
+# i.MX51 machines:
+#
+CONFIG_MACH_IMX51_DT=y
+# CONFIG_MACH_MX51_BABBAGE is not set
+CONFIG_MACH_EUKREA_CPUIMX51SD=y
+CONFIG_MACH_EUKREA_MBIMXSD51_BASEBOARD=y
+
+#
+# Device tree only
+#
+CONFIG_SOC_IMX53=y
+CONFIG_SOC_IMX6Q=y
+CONFIG_SOC_IMX6SL=y
+CONFIG_SOC_VF610=y
+CONFIG_MACH_CM_FX6=y
+CONFIG_IMX_HAVE_PLATFORM_FEC=y
+CONFIG_IMX_HAVE_PLATFORM_FSL_USB2_UDC=y
+CONFIG_IMX_HAVE_PLATFORM_GPIO_KEYS=y
+CONFIG_IMX_HAVE_PLATFORM_IMX2_WDT=y
+CONFIG_IMX_HAVE_PLATFORM_IMX_I2C=y
+CONFIG_IMX_HAVE_PLATFORM_IMX_SSI=y
+CONFIG_IMX_HAVE_PLATFORM_IMX_UART=y
+CONFIG_IMX_HAVE_PLATFORM_MXC_EHCI=y
+CONFIG_IMX_HAVE_PLATFORM_MXC_NAND=y
+CONFIG_IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX=y
+CONFIG_IMX_HAVE_PLATFORM_SPI_IMX=y
+# CONFIG_ARCH_OMAP2PLUS is not set
+# CONFIG_ARCH_SOCFPGA is not set
+# CONFIG_PLAT_SPEAR is not set
+# CONFIG_ARCH_SUNXI is not set
+# CONFIG_ARCH_SIRF is not set
+# CONFIG_ARCH_TEGRA is not set
+# CONFIG_ARCH_U8500 is not set
+# CONFIG_ARCH_VEXPRESS is not set
+# CONFIG_ARCH_VIRT is not set
+# CONFIG_ARCH_WM8850 is not set
+# CONFIG_ARCH_ZYNQ is not set
+
+#
+# Processor Type
+#
+CONFIG_CPU_V7=y
+CONFIG_CPU_32v6K=y
+CONFIG_CPU_32v7=y
+CONFIG_CPU_ABRT_EV7=y
+CONFIG_CPU_PABRT_V7=y
+CONFIG_CPU_CACHE_V7=y
+CONFIG_CPU_CACHE_VIPT=y
+CONFIG_CPU_COPY_V6=y
+CONFIG_CPU_TLB_V7=y
+CONFIG_CPU_HAS_ASID=y
+CONFIG_CPU_CP15=y
+CONFIG_CPU_CP15_MMU=y
+
+#
+# Processor Features
+#
+# CONFIG_ARM_LPAE is not set
+# CONFIG_ARCH_PHYS_ADDR_T_64BIT is not set
+CONFIG_ARM_THUMB=y
+# CONFIG_ARM_THUMBEE is not set
+CONFIG_ARM_VIRT_EXT=y
+# CONFIG_SWP_EMULATE is not set
+# CONFIG_CPU_ICACHE_DISABLE is not set
+# CONFIG_CPU_DCACHE_DISABLE is not set
+# CONFIG_CPU_BPREDICT_DISABLE is not set
+CONFIG_KUSER_HELPERS=y
+CONFIG_OUTER_CACHE=y
+CONFIG_OUTER_CACHE_SYNC=y
+CONFIG_MIGHT_HAVE_CACHE_L2X0=y
+CONFIG_CACHE_L2X0=y
+CONFIG_CACHE_PL310=y
+CONFIG_ARM_L1_CACHE_SHIFT_6=y
+CONFIG_ARM_L1_CACHE_SHIFT=6
+CONFIG_ARM_DMA_MEM_BUFFERABLE=y
+CONFIG_ARM_NR_BANKS=8
+CONFIG_MULTI_IRQ_HANDLER=y
+# CONFIG_ARM_ERRATA_430973 is not set
+# CONFIG_PL310_ERRATA_588369 is not set
+# CONFIG_ARM_ERRATA_643719 is not set
+# CONFIG_ARM_ERRATA_720789 is not set
+# CONFIG_PL310_ERRATA_727915 is not set
+CONFIG_ARM_ERRATA_794072=y
+CONFIG_ARM_ERRATA_761320=y
+# CONFIG_PL310_ERRATA_753970 is not set
+CONFIG_ARM_ERRATA_754322=y
+# CONFIG_ARM_ERRATA_754327 is not set
+CONFIG_ARM_ERRATA_764369=y
+CONFIG_PL310_ERRATA_769419=y
+CONFIG_ARM_ERRATA_775420=y
+# CONFIG_ARM_ERRATA_798181 is not set
+
+#
+# Bus support
+#
+CONFIG_PCI=y
+CONFIG_PCI_DOMAINS=y
+CONFIG_PCI_SYSCALL=y
+CONFIG_ARCH_SUPPORTS_MSI=y
+# CONFIG_PCI_MSI is not set
+# CONFIG_PCI_DEBUG is not set
+# CONFIG_PCI_REALLOC_ENABLE_AUTO is not set
+# CONFIG_PCI_STUB is not set
+# CONFIG_PCI_IOV is not set
+# CONFIG_PCI_PRI is not set
+# CONFIG_PCI_PASID is not set
+
+#
+# PCI host controller drivers
+#
+CONFIG_PCIE_DW=y
+CONFIG_PCI_IMX6=y
+# CONFIG_EP_MODE_IN_EP_RC_SYS is not set
+# CONFIG_RC_MODE_IN_EP_RC_SYS is not set
+# CONFIG_PCCARD is not set
+
+#
+# Kernel Features
+#
+CONFIG_HAVE_SMP=y
+CONFIG_SMP=y
+CONFIG_SMP_ON_UP=y
+CONFIG_ARM_CPU_TOPOLOGY=y
+# CONFIG_SCHED_MC is not set
+# CONFIG_SCHED_SMT is not set
+CONFIG_HAVE_ARM_SCU=y
+# CONFIG_HAVE_ARM_ARCH_TIMER is not set
+CONFIG_HAVE_ARM_TWD=y
+# CONFIG_MCPM is not set
+# CONFIG_VMSPLIT_3G is not set
+CONFIG_VMSPLIT_2G=y
+# CONFIG_VMSPLIT_1G is not set
+CONFIG_PAGE_OFFSET=0x80000000
+CONFIG_NR_CPUS=4
+CONFIG_HOTPLUG_CPU=y
+# CONFIG_ARM_PSCI is not set
+CONFIG_LOCAL_TIMERS=y
+CONFIG_ARCH_NR_GPIO=0
+# CONFIG_PREEMPT_NONE is not set
+# CONFIG_PREEMPT_VOLUNTARY is not set
+CONFIG_PREEMPT=y
+CONFIG_PREEMPT_COUNT=y
+CONFIG_HZ=100
+CONFIG_SCHED_HRTICK=y
+# CONFIG_THUMB2_KERNEL is not set
+CONFIG_AEABI=y
+# CONFIG_OABI_COMPAT is not set
+# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
+# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
+CONFIG_HAVE_ARCH_PFN_VALID=y
+CONFIG_HIGHMEM=y
+# CONFIG_HIGHPTE is not set
+CONFIG_HW_PERF_EVENTS=y
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+CONFIG_HAVE_MEMBLOCK=y
+CONFIG_MEMORY_ISOLATION=y
+# CONFIG_HAVE_BOOTMEM_INFO_NODE is not set
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=4
+CONFIG_COMPACTION=y
+CONFIG_MIGRATION=y
+# CONFIG_PHYS_ADDR_T_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=1
+CONFIG_BOUNCE=y
+# CONFIG_KSM is not set
+CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
+CONFIG_CROSS_MEMORY_ATTACH=y
+# CONFIG_CLEANCACHE is not set
+# CONFIG_FRONTSWAP is not set
+CONFIG_FORCE_MAX_ZONEORDER=14
+CONFIG_ALIGNMENT_TRAP=y
+# CONFIG_UACCESS_WITH_MEMCPY is not set
+# CONFIG_SECCOMP is not set
+# CONFIG_CC_STACKPROTECTOR is not set
+# CONFIG_XEN is not set
+
+#
+# Boot options
+#
+CONFIG_USE_OF=y
+CONFIG_ATAGS=y
+# CONFIG_DEPRECATED_PARAM_STRUCT is not set
+CONFIG_ZBOOT_ROM_TEXT=0
+CONFIG_ZBOOT_ROM_BSS=0
+# CONFIG_ARM_APPENDED_DTB is not set
+CONFIG_CMDLINE="console=ttymxc3,115200 root=/dev/mmcblk0p1 rootwait"
+CONFIG_CMDLINE_FROM_BOOTLOADER=y
+# CONFIG_CMDLINE_EXTEND is not set
+# CONFIG_CMDLINE_FORCE is not set
+# CONFIG_KEXEC is not set
+# CONFIG_CRASH_DUMP is not set
+CONFIG_AUTO_ZRELADDR=y
+
+#
+# CPU Power Management
+#
+
+#
+# CPU Frequency scaling
+#
+CONFIG_CPU_FREQ=y
+CONFIG_CPU_FREQ_TABLE=y
+CONFIG_CPU_FREQ_GOV_COMMON=y
+CONFIG_CPU_FREQ_STAT=y
+# CONFIG_CPU_FREQ_STAT_DETAILS is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
+CONFIG_CPU_FREQ_DEFAULT_GOV_INTERACTIVE=y
+CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
+CONFIG_CPU_FREQ_GOV_POWERSAVE=y
+CONFIG_CPU_FREQ_GOV_USERSPACE=y
+CONFIG_CPU_FREQ_GOV_ONDEMAND=y
+CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
+CONFIG_CPU_FREQ_GOV_INTERACTIVE=y
+# CONFIG_GENERIC_CPUFREQ_CPU0 is not set
+
+#
+# ARM CPU frequency scaling drivers
+#
+# CONFIG_ARM_BIG_LITTLE_CPUFREQ is not set
+# CONFIG_ARM_EXYNOS4210_CPUFREQ is not set
+# CONFIG_ARM_EXYNOS4X12_CPUFREQ is not set
+# CONFIG_ARM_EXYNOS5250_CPUFREQ is not set
+# CONFIG_ARM_EXYNOS5440_CPUFREQ is not set
+CONFIG_ARM_IMX6_CPUFREQ=y
+# CONFIG_ARM_KIRKWOOD_CPUFREQ is not set
+CONFIG_CPU_IDLE=y
+# CONFIG_CPU_IDLE_MULTIPLE_DRIVERS is not set
+CONFIG_CPU_IDLE_GOV_LADDER=y
+CONFIG_CPU_IDLE_GOV_MENU=y
+# CONFIG_ARCH_NEEDS_CPU_IDLE_COUPLED is not set
+
+#
+# Floating point emulation
+#
+
+#
+# At least one emulation must be selected
+#
+CONFIG_VFP=y
+CONFIG_VFPv3=y
+CONFIG_NEON=y
+
+#
+# Userspace binary formats
+#
+CONFIG_BINFMT_ELF=y
+CONFIG_ARCH_BINFMT_ELF_RANDOMIZE_PIE=y
+CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS=y
+CONFIG_BINFMT_SCRIPT=y
+# CONFIG_HAVE_AOUT is not set
+CONFIG_BINFMT_MISC=m
+CONFIG_COREDUMP=y
+
+#
+# Power management options
+#
+CONFIG_SUSPEND=y
+CONFIG_SUSPEND_FREEZER=y
+CONFIG_PM_SLEEP=y
+CONFIG_PM_SLEEP_SMP=y
+# CONFIG_PM_AUTOSLEEP is not set
+# CONFIG_PM_WAKELOCKS is not set
+CONFIG_PM_RUNTIME=y
+CONFIG_PM=y
+CONFIG_PM_DEBUG=y
+# CONFIG_PM_ADVANCED_DEBUG is not set
+CONFIG_PM_TEST_SUSPEND=y
+CONFIG_PM_SLEEP_DEBUG=y
+# CONFIG_APM_EMULATION is not set
+CONFIG_ARCH_HAS_OPP=y
+CONFIG_PM_OPP=y
+CONFIG_PM_CLK=y
+CONFIG_CPU_PM=y
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+CONFIG_ARM_CPU_SUSPEND=y
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+# CONFIG_PACKET_DIAG is not set
+CONFIG_UNIX=y
+# CONFIG_UNIX_DIAG is not set
+CONFIG_XFRM=y
+# CONFIG_XFRM_USER is not set
+# CONFIG_XFRM_SUB_POLICY is not set
+# CONFIG_XFRM_MIGRATE is not set
+# CONFIG_XFRM_STATISTICS is not set
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_ROUTE_CLASSID=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+# CONFIG_IP_PNP_BOOTP is not set
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE_DEMUX is not set
+CONFIG_NET_IP_TUNNEL=y
+# CONFIG_ARPD is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+CONFIG_INET_TUNNEL=y
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_BEET is not set
+# CONFIG_INET_LRO is not set
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+# CONFIG_INET_UDP_DIAG is not set
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
+CONFIG_IPV6=y
+# CONFIG_IPV6_PRIVACY is not set
+# CONFIG_IPV6_ROUTER_PREF is not set
+# CONFIG_IPV6_OPTIMISTIC_DAD is not set
+# CONFIG_INET6_AH is not set
+# CONFIG_INET6_ESP is not set
+# CONFIG_INET6_IPCOMP is not set
+# CONFIG_IPV6_MIP6 is not set
+# CONFIG_INET6_XFRM_TUNNEL is not set
+# CONFIG_INET6_TUNNEL is not set
+CONFIG_INET6_XFRM_MODE_TRANSPORT=y
+CONFIG_INET6_XFRM_MODE_TUNNEL=y
+CONFIG_INET6_XFRM_MODE_BEET=y
+# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
+CONFIG_IPV6_SIT=y
+# CONFIG_IPV6_SIT_6RD is not set
+CONFIG_IPV6_NDISC_NODETYPE=y
+# CONFIG_IPV6_TUNNEL is not set
+# CONFIG_IPV6_GRE is not set
+# CONFIG_IPV6_MULTIPLE_TABLES is not set
+# CONFIG_IPV6_MROUTE is not set
+# CONFIG_NETWORK_SECMARK is not set
+# CONFIG_NETWORK_PHY_TIMESTAMPING is not set
+CONFIG_NETFILTER=y
+CONFIG_NETFILTER_DEBUG=y
+CONFIG_NETFILTER_ADVANCED=y
+
+#
+# Core Netfilter Configuration
+#
+CONFIG_NETFILTER_NETLINK=m
+# CONFIG_NETFILTER_NETLINK_ACCT is not set
+CONFIG_NETFILTER_NETLINK_QUEUE=m
+CONFIG_NETFILTER_NETLINK_LOG=m
+CONFIG_NF_CONNTRACK=m
+CONFIG_NF_CONNTRACK_MARK=y
+# CONFIG_NF_CONNTRACK_ZONES is not set
+CONFIG_NF_CONNTRACK_PROCFS=y
+# CONFIG_NF_CONNTRACK_EVENTS is not set
+# CONFIG_NF_CONNTRACK_TIMEOUT is not set
+# CONFIG_NF_CONNTRACK_TIMESTAMP is not set
+# CONFIG_NF_CT_PROTO_DCCP is not set
+# CONFIG_NF_CT_PROTO_SCTP is not set
+# CONFIG_NF_CT_PROTO_UDPLITE is not set
+# CONFIG_NF_CONNTRACK_AMANDA is not set
+CONFIG_NF_CONNTRACK_FTP=m
+# CONFIG_NF_CONNTRACK_H323 is not set
+# CONFIG_NF_CONNTRACK_IRC is not set
+# CONFIG_NF_CONNTRACK_NETBIOS_NS is not set
+# CONFIG_NF_CONNTRACK_SNMP is not set
+# CONFIG_NF_CONNTRACK_PPTP is not set
+# CONFIG_NF_CONNTRACK_SANE is not set
+# CONFIG_NF_CONNTRACK_SIP is not set
+CONFIG_NF_CONNTRACK_TFTP=m
+# CONFIG_NF_CT_NETLINK is not set
+# CONFIG_NF_CT_NETLINK_TIMEOUT is not set
+# CONFIG_NETFILTER_NETLINK_QUEUE_CT is not set
+CONFIG_NF_NAT=m
+CONFIG_NF_NAT_NEEDED=y
+# CONFIG_NF_NAT_AMANDA is not set
+CONFIG_NF_NAT_FTP=m
+# CONFIG_NF_NAT_IRC is not set
+# CONFIG_NF_NAT_SIP is not set
+CONFIG_NF_NAT_TFTP=m
+# CONFIG_NETFILTER_TPROXY is not set
+CONFIG_NETFILTER_XTABLES=y
+
+#
+# Xtables combined modules
+#
+CONFIG_NETFILTER_XT_MARK=m
+CONFIG_NETFILTER_XT_CONNMARK=m
+
+#
+# Xtables targets
+#
+CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m
+CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m
+CONFIG_NETFILTER_XT_TARGET_CONNMARK=m
+CONFIG_NETFILTER_XT_TARGET_CT=m
+CONFIG_NETFILTER_XT_TARGET_DSCP=m
+CONFIG_NETFILTER_XT_TARGET_HL=m
+# CONFIG_NETFILTER_XT_TARGET_HMARK is not set
+CONFIG_NETFILTER_XT_TARGET_IDLETIMER=m
+CONFIG_NETFILTER_XT_TARGET_LED=m
+# CONFIG_NETFILTER_XT_TARGET_LOG is not set
+CONFIG_NETFILTER_XT_TARGET_MARK=m
+CONFIG_NETFILTER_XT_TARGET_NETMAP=m
+CONFIG_NETFILTER_XT_TARGET_NFLOG=m
+CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m
+CONFIG_NETFILTER_XT_TARGET_NOTRACK=m
+CONFIG_NETFILTER_XT_TARGET_RATEEST=m
+CONFIG_NETFILTER_XT_TARGET_REDIRECT=m
+CONFIG_NETFILTER_XT_TARGET_TEE=m
+CONFIG_NETFILTER_XT_TARGET_TRACE=m
+CONFIG_NETFILTER_XT_TARGET_TCPMSS=m
+CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP=m
+
+#
+# Xtables matches
+#
+CONFIG_NETFILTER_XT_MATCH_ADDRTYPE=m
+# CONFIG_NETFILTER_XT_MATCH_BPF is not set
+CONFIG_NETFILTER_XT_MATCH_CLUSTER=m
+CONFIG_NETFILTER_XT_MATCH_COMMENT=m
+CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m
+# CONFIG_NETFILTER_XT_MATCH_CONNLABEL is not set
+CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m
+CONFIG_NETFILTER_XT_MATCH_CONNMARK=m
+CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m
+CONFIG_NETFILTER_XT_MATCH_CPU=m
+# CONFIG_NETFILTER_XT_MATCH_DCCP is not set
+CONFIG_NETFILTER_XT_MATCH_DEVGROUP=m
+CONFIG_NETFILTER_XT_MATCH_DSCP=m
+CONFIG_NETFILTER_XT_MATCH_ECN=m
+CONFIG_NETFILTER_XT_MATCH_ESP=m
+CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m
+CONFIG_NETFILTER_XT_MATCH_HELPER=m
+CONFIG_NETFILTER_XT_MATCH_HL=m
+CONFIG_NETFILTER_XT_MATCH_IPRANGE=m
+CONFIG_NETFILTER_XT_MATCH_LENGTH=m
+CONFIG_NETFILTER_XT_MATCH_LIMIT=m
+CONFIG_NETFILTER_XT_MATCH_MAC=m
+CONFIG_NETFILTER_XT_MATCH_MARK=m
+CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m
+# CONFIG_NETFILTER_XT_MATCH_NFACCT is not set
+CONFIG_NETFILTER_XT_MATCH_OSF=m
+CONFIG_NETFILTER_XT_MATCH_OWNER=m
+CONFIG_NETFILTER_XT_MATCH_POLICY=m
+CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m
+CONFIG_NETFILTER_XT_MATCH_QUOTA=m
+CONFIG_NETFILTER_XT_MATCH_RATEEST=m
+CONFIG_NETFILTER_XT_MATCH_REALM=m
+CONFIG_NETFILTER_XT_MATCH_RECENT=m
+# CONFIG_NETFILTER_XT_MATCH_SCTP is not set
+CONFIG_NETFILTER_XT_MATCH_STATE=m
+CONFIG_NETFILTER_XT_MATCH_STATISTIC=m
+CONFIG_NETFILTER_XT_MATCH_STRING=m
+CONFIG_NETFILTER_XT_MATCH_TCPMSS=m
+CONFIG_NETFILTER_XT_MATCH_TIME=m
+CONFIG_NETFILTER_XT_MATCH_U32=m
+# CONFIG_IP_SET is not set
+# CONFIG_IP_VS is not set
+
+#
+# IP: Netfilter Configuration
+#
+CONFIG_NF_DEFRAG_IPV4=m
+CONFIG_NF_CONNTRACK_IPV4=m
+CONFIG_NF_CONNTRACK_PROC_COMPAT=y
+CONFIG_IP_NF_IPTABLES=y
+CONFIG_IP_NF_MATCH_AH=m
+CONFIG_IP_NF_MATCH_ECN=m
+CONFIG_IP_NF_MATCH_RPFILTER=m
+CONFIG_IP_NF_MATCH_TTL=m
+CONFIG_IP_NF_FILTER=y
+CONFIG_IP_NF_TARGET_REJECT=y
+CONFIG_IP_NF_TARGET_ULOG=m
+CONFIG_NF_NAT_IPV4=m
+CONFIG_IP_NF_TARGET_MASQUERADE=m
+CONFIG_IP_NF_TARGET_NETMAP=m
+CONFIG_IP_NF_TARGET_REDIRECT=m
+# CONFIG_NF_NAT_PPTP is not set
+# CONFIG_NF_NAT_H323 is not set
+CONFIG_IP_NF_MANGLE=m
+# CONFIG_IP_NF_TARGET_CLUSTERIP is not set
+CONFIG_IP_NF_TARGET_ECN=m
+CONFIG_IP_NF_TARGET_TTL=m
+CONFIG_IP_NF_RAW=m
+CONFIG_IP_NF_ARPTABLES=m
+CONFIG_IP_NF_ARPFILTER=m
+CONFIG_IP_NF_ARP_MANGLE=m
+
+#
+# IPv6: Netfilter Configuration
+#
+# CONFIG_NF_DEFRAG_IPV6 is not set
+# CONFIG_NF_CONNTRACK_IPV6 is not set
+# CONFIG_IP6_NF_IPTABLES is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_RDS is not set
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_L2TP is not set
+CONFIG_STP=m
+CONFIG_GARP=m
+# CONFIG_BRIDGE is not set
+CONFIG_HAVE_NET_DSA=y
+CONFIG_VLAN_8021Q=m
+CONFIG_VLAN_8021Q_GVRP=y
+# CONFIG_VLAN_8021Q_MVRP is not set
+# CONFIG_DECNET is not set
+CONFIG_LLC=m
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_PHONET is not set
+# CONFIG_IEEE802154 is not set
+# CONFIG_NET_SCHED is not set
+# CONFIG_DCB is not set
+CONFIG_DNS_RESOLVER=y
+# CONFIG_BATMAN_ADV is not set
+# CONFIG_OPENVSWITCH is not set
+# CONFIG_VSOCKETS is not set
+# CONFIG_NETLINK_MMAP is not set
+# CONFIG_NETLINK_DIAG is not set
+CONFIG_RPS=y
+CONFIG_RFS_ACCEL=y
+CONFIG_XPS=y
+# CONFIG_NETPRIO_CGROUP is not set
+CONFIG_BQL=y
+# CONFIG_BPF_JIT is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+CONFIG_CAN=y
+CONFIG_CAN_RAW=y
+CONFIG_CAN_BCM=y
+CONFIG_CAN_GW=y
+
+#
+# CAN Device Drivers
+#
+# CONFIG_CAN_VCAN is not set
+# CONFIG_CAN_SLCAN is not set
+CONFIG_CAN_DEV=y
+CONFIG_CAN_CALC_BITTIMING=y
+# CONFIG_CAN_LEDS is not set
+# CONFIG_CAN_AT91 is not set
+# CONFIG_CAN_MCP251X is not set
+CONFIG_HAVE_CAN_FLEXCAN=y
+CONFIG_CAN_FLEXCAN=y
+# CONFIG_PCH_CAN is not set
+# CONFIG_CAN_GRCAN is not set
+# CONFIG_CAN_SJA1000 is not set
+# CONFIG_CAN_C_CAN is not set
+# CONFIG_CAN_CC770 is not set
+
+#
+# CAN USB interfaces
+#
+# CONFIG_CAN_EMS_USB is not set
+# CONFIG_CAN_ESD_USB2 is not set
+# CONFIG_CAN_KVASER_USB is not set
+# CONFIG_CAN_PEAK_USB is not set
+# CONFIG_CAN_8DEV_USB is not set
+# CONFIG_CAN_SOFTING is not set
+# CONFIG_CAN_DEBUG_DEVICES is not set
+# CONFIG_IRDA is not set
+CONFIG_BT=m
+# CONFIG_BT_RFCOMM is not set
+# CONFIG_BT_BNEP is not set
+# CONFIG_BT_HIDP is not set
+
+#
+# Bluetooth device drivers
+#
+# CONFIG_BT_HCIBTUSB is not set
+# CONFIG_BT_HCIBTSDIO is not set
+# CONFIG_BT_HCIUART is not set
+# CONFIG_BT_HCIBCM203X is not set
+# CONFIG_BT_HCIBPA10X is not set
+# CONFIG_BT_HCIBFUSB is not set
+# CONFIG_BT_HCIVHCI is not set
+CONFIG_BT_MRVL=m
+CONFIG_BT_MRVL_SDIO=m
+# CONFIG_AF_RXRPC is not set
+CONFIG_WIRELESS=y
+CONFIG_WEXT_CORE=y
+CONFIG_WEXT_PROC=y
+CONFIG_CFG80211=y
+# CONFIG_NL80211_TESTMODE is not set
+# CONFIG_CFG80211_DEVELOPER_WARNINGS is not set
+# CONFIG_CFG80211_REG_DEBUG is not set
+# CONFIG_CFG80211_CERTIFICATION_ONUS is not set
+CONFIG_CFG80211_DEFAULT_PS=y
+# CONFIG_CFG80211_DEBUGFS is not set
+# CONFIG_CFG80211_INTERNAL_REGDB is not set
+CONFIG_CFG80211_WEXT=y
+# CONFIG_LIB80211 is not set
+CONFIG_MAC80211=y
+CONFIG_MAC80211_HAS_RC=y
+# CONFIG_MAC80211_RC_PID is not set
+CONFIG_MAC80211_RC_MINSTREL=y
+CONFIG_MAC80211_RC_MINSTREL_HT=y
+CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y
+CONFIG_MAC80211_RC_DEFAULT="minstrel_ht"
+# CONFIG_MAC80211_MESH is not set
+# CONFIG_MAC80211_LEDS is not set
+# CONFIG_MAC80211_DEBUGFS is not set
+# CONFIG_MAC80211_MESSAGE_TRACING is not set
+# CONFIG_MAC80211_DEBUG_MENU is not set
+# CONFIG_WIMAX is not set
+# CONFIG_RFKILL is not set
+# CONFIG_RFKILL_REGULATOR is not set
+# CONFIG_NET_9P is not set
+# CONFIG_CAIF is not set
+# CONFIG_CEPH_LIB is not set
+# CONFIG_NFC is not set
+CONFIG_HAVE_BPF_JIT=y
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH=""
+CONFIG_DEVTMPFS=y
+CONFIG_DEVTMPFS_MOUNT=y
+# CONFIG_STANDALONE is not set
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+CONFIG_FW_LOADER=y
+CONFIG_FIRMWARE_IN_KERNEL=y
+CONFIG_EXTRA_FIRMWARE=""
+CONFIG_FW_LOADER_USER_HELPER=y
+# CONFIG_DEBUG_DRIVER is not set
+# CONFIG_DEBUG_DEVRES is not set
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_GENERIC_CPU_DEVICES is not set
+CONFIG_SOC_BUS=y
+CONFIG_REGMAP=y
+CONFIG_REGMAP_I2C=y
+CONFIG_REGMAP_SPI=y
+CONFIG_REGMAP_MMIO=y
+CONFIG_REGMAP_IRQ=y
+CONFIG_DMA_SHARED_BUFFER=y
+CONFIG_CMA=y
+# CONFIG_CMA_DEBUG is not set
+
+#
+# Default contiguous memory area size:
+#
+CONFIG_CMA_SIZE_MBYTES=320
+CONFIG_CMA_SIZE_SEL_MBYTES=y
+# CONFIG_CMA_SIZE_SEL_PERCENTAGE is not set
+# CONFIG_CMA_SIZE_SEL_MIN is not set
+# CONFIG_CMA_SIZE_SEL_MAX is not set
+CONFIG_CMA_ALIGNMENT=8
+CONFIG_CMA_AREAS=7
+
+#
+# Bus devices
+#
+CONFIG_IMX_WEIM=y
+CONFIG_CONNECTOR=y
+CONFIG_PROC_EVENTS=y
+CONFIG_MTD=y
+# CONFIG_MTD_TESTS is not set
+# CONFIG_MTD_REDBOOT_PARTS is not set
+CONFIG_MTD_CMDLINE_PARTS=y
+# CONFIG_MTD_AFS_PARTS is not set
+CONFIG_MTD_OF_PARTS=y
+# CONFIG_MTD_AR7_PARTS is not set
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_BLKDEVS=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+# CONFIG_SM_FTL is not set
+# CONFIG_MTD_OOPS is not set
+# CONFIG_MTD_SWAP is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+CONFIG_MTD_CFI=y
+CONFIG_MTD_JEDECPROBE=y
+CONFIG_MTD_GEN_PROBE=y
+# CONFIG_MTD_CFI_ADV_OPTIONS is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+CONFIG_MTD_CFI_INTELEXT=y
+CONFIG_MTD_CFI_AMDSTD=y
+CONFIG_MTD_CFI_STAA=y
+CONFIG_MTD_CFI_UTIL=y
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+# CONFIG_MTD_PHYSMAP is not set
+CONFIG_MTD_PHYSMAP_OF=y
+# CONFIG_MTD_IMPA7 is not set
+# CONFIG_MTD_INTEL_VR_NOR is not set
+# CONFIG_MTD_PLATRAM is not set
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_PMC551 is not set
+CONFIG_MTD_DATAFLASH=y
+# CONFIG_MTD_DATAFLASH_WRITE_VERIFY is not set
+# CONFIG_MTD_DATAFLASH_OTP is not set
+CONFIG_MTD_M25P80=y
+CONFIG_M25PXX_USE_FAST_READ=y
+CONFIG_MTD_SST25L=y
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOCG3 is not set
+CONFIG_MTD_NAND_ECC=y
+# CONFIG_MTD_NAND_ECC_SMC is not set
+CONFIG_MTD_NAND=y
+# CONFIG_MTD_NAND_ECC_BCH is not set
+# CONFIG_MTD_SM_COMMON is not set
+# CONFIG_MTD_NAND_DENALI is not set
+# CONFIG_MTD_NAND_GPIO is not set
+CONFIG_MTD_NAND_IDS=y
+# CONFIG_MTD_NAND_RICOH is not set
+# CONFIG_MTD_NAND_DISKONCHIP is not set
+# CONFIG_MTD_NAND_DOCG4 is not set
+# CONFIG_MTD_NAND_CAFE is not set
+# CONFIG_MTD_NAND_NANDSIM is not set
+CONFIG_MTD_NAND_GPMI_NAND=y
+# CONFIG_MTD_NAND_PLATFORM is not set
+# CONFIG_MTD_ALAUDA is not set
+CONFIG_MTD_NAND_MXC=y
+# CONFIG_MTD_ONENAND is not set
+
+#
+# LPDDR flash memory drivers
+#
+# CONFIG_MTD_LPDDR is not set
+CONFIG_MTD_UBI=y
+CONFIG_MTD_UBI_WL_THRESHOLD=4096
+CONFIG_MTD_UBI_BEB_LIMIT=20
+# CONFIG_MTD_UBI_FASTMAP is not set
+# CONFIG_MTD_UBI_GLUEBI is not set
+CONFIG_DTC=y
+CONFIG_OF=y
+
+#
+# Device Tree and Open Firmware support
+#
+# CONFIG_PROC_DEVICETREE is not set
+# CONFIG_OF_SELFTEST is not set
+CONFIG_OF_FLATTREE=y
+CONFIG_OF_EARLY_FLATTREE=y
+CONFIG_OF_ADDRESS=y
+CONFIG_OF_IRQ=y
+CONFIG_OF_DEVICE=y
+CONFIG_OF_I2C=y
+CONFIG_OF_NET=y
+CONFIG_OF_MDIO=y
+CONFIG_OF_PCI=y
+CONFIG_OF_PCI_IRQ=y
+CONFIG_OF_MTD=y
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_PCIESSD_MTIP32XX is not set
+# CONFIG_BLK_CPQ_CISS_DA is not set
+# CONFIG_BLK_DEV_DAC960 is not set
+# CONFIG_BLK_DEV_UMEM is not set
+# CONFIG_BLK_DEV_COW_COMMON is not set
+CONFIG_BLK_DEV_LOOP=y
+CONFIG_BLK_DEV_LOOP_MIN_COUNT=8
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
+# CONFIG_BLK_DEV_DRBD is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_NVME is not set
+# CONFIG_BLK_DEV_SX8 is not set
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=16
+CONFIG_BLK_DEV_RAM_SIZE=65536
+# CONFIG_BLK_DEV_XIP is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+# CONFIG_MG_DISK is not set
+# CONFIG_BLK_DEV_RBD is not set
+# CONFIG_BLK_DEV_RSXX is not set
+
+#
+# Misc devices
+#
+# CONFIG_SENSORS_LIS3LV02D is not set
+# CONFIG_AD525X_DPOT is not set
+# CONFIG_ATMEL_PWM is not set
+# CONFIG_DUMMY_IRQ is not set
+# CONFIG_PHANTOM is not set
+# CONFIG_INTEL_MID_PTI is not set
+# CONFIG_SGI_IOC4 is not set
+# CONFIG_TIFM_CORE is not set
+# CONFIG_ICS932S401 is not set
+# CONFIG_ATMEL_SSC is not set
+# CONFIG_ENCLOSURE_SERVICES is not set
+# CONFIG_HP_ILO is not set
+# CONFIG_APDS9802ALS is not set
+# CONFIG_ISL29003 is not set
+# CONFIG_ISL29020 is not set
+# CONFIG_SENSORS_TSL2550 is not set
+# CONFIG_SENSORS_BH1780 is not set
+# CONFIG_SENSORS_BH1770 is not set
+# CONFIG_SENSORS_APDS990X is not set
+# CONFIG_HMC6352 is not set
+# CONFIG_DS1682 is not set
+# CONFIG_TI_DAC7512 is not set
+# CONFIG_BMP085_I2C is not set
+# CONFIG_BMP085_SPI is not set
+# CONFIG_PCH_PHUB is not set
+# CONFIG_USB_SWITCH_FSA9480 is not set
+# CONFIG_LATTICE_ECP3_CONFIG is not set
+CONFIG_SRAM=y
+# CONFIG_C2PORT is not set
+
+#
+# EEPROM support
+#
+CONFIG_EEPROM_AT24=y
+CONFIG_EEPROM_AT25=y
+# CONFIG_EEPROM_LEGACY is not set
+# CONFIG_EEPROM_MAX6875 is not set
+# CONFIG_EEPROM_93CX6 is not set
+# CONFIG_EEPROM_93XX46 is not set
+# CONFIG_CB710_CORE is not set
+
+#
+# Texas Instruments shared transport line discipline
+#
+# CONFIG_TI_ST is not set
+# CONFIG_SENSORS_LIS3_SPI is not set
+# CONFIG_SENSORS_LIS3_I2C is not set
+
+#
+# Altera FPGA firmware download module
+#
+# CONFIG_ALTERA_STAPL is not set
+CONFIG_HAVE_IDE=y
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+CONFIG_SCSI_MOD=y
+# CONFIG_RAID_ATTRS is not set
+CONFIG_SCSI=y
+CONFIG_SCSI_DMA=y
+# CONFIG_SCSI_TGT is not set
+# CONFIG_SCSI_NETLINK is not set
+# CONFIG_SCSI_PROC_FS is not set
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=y
+# CONFIG_CHR_DEV_ST is not set
+# CONFIG_CHR_DEV_OSST is not set
+# CONFIG_BLK_DEV_SR is not set
+# CONFIG_CHR_DEV_SG is not set
+# CONFIG_CHR_DEV_SCH is not set
+CONFIG_SCSI_MULTI_LUN=y
+CONFIG_SCSI_CONSTANTS=y
+CONFIG_SCSI_LOGGING=y
+CONFIG_SCSI_SCAN_ASYNC=y
+
+#
+# SCSI Transports
+#
+# CONFIG_SCSI_SPI_ATTRS is not set
+# CONFIG_SCSI_FC_ATTRS is not set
+# CONFIG_SCSI_ISCSI_ATTRS is not set
+# CONFIG_SCSI_SAS_ATTRS is not set
+# CONFIG_SCSI_SAS_LIBSAS is not set
+# CONFIG_SCSI_SRP_ATTRS is not set
+# CONFIG_SCSI_LOWLEVEL is not set
+# CONFIG_SCSI_DH is not set
+# CONFIG_SCSI_OSD_INITIATOR is not set
+CONFIG_ATA=y
+# CONFIG_ATA_NONSTANDARD is not set
+CONFIG_ATA_VERBOSE_ERROR=y
+CONFIG_SATA_PMP=y
+
+#
+# Controllers with non-SFF native interface
+#
+CONFIG_SATA_AHCI=y
+CONFIG_SATA_AHCI_PLATFORM=y
+CONFIG_AHCI_IMX=y
+# CONFIG_SATA_INIC162X is not set
+# CONFIG_SATA_ACARD_AHCI is not set
+# CONFIG_SATA_SIL24 is not set
+CONFIG_ATA_SFF=y
+
+#
+# SFF controllers with custom DMA interface
+#
+# CONFIG_PDC_ADMA is not set
+# CONFIG_SATA_QSTOR is not set
+# CONFIG_SATA_SX4 is not set
+CONFIG_ATA_BMDMA=y
+
+#
+# SATA SFF controllers with BMDMA
+#
+# CONFIG_ATA_PIIX is not set
+# CONFIG_SATA_HIGHBANK is not set
+# CONFIG_SATA_MV is not set
+# CONFIG_SATA_NV is not set
+# CONFIG_SATA_PROMISE is not set
+# CONFIG_SATA_SIL is not set
+# CONFIG_SATA_SIS is not set
+# CONFIG_SATA_SVW is not set
+# CONFIG_SATA_ULI is not set
+# CONFIG_SATA_VIA is not set
+# CONFIG_SATA_VITESSE is not set
+
+#
+# PATA SFF controllers with BMDMA
+#
+# CONFIG_PATA_ALI is not set
+# CONFIG_PATA_AMD is not set
+# CONFIG_PATA_ARASAN_CF is not set
+# CONFIG_PATA_ARTOP is not set
+# CONFIG_PATA_ATIIXP is not set
+# CONFIG_PATA_ATP867X is not set
+# CONFIG_PATA_CMD64X is not set
+# CONFIG_PATA_CS5520 is not set
+# CONFIG_PATA_CS5530 is not set
+# CONFIG_PATA_CS5536 is not set
+# CONFIG_PATA_CYPRESS is not set
+# CONFIG_PATA_EFAR is not set
+# CONFIG_PATA_HPT366 is not set
+# CONFIG_PATA_HPT37X is not set
+# CONFIG_PATA_HPT3X2N is not set
+# CONFIG_PATA_HPT3X3 is not set
+CONFIG_PATA_IMX=y
+# CONFIG_PATA_IT8213 is not set
+# CONFIG_PATA_IT821X is not set
+# CONFIG_PATA_JMICRON is not set
+# CONFIG_PATA_MARVELL is not set
+# CONFIG_PATA_NETCELL is not set
+# CONFIG_PATA_NINJA32 is not set
+# CONFIG_PATA_NS87415 is not set
+# CONFIG_PATA_OLDPIIX is not set
+# CONFIG_PATA_OPTIDMA is not set
+# CONFIG_PATA_PDC2027X is not set
+# CONFIG_PATA_PDC_OLD is not set
+# CONFIG_PATA_RADISYS is not set
+# CONFIG_PATA_RDC is not set
+# CONFIG_PATA_SC1200 is not set
+# CONFIG_PATA_SCH is not set
+# CONFIG_PATA_SERVERWORKS is not set
+# CONFIG_PATA_SIL680 is not set
+# CONFIG_PATA_SIS is not set
+# CONFIG_PATA_TOSHIBA is not set
+# CONFIG_PATA_TRIFLEX is not set
+# CONFIG_PATA_VIA is not set
+# CONFIG_PATA_WINBOND is not set
+
+#
+# PIO-only SFF controllers
+#
+# CONFIG_PATA_CMD640_PCI is not set
+# CONFIG_PATA_MPIIX is not set
+# CONFIG_PATA_NS87410 is not set
+# CONFIG_PATA_OPTI is not set
+# CONFIG_PATA_PLATFORM is not set
+# CONFIG_PATA_RZ1000 is not set
+
+#
+# Generic fallback / legacy drivers
+#
+# CONFIG_ATA_GENERIC is not set
+# CONFIG_PATA_LEGACY is not set
+# CONFIG_MD is not set
+# CONFIG_TARGET_CORE is not set
+# CONFIG_FUSION is not set
+
+#
+# IEEE 1394 (FireWire) support
+#
+# CONFIG_FIREWIRE is not set
+# CONFIG_FIREWIRE_NOSY is not set
+# CONFIG_I2O is not set
+CONFIG_NETDEVICES=y
+CONFIG_NET_CORE=y
+# CONFIG_BONDING is not set
+# CONFIG_DUMMY is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_NET_FC is not set
+CONFIG_MII=y
+# CONFIG_NET_TEAM is not set
+# CONFIG_MACVLAN is not set
+# CONFIG_VXLAN is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+CONFIG_TUN=m
+# CONFIG_VETH is not set
+# CONFIG_ARCNET is not set
+
+#
+# CAIF transport drivers
+#
+
+#
+# Distributed Switch Architecture drivers
+#
+# CONFIG_NET_DSA_MV88E6XXX is not set
+# CONFIG_NET_DSA_MV88E6060 is not set
+# CONFIG_NET_DSA_MV88E6XXX_NEED_PPU is not set
+# CONFIG_NET_DSA_MV88E6131 is not set
+# CONFIG_NET_DSA_MV88E6123_61_65 is not set
+CONFIG_ETHERNET=y
+CONFIG_NET_VENDOR_3COM=y
+# CONFIG_VORTEX is not set
+# CONFIG_TYPHOON is not set
+CONFIG_NET_VENDOR_ADAPTEC=y
+# CONFIG_ADAPTEC_STARFIRE is not set
+CONFIG_NET_VENDOR_ALTEON=y
+# CONFIG_ACENIC is not set
+CONFIG_NET_VENDOR_AMD=y
+# CONFIG_AMD8111_ETH is not set
+# CONFIG_PCNET32 is not set
+CONFIG_NET_VENDOR_ATHEROS=y
+# CONFIG_ATL2 is not set
+# CONFIG_ATL1 is not set
+# CONFIG_ATL1E is not set
+# CONFIG_ATL1C is not set
+# CONFIG_ALX is not set
+CONFIG_NET_CADENCE=y
+# CONFIG_ARM_AT91_ETHER is not set
+# CONFIG_MACB is not set
+# CONFIG_NET_VENDOR_BROADCOM is not set
+CONFIG_NET_VENDOR_BROCADE=y
+# CONFIG_BNA is not set
+# CONFIG_NET_CALXEDA_XGMAC is not set
+CONFIG_NET_VENDOR_CHELSIO=y
+# CONFIG_CHELSIO_T1 is not set
+# CONFIG_CHELSIO_T3 is not set
+# CONFIG_CHELSIO_T4 is not set
+# CONFIG_CHELSIO_T4VF is not set
+CONFIG_NET_VENDOR_CIRRUS=y
+CONFIG_CS89x0=y
+CONFIG_CS89x0_PLATFORM=y
+CONFIG_NET_VENDOR_CISCO=y
+# CONFIG_ENIC is not set
+# CONFIG_DM9000 is not set
+# CONFIG_DNET is not set
+CONFIG_NET_VENDOR_DEC=y
+# CONFIG_NET_TULIP is not set
+CONFIG_NET_VENDOR_DLINK=y
+# CONFIG_DL2K is not set
+# CONFIG_SUNDANCE is not set
+CONFIG_NET_VENDOR_EMULEX=y
+# CONFIG_BE2NET is not set
+CONFIG_NET_VENDOR_EXAR=y
+# CONFIG_S2IO is not set
+# CONFIG_VXGE is not set
+# CONFIG_NET_VENDOR_FARADAY is not set
+CONFIG_NET_VENDOR_FREESCALE=y
+CONFIG_FEC=y
+CONFIG_NET_VENDOR_HP=y
+# CONFIG_HP100 is not set
+CONFIG_NET_VENDOR_INTEL=y
+# CONFIG_E100 is not set
+# CONFIG_E1000 is not set
+# CONFIG_E1000E is not set
+CONFIG_IGB=m
+CONFIG_IGB_HWMON=y
+# CONFIG_IGBVF is not set
+# CONFIG_IXGB is not set
+# CONFIG_IXGBE is not set
+CONFIG_NET_VENDOR_I825XX=y
+# CONFIG_IP1000 is not set
+# CONFIG_JME is not set
+# CONFIG_NET_VENDOR_MARVELL is not set
+CONFIG_NET_VENDOR_MELLANOX=y
+# CONFIG_MLX4_EN is not set
+# CONFIG_MLX4_CORE is not set
+# CONFIG_NET_VENDOR_MICREL is not set
+# CONFIG_NET_VENDOR_MICROCHIP is not set
+CONFIG_NET_VENDOR_MYRI=y
+# CONFIG_MYRI10GE is not set
+# CONFIG_FEALNX is not set
+# CONFIG_NET_VENDOR_NATSEMI is not set
+CONFIG_NET_VENDOR_NVIDIA=y
+# CONFIG_FORCEDETH is not set
+CONFIG_NET_VENDOR_OKI=y
+# CONFIG_PCH_GBE is not set
+# CONFIG_ETHOC is not set
+CONFIG_NET_PACKET_ENGINE=y
+# CONFIG_HAMACHI is not set
+# CONFIG_YELLOWFIN is not set
+CONFIG_NET_VENDOR_QLOGIC=y
+# CONFIG_QLA3XXX is not set
+# CONFIG_QLCNIC is not set
+# CONFIG_QLGE is not set
+# CONFIG_NETXEN_NIC is not set
+CONFIG_NET_VENDOR_REALTEK=y
+# CONFIG_8139CP is not set
+# CONFIG_8139TOO is not set
+# CONFIG_R8169 is not set
+CONFIG_NET_VENDOR_RDC=y
+# CONFIG_R6040 is not set
+# CONFIG_NET_VENDOR_SEEQ is not set
+CONFIG_NET_VENDOR_SILAN=y
+# CONFIG_SC92031 is not set
+CONFIG_NET_VENDOR_SIS=y
+# CONFIG_SIS900 is not set
+# CONFIG_SIS190 is not set
+# CONFIG_SFC is not set
+CONFIG_NET_VENDOR_SMSC=y
+CONFIG_SMC91X=y
+# CONFIG_EPIC100 is not set
+CONFIG_SMC911X=y
+CONFIG_SMSC911X=y
+# CONFIG_SMSC911X_ARCH_HOOKS is not set
+# CONFIG_SMSC9420 is not set
+# CONFIG_NET_VENDOR_STMICRO is not set
+CONFIG_NET_VENDOR_SUN=y
+# CONFIG_HAPPYMEAL is not set
+# CONFIG_SUNGEM is not set
+# CONFIG_CASSINI is not set
+# CONFIG_NIU is not set
+CONFIG_NET_VENDOR_TEHUTI=y
+# CONFIG_TEHUTI is not set
+CONFIG_NET_VENDOR_TI=y
+# CONFIG_TLAN is not set
+CONFIG_NET_VENDOR_VIA=y
+# CONFIG_VIA_RHINE is not set
+# CONFIG_VIA_VELOCITY is not set
+CONFIG_NET_VENDOR_WIZNET=y
+# CONFIG_WIZNET_W5100 is not set
+# CONFIG_WIZNET_W5300 is not set
+# CONFIG_FDDI is not set
+# CONFIG_HIPPI is not set
+CONFIG_PHYLIB=y
+
+#
+# MII PHY device drivers
+#
+# CONFIG_AT803X_PHY is not set
+# CONFIG_AMD_PHY is not set
+# CONFIG_MARVELL_PHY is not set
+# CONFIG_DAVICOM_PHY is not set
+# CONFIG_QSEMI_PHY is not set
+# CONFIG_LXT_PHY is not set
+# CONFIG_CICADA_PHY is not set
+# CONFIG_VITESSE_PHY is not set
+# CONFIG_SMSC_PHY is not set
+# CONFIG_BROADCOM_PHY is not set
+# CONFIG_BCM87XX_PHY is not set
+# CONFIG_ICPLUS_PHY is not set
+# CONFIG_REALTEK_PHY is not set
+# CONFIG_NATIONAL_PHY is not set
+# CONFIG_STE10XP is not set
+# CONFIG_LSI_ET1011C_PHY is not set
+# CONFIG_MICREL_PHY is not set
+# CONFIG_FIXED_PHY is not set
+# CONFIG_MDIO_BITBANG is not set
+# CONFIG_MDIO_BUS_MUX_GPIO is not set
+# CONFIG_MDIO_BUS_MUX_MMIOREG is not set
+# CONFIG_MICREL_KS8995MA is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+
+#
+# USB Network Adapters
+#
+# CONFIG_USB_CATC is not set
+# CONFIG_USB_KAWETH is not set
+# CONFIG_USB_PEGASUS is not set
+# CONFIG_USB_RTL8150 is not set
+# CONFIG_USB_RTL8152 is not set
+# CONFIG_USB_USBNET is not set
+# CONFIG_USB_IPHETH is not set
+CONFIG_WLAN=y
+# CONFIG_LIBERTAS_THINFIRM is not set
+# CONFIG_ATMEL is not set
+# CONFIG_AT76C50X_USB is not set
+# CONFIG_PRISM54 is not set
+# CONFIG_USB_ZD1201 is not set
+# CONFIG_USB_NET_RNDIS_WLAN is not set
+# CONFIG_RTL8180 is not set
+# CONFIG_RTL8187 is not set
+# CONFIG_ADM8211 is not set
+# CONFIG_MAC80211_HWSIM is not set
+# CONFIG_MWL8K is not set
+CONFIG_ATH_CARDS=y
+# CONFIG_ATH_DEBUG is not set
+# CONFIG_ATH5K is not set
+# CONFIG_ATH5K_PCI is not set
+# CONFIG_ATH9K is not set
+# CONFIG_ATH9K_HTC is not set
+# CONFIG_CARL9170 is not set
+CONFIG_ATH6KL=m
+CONFIG_ATH6KL_SDIO=m
+# CONFIG_ATH6KL_USB is not set
+# CONFIG_ATH6KL_DEBUG is not set
+# CONFIG_AR5523 is not set
+# CONFIG_WIL6210 is not set
+# CONFIG_B43 is not set
+# CONFIG_B43LEGACY is not set
+# CONFIG_BRCMFMAC is not set
+# CONFIG_HOSTAP is not set
+# CONFIG_IPW2100 is not set
+# CONFIG_IPW2200 is not set
+# CONFIG_IWLWIFI is not set
+# CONFIG_IWL4965 is not set
+# CONFIG_IWL3945 is not set
+# CONFIG_LIBERTAS is not set
+# CONFIG_HERMES is not set
+# CONFIG_P54_COMMON is not set
+# CONFIG_RT2X00 is not set
+# CONFIG_RTLWIFI is not set
+# CONFIG_WL_TI is not set
+# CONFIG_ZD1211RW is not set
+CONFIG_MWIFIEX=m
+CONFIG_MWIFIEX_SDIO=m
+# CONFIG_MWIFIEX_PCIE is not set
+# CONFIG_MWIFIEX_USB is not set
+
+#
+# Enable WiMAX (Networking options) to see the WiMAX drivers
+#
+# CONFIG_WAN is not set
+# CONFIG_VMXNET3 is not set
+# CONFIG_ISDN is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+# CONFIG_INPUT_FF_MEMLESS is not set
+CONFIG_INPUT_POLLDEV=y
+# CONFIG_INPUT_SPARSEKMAP is not set
+CONFIG_INPUT_MATRIXKMAP=y
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+CONFIG_INPUT_EVDEV=y
+CONFIG_INPUT_EVBUG=m
+
+#
+# Input Device Drivers
+#
+CONFIG_INPUT_KEYBOARD=y
+# CONFIG_KEYBOARD_ADP5588 is not set
+# CONFIG_KEYBOARD_ADP5589 is not set
+CONFIG_KEYBOARD_ATKBD=y
+# CONFIG_KEYBOARD_QT1070 is not set
+# CONFIG_KEYBOARD_QT2160 is not set
+# CONFIG_KEYBOARD_LKKBD is not set
+CONFIG_KEYBOARD_GPIO=y
+# CONFIG_KEYBOARD_TCA6416 is not set
+# CONFIG_KEYBOARD_TCA8418 is not set
+# CONFIG_KEYBOARD_MATRIX is not set
+# CONFIG_KEYBOARD_LM8323 is not set
+# CONFIG_KEYBOARD_LM8333 is not set
+# CONFIG_KEYBOARD_MAX7359 is not set
+# CONFIG_KEYBOARD_MCS is not set
+# CONFIG_KEYBOARD_MPR121 is not set
+CONFIG_KEYBOARD_IMX=y
+# CONFIG_KEYBOARD_NEWTON is not set
+# CONFIG_KEYBOARD_OPENCORES is not set
+# CONFIG_KEYBOARD_SAMSUNG is not set
+# CONFIG_KEYBOARD_STOWAWAY is not set
+# CONFIG_KEYBOARD_SUNKBD is not set
+# CONFIG_KEYBOARD_XTKBD is not set
+CONFIG_INPUT_MOUSE=y
+CONFIG_MOUSE_PS2=m
+CONFIG_MOUSE_PS2_ALPS=y
+CONFIG_MOUSE_PS2_LOGIPS2PP=y
+CONFIG_MOUSE_PS2_SYNAPTICS=y
+CONFIG_MOUSE_PS2_CYPRESS=y
+CONFIG_MOUSE_PS2_TRACKPOINT=y
+CONFIG_MOUSE_PS2_ELANTECH=y
+# CONFIG_MOUSE_PS2_SENTELIC is not set
+# CONFIG_MOUSE_PS2_TOUCHKIT is not set
+# CONFIG_MOUSE_SERIAL is not set
+# CONFIG_MOUSE_APPLETOUCH is not set
+# CONFIG_MOUSE_BCM5974 is not set
+# CONFIG_MOUSE_CYAPA is not set
+# CONFIG_MOUSE_VSXXXAA is not set
+# CONFIG_MOUSE_GPIO is not set
+# CONFIG_MOUSE_SYNAPTICS_I2C is not set
+# CONFIG_MOUSE_SYNAPTICS_USB is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+CONFIG_INPUT_TOUCHSCREEN=y
+# CONFIG_TOUCHSCREEN_ADS7846 is not set
+# CONFIG_TOUCHSCREEN_AD7877 is not set
+# CONFIG_TOUCHSCREEN_AD7879 is not set
+# CONFIG_TOUCHSCREEN_ATMEL_MXT is not set
+# CONFIG_TOUCHSCREEN_AUO_PIXCIR is not set
+# CONFIG_TOUCHSCREEN_BU21013 is not set
+# CONFIG_TOUCHSCREEN_CY8CTMG110 is not set
+# CONFIG_TOUCHSCREEN_CYTTSP_CORE is not set
+# CONFIG_TOUCHSCREEN_DA9052 is not set
+# CONFIG_TOUCHSCREEN_DYNAPRO is not set
+# CONFIG_TOUCHSCREEN_HAMPSHIRE is not set
+# CONFIG_TOUCHSCREEN_EETI is not set
+CONFIG_TOUCHSCREEN_EGALAX=y
+# CONFIG_TOUCHSCREEN_EGALAX_SINGLE_TOUCH is not set
+CONFIG_TOUCHSCREEN_ELAN=y
+# CONFIG_TOUCHSCREEN_FUJITSU is not set
+# CONFIG_TOUCHSCREEN_ILI210X is not set
+# CONFIG_TOUCHSCREEN_GUNZE is not set
+# CONFIG_TOUCHSCREEN_ELO is not set
+# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set
+# CONFIG_TOUCHSCREEN_WACOM_I2C is not set
+CONFIG_TOUCHSCREEN_MAX11801=y
+# CONFIG_TOUCHSCREEN_MCS5000 is not set
+# CONFIG_TOUCHSCREEN_MMS114 is not set
+# CONFIG_TOUCHSCREEN_MTOUCH is not set
+# CONFIG_TOUCHSCREEN_INEXIO is not set
+# CONFIG_TOUCHSCREEN_MK712 is not set
+# CONFIG_TOUCHSCREEN_PENMOUNT is not set
+# CONFIG_TOUCHSCREEN_EDT_FT5X06 is not set
+# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
+# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
+# CONFIG_TOUCHSCREEN_PIXCIR is not set
+# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set
+CONFIG_TOUCHSCREEN_MC13783=y
+# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set
+# CONFIG_TOUCHSCREEN_TSC_SERIO is not set
+# CONFIG_TOUCHSCREEN_TSC2005 is not set
+# CONFIG_TOUCHSCREEN_TSC2007 is not set
+# CONFIG_TOUCHSCREEN_W90X900 is not set
+# CONFIG_TOUCHSCREEN_ST1232 is not set
+# CONFIG_TOUCHSCREEN_TPS6507X is not set
+# CONFIG_TOUCHSCREEN_HIMAX is not set
+CONFIG_INPUT_MISC=y
+# CONFIG_INPUT_AD714X is not set
+# CONFIG_INPUT_BMA150 is not set
+# CONFIG_INPUT_MC13783_PWRBUTTON is not set
+CONFIG_INPUT_MMA8450=y
+# CONFIG_INPUT_MPU3050 is not set
+# CONFIG_INPUT_GP2A is not set
+# CONFIG_INPUT_GPIO_TILT_POLLED is not set
+# CONFIG_INPUT_ATI_REMOTE2 is not set
+# CONFIG_INPUT_KEYSPAN_REMOTE is not set
+# CONFIG_INPUT_KXTJ9 is not set
+# CONFIG_INPUT_POWERMATE is not set
+# CONFIG_INPUT_YEALINK is not set
+# CONFIG_INPUT_CM109 is not set
+# CONFIG_INPUT_UINPUT is not set
+# CONFIG_INPUT_PCF8574 is not set
+# CONFIG_INPUT_PWM_BEEPER is not set
+# CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set
+# CONFIG_INPUT_DA9052_ONKEY is not set
+# CONFIG_INPUT_ADXL34X is not set
+# CONFIG_INPUT_IMS_PCU is not set
+# CONFIG_INPUT_CMA3000 is not set
+CONFIG_INPUT_ISL29023=y
+
+#
+# Hardware I/O ports
+#
+CONFIG_SERIO=y
+CONFIG_SERIO_SERPORT=m
+# CONFIG_SERIO_PCIPS2 is not set
+CONFIG_SERIO_LIBPS2=y
+# CONFIG_SERIO_RAW is not set
+# CONFIG_SERIO_ALTERA_PS2 is not set
+# CONFIG_SERIO_PS2MULT is not set
+# CONFIG_SERIO_ARC_PS2 is not set
+# CONFIG_SERIO_APBPS2 is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+CONFIG_TTY=y
+CONFIG_VT=y
+CONFIG_CONSOLE_TRANSLATIONS=y
+CONFIG_VT_CONSOLE=y
+CONFIG_VT_CONSOLE_SLEEP=y
+CONFIG_HW_CONSOLE=y
+CONFIG_VT_HW_CONSOLE_BINDING=y
+CONFIG_UNIX98_PTYS=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
+# CONFIG_LEGACY_PTYS is not set
+# CONFIG_SERIAL_NONSTANDARD is not set
+# CONFIG_NOZOMI is not set
+# CONFIG_N_GSM is not set
+# CONFIG_TRACE_SINK is not set
+# CONFIG_DEVKMEM is not set
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+
+#
+# Non-8250 serial port support
+#
+# CONFIG_SERIAL_KGDB_NMI is not set
+# CONFIG_SERIAL_MAX3100 is not set
+# CONFIG_SERIAL_MAX310X is not set
+# CONFIG_SERIAL_MFD_HSU is not set
+CONFIG_SERIAL_IMX=y
+CONFIG_SERIAL_IMX_CONSOLE=y
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_CONSOLE_POLL=y
+# CONFIG_SERIAL_JSM is not set
+# CONFIG_SERIAL_SCCNXP is not set
+# CONFIG_SERIAL_TIMBERDALE is not set
+# CONFIG_SERIAL_ALTERA_JTAGUART is not set
+# CONFIG_SERIAL_ALTERA_UART is not set
+# CONFIG_SERIAL_IFX6X60 is not set
+# CONFIG_SERIAL_PCH_UART is not set
+# CONFIG_SERIAL_XILINX_PS_UART is not set
+# CONFIG_SERIAL_ARC is not set
+# CONFIG_SERIAL_RP2 is not set
+CONFIG_SERIAL_FSL_LPUART=y
+CONFIG_SERIAL_FSL_LPUART_CONSOLE=y
+# CONFIG_TTY_PRINTK is not set
+CONFIG_FSL_OTP=y
+# CONFIG_HVC_DCC is not set
+# CONFIG_IPMI_HANDLER is not set
+CONFIG_HW_RANDOM=y
+# CONFIG_HW_RANDOM_TIMERIOMEM is not set
+# CONFIG_HW_RANDOM_ATMEL is not set
+# CONFIG_HW_RANDOM_IMX_RNG is not set
+# CONFIG_HW_RANDOM_EXYNOS is not set
+# CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+CONFIG_DEVPORT=y
+CONFIG_MXS_VIIM=y
+CONFIG_I2C=y
+CONFIG_I2C_BOARDINFO=y
+# CONFIG_I2C_COMPAT is not set
+CONFIG_I2C_CHARDEV=y
+CONFIG_I2C_MUX=y
+
+#
+# Multiplexer I2C Chip support
+#
+# CONFIG_I2C_ARB_GPIO_CHALLENGE is not set
+CONFIG_I2C_MUX_GPIO=y
+# CONFIG_I2C_MUX_PCA9541 is not set
+CONFIG_I2C_MUX_PCA954x=y
+# CONFIG_I2C_MUX_PINCTRL is not set
+# CONFIG_I2C_HELPER_AUTO is not set
+# CONFIG_I2C_SMBUS is not set
+
+#
+# I2C Algorithms
+#
+CONFIG_I2C_ALGOBIT=y
+CONFIG_I2C_ALGOPCF=m
+CONFIG_I2C_ALGOPCA=m
+
+#
+# I2C Hardware Bus support
+#
+
+#
+# PC SMBus host controller drivers
+#
+# CONFIG_I2C_ALI1535 is not set
+# CONFIG_I2C_ALI1563 is not set
+# CONFIG_I2C_ALI15X3 is not set
+# CONFIG_I2C_AMD756 is not set
+# CONFIG_I2C_AMD8111 is not set
+# CONFIG_I2C_I801 is not set
+# CONFIG_I2C_ISCH is not set
+# CONFIG_I2C_PIIX4 is not set
+# CONFIG_I2C_NFORCE2 is not set
+# CONFIG_I2C_SIS5595 is not set
+# CONFIG_I2C_SIS630 is not set
+# CONFIG_I2C_SIS96X is not set
+# CONFIG_I2C_VIA is not set
+# CONFIG_I2C_VIAPRO is not set
+
+#
+# I2C system bus drivers (mostly embedded / system-on-chip)
+#
+# CONFIG_I2C_CBUS_GPIO is not set
+# CONFIG_I2C_DESIGNWARE_PLATFORM is not set
+# CONFIG_I2C_DESIGNWARE_PCI is not set
+# CONFIG_I2C_EG20T is not set
+# CONFIG_I2C_GPIO is not set
+CONFIG_I2C_IMX=y
+# CONFIG_I2C_INTEL_MID is not set
+# CONFIG_I2C_OCORES is not set
+# CONFIG_I2C_PCA_PLATFORM is not set
+# CONFIG_I2C_PXA_PCI is not set
+# CONFIG_I2C_SIMTEC is not set
+# CONFIG_I2C_XILINX is not set
+
+#
+# External I2C/SMBus adapter drivers
+#
+# CONFIG_I2C_DIOLAN_U2C is not set
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_TAOS_EVM is not set
+# CONFIG_I2C_TINY_USB is not set
+
+#
+# Other I2C/SMBus bus drivers
+#
+# CONFIG_I2C_STUB is not set
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+CONFIG_SPI=y
+# CONFIG_SPI_DEBUG is not set
+CONFIG_SPI_MASTER=y
+
+#
+# SPI Master Controller Drivers
+#
+# CONFIG_SPI_ALTERA is not set
+CONFIG_SPI_BITBANG=y
+# CONFIG_SPI_GPIO is not set
+CONFIG_SPI_IMX=y
+# CONFIG_SPI_FSL_SPI is not set
+# CONFIG_SPI_OC_TINY is not set
+# CONFIG_SPI_PXA2XX is not set
+# CONFIG_SPI_PXA2XX_PCI is not set
+# CONFIG_SPI_SC18IS602 is not set
+# CONFIG_SPI_TOPCLIFF_PCH is not set
+# CONFIG_SPI_XCOMM is not set
+# CONFIG_SPI_XILINX is not set
+# CONFIG_SPI_DESIGNWARE is not set
+
+#
+# SPI Protocol Masters
+#
+# CONFIG_SPI_SPIDEV is not set
+# CONFIG_SPI_TLE62X0 is not set
+
+#
+# Qualcomm MSM SSBI bus support
+#
+# CONFIG_SSBI is not set
+# CONFIG_HSI is not set
+
+#
+# PPS support
+#
+CONFIG_PPS=y
+# CONFIG_PPS_DEBUG is not set
+
+#
+# PPS clients support
+#
+# CONFIG_PPS_CLIENT_KTIMER is not set
+# CONFIG_PPS_CLIENT_LDISC is not set
+# CONFIG_PPS_CLIENT_GPIO is not set
+
+#
+# PPS generators support
+#
+
+#
+# PTP clock support
+#
+CONFIG_PTP_1588_CLOCK=y
+
+#
+# Enable PHYLIB and NETWORK_PHY_TIMESTAMPING to see the additional clocks.
+#
+# CONFIG_PTP_1588_CLOCK_PCH is not set
+CONFIG_PINCTRL=y
+
+#
+# Pin controllers
+#
+CONFIG_PINMUX=y
+CONFIG_PINCONF=y
+# CONFIG_DEBUG_PINCTRL is not set
+CONFIG_PINCTRL_IMX=y
+CONFIG_PINCTRL_IMX51=y
+CONFIG_PINCTRL_IMX53=y
+CONFIG_PINCTRL_IMX6Q=y
+CONFIG_PINCTRL_IMX6SL=y
+CONFIG_PINCTRL_VF610=y
+# CONFIG_PINCTRL_SINGLE is not set
+# CONFIG_PINCTRL_EXYNOS is not set
+# CONFIG_PINCTRL_EXYNOS5440 is not set
+CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y
+CONFIG_ARCH_REQUIRE_GPIOLIB=y
+CONFIG_GPIO_DEVRES=y
+CONFIG_GPIOLIB=y
+CONFIG_OF_GPIO=y
+# CONFIG_DEBUG_GPIO is not set
+CONFIG_GPIO_SYSFS=y
+CONFIG_GPIO_GENERIC=y
+# CONFIG_GPIO_DA9052 is not set
+
+#
+# Memory mapped GPIO drivers:
+#
+# CONFIG_GPIO_GENERIC_PLATFORM is not set
+# CONFIG_GPIO_EM is not set
+CONFIG_GPIO_MXC=y
+# CONFIG_GPIO_RCAR is not set
+# CONFIG_GPIO_TS5500 is not set
+# CONFIG_GPIO_VX855 is not set
+# CONFIG_GPIO_GRGPIO is not set
+
+#
+# I2C GPIO expanders:
+#
+# CONFIG_GPIO_MAX7300 is not set
+# CONFIG_GPIO_MAX732X is not set
+# CONFIG_GPIO_PCA953X_IRQ is not set
+# CONFIG_GPIO_PCF857X is not set
+# CONFIG_GPIO_SX150X is not set
+# CONFIG_GPIO_ADP5588 is not set
+# CONFIG_GPIO_ADNP is not set
+
+#
+# PCI GPIO expanders:
+#
+# CONFIG_GPIO_BT8XX is not set
+# CONFIG_GPIO_AMD8111 is not set
+# CONFIG_GPIO_ML_IOH is not set
+# CONFIG_GPIO_RDC321X is not set
+
+#
+# SPI GPIO expanders:
+#
+# CONFIG_GPIO_MAX7301 is not set
+# CONFIG_GPIO_MCP23S08 is not set
+# CONFIG_GPIO_MC33880 is not set
+# CONFIG_GPIO_74X164 is not set
+
+#
+# AC97 GPIO expanders:
+#
+
+#
+# MODULbus GPIO expanders:
+#
+
+#
+# USB GPIO expanders:
+#
+# CONFIG_W1 is not set
+CONFIG_POWER_SUPPLY=y
+# CONFIG_POWER_SUPPLY_DEBUG is not set
+# CONFIG_PDA_POWER is not set
+# CONFIG_TEST_POWER is not set
+# CONFIG_BATTERY_DS2780 is not set
+# CONFIG_BATTERY_DS2781 is not set
+# CONFIG_BATTERY_DS2782 is not set
+# CONFIG_BATTERY_SBS is not set
+# CONFIG_BATTERY_BQ27x00 is not set
+# CONFIG_BATTERY_DA9052 is not set
+# CONFIG_BATTERY_MAX17040 is not set
+# CONFIG_BATTERY_MAX17042 is not set
+# CONFIG_CHARGER_ISP1704 is not set
+# CONFIG_CHARGER_MAX8903 is not set
+CONFIG_SABRESD_MAX8903=y
+# CONFIG_CHARGER_LP8727 is not set
+# CONFIG_CHARGER_GPIO is not set
+# CONFIG_CHARGER_MANAGER is not set
+# CONFIG_CHARGER_BQ2415X is not set
+# CONFIG_CHARGER_SMB347 is not set
+# CONFIG_BATTERY_GOLDFISH is not set
+CONFIG_IMX6_USB_CHARGER=y
+# CONFIG_POWER_RESET is not set
+# CONFIG_POWER_RESET_RESTART is not set
+# CONFIG_POWER_AVS is not set
+CONFIG_HWMON=y
+# CONFIG_HWMON_VID is not set
+# CONFIG_HWMON_DEBUG_CHIP is not set
+
+#
+# Native drivers
+#
+# CONFIG_SENSORS_AD7314 is not set
+# CONFIG_SENSORS_AD7414 is not set
+# CONFIG_SENSORS_AD7418 is not set
+# CONFIG_SENSORS_ADCXX is not set
+# CONFIG_SENSORS_ADM1021 is not set
+# CONFIG_SENSORS_ADM1025 is not set
+# CONFIG_SENSORS_ADM1026 is not set
+# CONFIG_SENSORS_ADM1029 is not set
+# CONFIG_SENSORS_ADM1031 is not set
+# CONFIG_SENSORS_ADM9240 is not set
+# CONFIG_SENSORS_ADT7310 is not set
+# CONFIG_SENSORS_ADT7410 is not set
+# CONFIG_SENSORS_ADT7411 is not set
+# CONFIG_SENSORS_ADT7462 is not set
+# CONFIG_SENSORS_ADT7470 is not set
+# CONFIG_SENSORS_ADT7475 is not set
+# CONFIG_SENSORS_ASC7621 is not set
+# CONFIG_SENSORS_ATXP1 is not set
+# CONFIG_SENSORS_DS620 is not set
+# CONFIG_SENSORS_DS1621 is not set
+# CONFIG_SENSORS_DA9052_ADC is not set
+# CONFIG_SENSORS_I5K_AMB is not set
+# CONFIG_SENSORS_F71805F is not set
+# CONFIG_SENSORS_F71882FG is not set
+# CONFIG_SENSORS_F75375S is not set
+# CONFIG_SENSORS_G760A is not set
+# CONFIG_SENSORS_GL518SM is not set
+# CONFIG_SENSORS_GL520SM is not set
+# CONFIG_SENSORS_GPIO_FAN is not set
+# CONFIG_SENSORS_HIH6130 is not set
+# CONFIG_SENSORS_IT87 is not set
+# CONFIG_SENSORS_JC42 is not set
+# CONFIG_SENSORS_LINEAGE is not set
+# CONFIG_SENSORS_LM63 is not set
+# CONFIG_SENSORS_LM70 is not set
+# CONFIG_SENSORS_LM73 is not set
+# CONFIG_SENSORS_LM75 is not set
+# CONFIG_SENSORS_LM77 is not set
+# CONFIG_SENSORS_LM78 is not set
+# CONFIG_SENSORS_LM80 is not set
+# CONFIG_SENSORS_LM83 is not set
+# CONFIG_SENSORS_LM85 is not set
+# CONFIG_SENSORS_LM87 is not set
+# CONFIG_SENSORS_LM90 is not set
+# CONFIG_SENSORS_LM92 is not set
+# CONFIG_SENSORS_LM93 is not set
+# CONFIG_SENSORS_LTC4151 is not set
+# CONFIG_SENSORS_LTC4215 is not set
+# CONFIG_SENSORS_LTC4245 is not set
+# CONFIG_SENSORS_LTC4261 is not set
+# CONFIG_SENSORS_LM95234 is not set
+# CONFIG_SENSORS_LM95241 is not set
+# CONFIG_SENSORS_LM95245 is not set
+# CONFIG_SENSORS_MAX1111 is not set
+# CONFIG_SENSORS_MAX16065 is not set
+# CONFIG_SENSORS_MAX1619 is not set
+# CONFIG_SENSORS_MAX1668 is not set
+CONFIG_SENSORS_MAX17135=y
+# CONFIG_SENSORS_MAX197 is not set
+# CONFIG_SENSORS_MAX6639 is not set
+# CONFIG_SENSORS_MAX6642 is not set
+# CONFIG_SENSORS_MAX6650 is not set
+# CONFIG_SENSORS_MAX6697 is not set
+# CONFIG_SENSORS_MCP3021 is not set
+# CONFIG_SENSORS_NCT6775 is not set
+# CONFIG_SENSORS_PC87360 is not set
+# CONFIG_SENSORS_PC87427 is not set
+# CONFIG_SENSORS_PCF8591 is not set
+# CONFIG_PMBUS is not set
+# CONFIG_SENSORS_SHT15 is not set
+# CONFIG_SENSORS_SHT21 is not set
+# CONFIG_SENSORS_SIS5595 is not set
+# CONFIG_SENSORS_SMM665 is not set
+# CONFIG_SENSORS_DME1737 is not set
+# CONFIG_SENSORS_EMC1403 is not set
+# CONFIG_SENSORS_EMC2103 is not set
+# CONFIG_SENSORS_EMC6W201 is not set
+# CONFIG_SENSORS_SMSC47M1 is not set
+# CONFIG_SENSORS_SMSC47M192 is not set
+# CONFIG_SENSORS_SMSC47B397 is not set
+# CONFIG_SENSORS_SCH56XX_COMMON is not set
+# CONFIG_SENSORS_SCH5627 is not set
+# CONFIG_SENSORS_SCH5636 is not set
+# CONFIG_SENSORS_ADS1015 is not set
+# CONFIG_SENSORS_ADS7828 is not set
+# CONFIG_SENSORS_ADS7871 is not set
+# CONFIG_SENSORS_AMC6821 is not set
+# CONFIG_SENSORS_INA209 is not set
+# CONFIG_SENSORS_INA2XX is not set
+# CONFIG_SENSORS_THMC50 is not set
+# CONFIG_SENSORS_TMP102 is not set
+# CONFIG_SENSORS_TMP401 is not set
+# CONFIG_SENSORS_TMP421 is not set
+# CONFIG_SENSORS_VIA686A is not set
+# CONFIG_SENSORS_VT1211 is not set
+# CONFIG_SENSORS_VT8231 is not set
+# CONFIG_SENSORS_W83781D is not set
+# CONFIG_SENSORS_W83791D is not set
+# CONFIG_SENSORS_W83792D is not set
+# CONFIG_SENSORS_W83793 is not set
+# CONFIG_SENSORS_W83795 is not set
+# CONFIG_SENSORS_W83L785TS is not set
+# CONFIG_SENSORS_W83L786NG is not set
+# CONFIG_SENSORS_W83627HF is not set
+# CONFIG_SENSORS_W83627EHF is not set
+# CONFIG_SENSORS_MC13783_ADC is not set
+CONFIG_SENSORS_MAG3110=y
+CONFIG_MXC_MMA8451=y
+CONFIG_THERMAL=y
+CONFIG_THERMAL_HWMON=y
+CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y
+# CONFIG_THERMAL_DEFAULT_GOV_FAIR_SHARE is not set
+# CONFIG_THERMAL_DEFAULT_GOV_USER_SPACE is not set
+# CONFIG_THERMAL_GOV_FAIR_SHARE is not set
+CONFIG_THERMAL_GOV_STEP_WISE=y
+# CONFIG_THERMAL_GOV_USER_SPACE is not set
+CONFIG_CPU_THERMAL=y
+# CONFIG_THERMAL_EMULATION is not set
+CONFIG_IMX_THERMAL=y
+CONFIG_DEVICE_THERMAL=y
+CONFIG_WATCHDOG=y
+# CONFIG_WATCHDOG_CORE is not set
+# CONFIG_WATCHDOG_NOWAYOUT is not set
+
+#
+# Watchdog Device Drivers
+#
+# CONFIG_SOFT_WATCHDOG is not set
+# CONFIG_DA9052_WATCHDOG is not set
+# CONFIG_DW_WATCHDOG is not set
+# CONFIG_MPCORE_WATCHDOG is not set
+# CONFIG_MAX63XX_WATCHDOG is not set
+CONFIG_IMX2_WDT=y
+# CONFIG_ALIM7101_WDT is not set
+# CONFIG_I6300ESB_WDT is not set
+
+#
+# PCI-based Watchdog Cards
+#
+# CONFIG_PCIPCWATCHDOG is not set
+# CONFIG_WDTPCI is not set
+
+#
+# USB-based Watchdog Cards
+#
+# CONFIG_USBPCWATCHDOG is not set
+CONFIG_SSB_POSSIBLE=y
+
+#
+# Sonics Silicon Backplane
+#
+# CONFIG_SSB is not set
+CONFIG_BCMA_POSSIBLE=y
+
+#
+# Broadcom specific AMBA
+#
+# CONFIG_BCMA is not set
+
+#
+# Multifunction device drivers
+#
+CONFIG_MFD_CORE=y
+# CONFIG_MFD_AS3711 is not set
+# CONFIG_PMIC_ADP5520 is not set
+# CONFIG_MFD_AAT2870_CORE is not set
+# CONFIG_MFD_CROS_EC is not set
+# CONFIG_MFD_ASIC3 is not set
+# CONFIG_PMIC_DA903X is not set
+CONFIG_PMIC_DA9052=y
+# CONFIG_MFD_DA9052_SPI is not set
+CONFIG_MFD_DA9052_I2C=y
+# CONFIG_MFD_DA9055 is not set
+CONFIG_MFD_MXC_HDMI=y
+CONFIG_MFD_MC13783=y
+CONFIG_MFD_MC13XXX=y
+CONFIG_MFD_MC13XXX_SPI=y
+CONFIG_MFD_MC13XXX_I2C=y
+# CONFIG_HTC_EGPIO is not set
+# CONFIG_HTC_PASIC3 is not set
+# CONFIG_HTC_I2CPLD is not set
+# CONFIG_LPC_ICH is not set
+# CONFIG_LPC_SCH is not set
+# CONFIG_MFD_JANZ_CMODIO is not set
+# CONFIG_MFD_88PM800 is not set
+# CONFIG_MFD_88PM805 is not set
+# CONFIG_MFD_88PM860X is not set
+CONFIG_MFD_MAX17135=y
+# CONFIG_MFD_MAX77686 is not set
+# CONFIG_MFD_MAX77693 is not set
+# CONFIG_MFD_MAX8907 is not set
+# CONFIG_MFD_MAX8925 is not set
+# CONFIG_MFD_MAX8997 is not set
+# CONFIG_MFD_MAX8998 is not set
+# CONFIG_EZX_PCAP is not set
+# CONFIG_MFD_VIPERBOARD is not set
+# CONFIG_MFD_RETU is not set
+# CONFIG_MFD_PCF50633 is not set
+# CONFIG_MFD_RDC321X is not set
+# CONFIG_MFD_RTSX_PCI is not set
+# CONFIG_MFD_RC5T583 is not set
+# CONFIG_MFD_SEC_CORE is not set
+CONFIG_MFD_SI476X_CORE=y
+# CONFIG_MFD_SM501 is not set
+# CONFIG_MFD_SMSC is not set
+# CONFIG_ABX500_CORE is not set
+# CONFIG_MFD_STMPE is not set
+CONFIG_MFD_SYSCON=y
+# CONFIG_MFD_TI_AM335X_TSCADC is not set
+# CONFIG_MFD_LP8788 is not set
+# CONFIG_MFD_PALMAS is not set
+# CONFIG_TPS6105X is not set
+# CONFIG_TPS65010 is not set
+# CONFIG_TPS6507X is not set
+# CONFIG_MFD_TPS65090 is not set
+# CONFIG_MFD_TPS65217 is not set
+# CONFIG_MFD_TPS6586X is not set
+# CONFIG_MFD_TPS65910 is not set
+# CONFIG_MFD_TPS65912 is not set
+# CONFIG_MFD_TPS65912_I2C is not set
+# CONFIG_MFD_TPS65912_SPI is not set
+# CONFIG_MFD_TPS80031 is not set
+# CONFIG_TWL4030_CORE is not set
+# CONFIG_TWL6040_CORE is not set
+# CONFIG_MFD_WL1273_CORE is not set
+# CONFIG_MFD_LM3533 is not set
+# CONFIG_MFD_TIMBERDALE is not set
+# CONFIG_MFD_TC3589X is not set
+# CONFIG_MFD_TMIO is not set
+# CONFIG_MFD_T7L66XB is not set
+# CONFIG_MFD_TC6387XB is not set
+# CONFIG_MFD_TC6393XB is not set
+# CONFIG_MFD_VX855 is not set
+# CONFIG_MFD_ARIZONA_I2C is not set
+# CONFIG_MFD_ARIZONA_SPI is not set
+# CONFIG_MFD_WM8400 is not set
+# CONFIG_MFD_WM831X_I2C is not set
+# CONFIG_MFD_WM831X_SPI is not set
+# CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_WM8994 is not set
+CONFIG_REGULATOR=y
+# CONFIG_REGULATOR_DEBUG is not set
+CONFIG_REGULATOR_DUMMY=y
+CONFIG_REGULATOR_FIXED_VOLTAGE=y
+# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set
+# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set
+# CONFIG_REGULATOR_GPIO is not set
+# CONFIG_REGULATOR_AD5398 is not set
+CONFIG_REGULATOR_DA9052=y
+# CONFIG_REGULATOR_FAN53555 is not set
+CONFIG_REGULATOR_ANATOP=y
+CONFIG_REGULATOR_MC13XXX_CORE=y
+CONFIG_REGULATOR_MC13783=y
+CONFIG_REGULATOR_MC13892=y
+# CONFIG_REGULATOR_ISL6271A is not set
+# CONFIG_REGULATOR_MAX1586 is not set
+CONFIG_REGULATOR_MAX17135=y
+# CONFIG_REGULATOR_MAX8649 is not set
+# CONFIG_REGULATOR_MAX8660 is not set
+# CONFIG_REGULATOR_MAX8952 is not set
+# CONFIG_REGULATOR_MAX8973 is not set
+# CONFIG_REGULATOR_LP3971 is not set
+# CONFIG_REGULATOR_LP3972 is not set
+# CONFIG_REGULATOR_LP872X is not set
+# CONFIG_REGULATOR_LP8755 is not set
+CONFIG_REGULATOR_PFUZE100=y
+# CONFIG_REGULATOR_TPS51632 is not set
+# CONFIG_REGULATOR_TPS62360 is not set
+# CONFIG_REGULATOR_TPS65023 is not set
+# CONFIG_REGULATOR_TPS6507X is not set
+# CONFIG_REGULATOR_TPS6524X is not set
+CONFIG_MEDIA_SUPPORT=y
+
+#
+# Multimedia core support
+#
+CONFIG_MEDIA_CAMERA_SUPPORT=y
+# CONFIG_MEDIA_ANALOG_TV_SUPPORT is not set
+# CONFIG_MEDIA_DIGITAL_TV_SUPPORT is not set
+CONFIG_MEDIA_RADIO_SUPPORT=y
+# CONFIG_MEDIA_RC_SUPPORT is not set
+# CONFIG_MEDIA_CONTROLLER is not set
+CONFIG_VIDEO_DEV=y
+CONFIG_VIDEO_V4L2=y
+# CONFIG_VIDEO_ADV_DEBUG is not set
+# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set
+CONFIG_VIDEOBUF_GEN=y
+CONFIG_VIDEOBUF_DMA_CONTIG=y
+CONFIG_VIDEOBUF2_CORE=y
+CONFIG_VIDEOBUF2_MEMOPS=y
+CONFIG_VIDEOBUF2_DMA_CONTIG=y
+CONFIG_VIDEOBUF2_VMALLOC=m
+CONFIG_VIDEO_V4L2_INT_DEVICE=y
+# CONFIG_TTPCI_EEPROM is not set
+
+#
+# Media drivers
+#
+CONFIG_MEDIA_USB_SUPPORT=y
+
+#
+# Webcam devices
+#
+CONFIG_USB_VIDEO_CLASS=m
+CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y
+CONFIG_USB_GSPCA=m
+# CONFIG_USB_M5602 is not set
+# CONFIG_USB_STV06XX is not set
+# CONFIG_USB_GL860 is not set
+# CONFIG_USB_GSPCA_BENQ is not set
+# CONFIG_USB_GSPCA_CONEX is not set
+# CONFIG_USB_GSPCA_CPIA1 is not set
+# CONFIG_USB_GSPCA_ETOMS is not set
+# CONFIG_USB_GSPCA_FINEPIX is not set
+# CONFIG_USB_GSPCA_JEILINJ is not set
+# CONFIG_USB_GSPCA_JL2005BCD is not set
+# CONFIG_USB_GSPCA_KINECT is not set
+# CONFIG_USB_GSPCA_KONICA is not set
+# CONFIG_USB_GSPCA_MARS is not set
+# CONFIG_USB_GSPCA_MR97310A is not set
+# CONFIG_USB_GSPCA_NW80X is not set
+# CONFIG_USB_GSPCA_OV519 is not set
+# CONFIG_USB_GSPCA_OV534 is not set
+# CONFIG_USB_GSPCA_OV534_9 is not set
+# CONFIG_USB_GSPCA_PAC207 is not set
+# CONFIG_USB_GSPCA_PAC7302 is not set
+# CONFIG_USB_GSPCA_PAC7311 is not set
+# CONFIG_USB_GSPCA_SE401 is not set
+# CONFIG_USB_GSPCA_SN9C2028 is not set
+# CONFIG_USB_GSPCA_SN9C20X is not set
+# CONFIG_USB_GSPCA_SONIXB is not set
+# CONFIG_USB_GSPCA_SONIXJ is not set
+# CONFIG_USB_GSPCA_SPCA500 is not set
+# CONFIG_USB_GSPCA_SPCA501 is not set
+# CONFIG_USB_GSPCA_SPCA505 is not set
+# CONFIG_USB_GSPCA_SPCA506 is not set
+# CONFIG_USB_GSPCA_SPCA508 is not set
+# CONFIG_USB_GSPCA_SPCA561 is not set
+# CONFIG_USB_GSPCA_SPCA1528 is not set
+# CONFIG_USB_GSPCA_SQ905 is not set
+# CONFIG_USB_GSPCA_SQ905C is not set
+# CONFIG_USB_GSPCA_SQ930X is not set
+# CONFIG_USB_GSPCA_STK014 is not set
+# CONFIG_USB_GSPCA_STV0680 is not set
+# CONFIG_USB_GSPCA_SUNPLUS is not set
+# CONFIG_USB_GSPCA_T613 is not set
+# CONFIG_USB_GSPCA_TOPRO is not set
+# CONFIG_USB_GSPCA_TV8532 is not set
+# CONFIG_USB_GSPCA_VC032X is not set
+# CONFIG_USB_GSPCA_VICAM is not set
+# CONFIG_USB_GSPCA_XIRLINK_CIT is not set
+# CONFIG_USB_GSPCA_ZC3XX is not set
+# CONFIG_USB_PWC is not set
+# CONFIG_VIDEO_CPIA2 is not set
+# CONFIG_USB_ZR364XX is not set
+# CONFIG_USB_STKWEBCAM is not set
+# CONFIG_USB_S2255 is not set
+# CONFIG_USB_SN9C102 is not set
+
+#
+# Webcam, TV (analog/digital) USB devices
+#
+# CONFIG_VIDEO_EM28XX is not set
+# CONFIG_MEDIA_PCI_SUPPORT is not set
+CONFIG_V4L_PLATFORM_DRIVERS=y
+# CONFIG_VIDEO_CAFE_CCIC is not set
+# CONFIG_VIDEO_TIMBERDALE is not set
+CONFIG_VIDEO_MXC_OUTPUT=y
+CONFIG_VIDEO_MXC_CAPTURE=m
+
+#
+# MXC Camera/V4L2 PRP Features support
+#
+CONFIG_VIDEO_MXC_IPU_CAMERA=y
+CONFIG_VIDEO_MXC_CSI_CAMERA=m
+CONFIG_MXC_CAMERA_OV5640=m
+CONFIG_MXC_CAMERA_OV5642=m
+CONFIG_MXC_CAMERA_OV5640_MIPI=m
+CONFIG_MXC_TVIN_ADV7180=m
+CONFIG_MXC_IPU_DEVICE_QUEUE_SDC=m
+CONFIG_MXC_IPU_PRP_ENC=m
+CONFIG_MXC_IPU_CSI_ENC=m
+CONFIG_VIDEO_MXC_IPU_OUTPUT=y
+CONFIG_VIDEO_MXC_PXP_V4L2=y
+CONFIG_SOC_CAMERA=y
+# CONFIG_SOC_CAMERA_PLATFORM is not set
+CONFIG_MX3_VIDEO=y
+CONFIG_VIDEO_MX3=y
+# CONFIG_VIDEO_SH_MOBILE_CSI2 is not set
+# CONFIG_VIDEO_SH_MOBILE_CEU is not set
+# CONFIG_V4L_MEM2MEM_DRIVERS is not set
+# CONFIG_V4L_TEST_DRIVERS is not set
+
+#
+# Supported MMC/SDIO adapters
+#
+CONFIG_RADIO_ADAPTERS=y
+# CONFIG_RADIO_SI470X is not set
+CONFIG_RADIO_SI476X=y
+# CONFIG_USB_MR800 is not set
+# CONFIG_USB_DSBR is not set
+# CONFIG_RADIO_MAXIRADIO is not set
+# CONFIG_RADIO_SHARK is not set
+# CONFIG_RADIO_SHARK2 is not set
+# CONFIG_I2C_SI4713 is not set
+# CONFIG_RADIO_SI4713 is not set
+# CONFIG_USB_KEENE is not set
+# CONFIG_USB_MA901 is not set
+# CONFIG_RADIO_TEA5764 is not set
+# CONFIG_RADIO_SAA7706H is not set
+# CONFIG_RADIO_TEF6862 is not set
+# CONFIG_RADIO_WL1273 is not set
+
+#
+# Texas Instruments WL128x FM driver (ST based)
+#
+# CONFIG_CYPRESS_FIRMWARE is not set
+
+#
+# Media ancillary drivers (tuners, sensors, i2c, frontends)
+#
+CONFIG_MEDIA_SUBDRV_AUTOSELECT=y
+CONFIG_MEDIA_ATTACH=y
+
+#
+# Audio decoders, processors and mixers
+#
+
+#
+# RDS decoders
+#
+
+#
+# Video decoders
+#
+
+#
+# Video and audio decoders
+#
+
+#
+# Video encoders
+#
+
+#
+# Camera sensor devices
+#
+
+#
+# Flash devices
+#
+
+#
+# Video improvement chips
+#
+
+#
+# Miscelaneous helper chips
+#
+
+#
+# Sensors used on soc_camera driver
+#
+
+#
+# soc_camera sensor drivers
+#
+# CONFIG_SOC_CAMERA_IMX074 is not set
+# CONFIG_SOC_CAMERA_MT9M001 is not set
+# CONFIG_SOC_CAMERA_MT9M111 is not set
+# CONFIG_SOC_CAMERA_MT9T031 is not set
+# CONFIG_SOC_CAMERA_MT9T112 is not set
+# CONFIG_SOC_CAMERA_MT9V022 is not set
+CONFIG_SOC_CAMERA_OV2640=y
+# CONFIG_SOC_CAMERA_OV5642 is not set
+# CONFIG_SOC_CAMERA_OV6650 is not set
+# CONFIG_SOC_CAMERA_OV772X is not set
+# CONFIG_SOC_CAMERA_OV9640 is not set
+# CONFIG_SOC_CAMERA_OV9740 is not set
+# CONFIG_SOC_CAMERA_RJ54N1 is not set
+# CONFIG_SOC_CAMERA_TW9910 is not set
+CONFIG_MEDIA_TUNER=y
+CONFIG_MEDIA_TUNER_SIMPLE=y
+CONFIG_MEDIA_TUNER_TDA8290=y
+CONFIG_MEDIA_TUNER_TDA827X=y
+CONFIG_MEDIA_TUNER_TDA18271=y
+CONFIG_MEDIA_TUNER_TDA9887=y
+CONFIG_MEDIA_TUNER_TEA5761=y
+CONFIG_MEDIA_TUNER_TEA5767=y
+CONFIG_MEDIA_TUNER_MT20XX=y
+CONFIG_MEDIA_TUNER_XC2028=y
+CONFIG_MEDIA_TUNER_XC5000=y
+CONFIG_MEDIA_TUNER_XC4000=y
+CONFIG_MEDIA_TUNER_MC44S803=y
+
+#
+# Tools to develop new frontends
+#
+# CONFIG_DVB_DUMMY_FE is not set
+
+#
+# Graphics support
+#
+CONFIG_VGA_ARB=y
+CONFIG_VGA_ARB_MAX_GPUS=16
+CONFIG_DRM=y
+# CONFIG_DRM_TDFX is not set
+# CONFIG_DRM_R128 is not set
+# CONFIG_DRM_RADEON is not set
+# CONFIG_DRM_NOUVEAU is not set
+# CONFIG_DRM_MGA is not set
+# CONFIG_DRM_VIA is not set
+# CONFIG_DRM_SAVAGE is not set
+CONFIG_DRM_VIVANTE=y
+# CONFIG_DRM_EXYNOS is not set
+# CONFIG_DRM_VMWGFX is not set
+# CONFIG_DRM_UDL is not set
+# CONFIG_DRM_AST is not set
+# CONFIG_DRM_MGAG200 is not set
+# CONFIG_DRM_CIRRUS_QEMU is not set
+# CONFIG_DRM_TILCDC is not set
+# CONFIG_DRM_QXL is not set
+# CONFIG_TEGRA_HOST1X is not set
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+CONFIG_VIDEOMODE_HELPERS=y
+CONFIG_HDMI=y
+CONFIG_FB=y
+# CONFIG_FIRMWARE_EDID is not set
+# CONFIG_FB_DDC is not set
+# CONFIG_FB_BOOT_VESA_SUPPORT is not set
+CONFIG_FB_CFB_FILLRECT=y
+CONFIG_FB_CFB_COPYAREA=y
+CONFIG_FB_CFB_IMAGEBLIT=y
+# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
+# CONFIG_FB_SYS_FILLRECT is not set
+# CONFIG_FB_SYS_COPYAREA is not set
+# CONFIG_FB_SYS_IMAGEBLIT is not set
+# CONFIG_FB_FOREIGN_ENDIAN is not set
+# CONFIG_FB_SYS_FOPS is not set
+CONFIG_FB_DEFERRED_IO=y
+# CONFIG_FB_SVGALIB is not set
+# CONFIG_FB_MACMODES is not set
+# CONFIG_FB_BACKLIGHT is not set
+CONFIG_FB_MODE_HELPERS=y
+# CONFIG_FB_TILEBLITTING is not set
+
+#
+# Frame buffer hardware drivers
+#
+# CONFIG_FB_CIRRUS is not set
+# CONFIG_FB_PM2 is not set
+# CONFIG_FB_CYBER2000 is not set
+# CONFIG_FB_ASILIANT is not set
+# CONFIG_FB_IMSTT is not set
+# CONFIG_FB_UVESA is not set
+# CONFIG_FB_S1D13XXX is not set
+# CONFIG_FB_NVIDIA is not set
+# CONFIG_FB_RIVA is not set
+# CONFIG_FB_I740 is not set
+# CONFIG_FB_MATROX is not set
+# CONFIG_FB_RADEON is not set
+# CONFIG_FB_ATY128 is not set
+# CONFIG_FB_ATY is not set
+# CONFIG_FB_S3 is not set
+# CONFIG_FB_SAVAGE is not set
+# CONFIG_FB_SIS is not set
+# CONFIG_FB_NEOMAGIC is not set
+# CONFIG_FB_KYRO is not set
+# CONFIG_FB_3DFX is not set
+# CONFIG_FB_VOODOO1 is not set
+# CONFIG_FB_VT8623 is not set
+# CONFIG_FB_TRIDENT is not set
+# CONFIG_FB_ARK is not set
+# CONFIG_FB_PM3 is not set
+# CONFIG_FB_CARMINE is not set
+# CONFIG_FB_TMIO is not set
+# CONFIG_FB_SMSCUFX is not set
+# CONFIG_FB_UDL is not set
+# CONFIG_FB_GOLDFISH is not set
+# CONFIG_FB_VIRTUAL is not set
+# CONFIG_FB_METRONOME is not set
+# CONFIG_FB_MB862XX is not set
+CONFIG_FB_MX3=y
+# CONFIG_FB_BROADSHEET is not set
+# CONFIG_FB_AUO_K190X is not set
+CONFIG_FB_MXS=y
+# CONFIG_FB_SIMPLE is not set
+# CONFIG_EXYNOS_VIDEO is not set
+CONFIG_BACKLIGHT_LCD_SUPPORT=y
+CONFIG_LCD_CLASS_DEVICE=y
+CONFIG_LCD_L4F00242T03=y
+# CONFIG_LCD_LMS283GF05 is not set
+# CONFIG_LCD_LTV350QV is not set
+# CONFIG_LCD_ILI922X is not set
+# CONFIG_LCD_ILI9320 is not set
+# CONFIG_LCD_TDO24M is not set
+# CONFIG_LCD_VGG2432A4 is not set
+CONFIG_LCD_PLATFORM=y
+# CONFIG_LCD_S6E63M0 is not set
+# CONFIG_LCD_LD9040 is not set
+# CONFIG_LCD_AMS369FG06 is not set
+# CONFIG_LCD_LMS501KF03 is not set
+# CONFIG_LCD_HX8357 is not set
+CONFIG_BACKLIGHT_CLASS_DEVICE=y
+CONFIG_BACKLIGHT_GENERIC=y
+CONFIG_BACKLIGHT_PWM=y
+# CONFIG_BACKLIGHT_DA9052 is not set
+# CONFIG_BACKLIGHT_ADP8860 is not set
+# CONFIG_BACKLIGHT_ADP8870 is not set
+# CONFIG_BACKLIGHT_LM3630 is not set
+# CONFIG_BACKLIGHT_LM3639 is not set
+# CONFIG_BACKLIGHT_LP855X is not set
+CONFIG_FB_MXC=y
+CONFIG_FB_MXC_SYNC_PANEL=y
+CONFIG_FB_MXC_LDB=y
+CONFIG_FB_MXC_MIPI_DSI=y
+CONFIG_FB_MXC_TRULY_WVGA_SYNC_PANEL=y
+CONFIG_FB_MXC_HDMI=y
+CONFIG_FB_MXC_EDID=y
+CONFIG_FB_MXC_EINK_PANEL=y
+# CONFIG_FB_MXC_EINK_AUTO_UPDATE_MODE is not set
+CONFIG_FB_MXS_SII902X=y
+CONFIG_HANNSTAR_CABC=y
+
+#
+# Console display driver support
+#
+CONFIG_DUMMY_CONSOLE=y
+CONFIG_FRAMEBUFFER_CONSOLE=y
+CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
+# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
+CONFIG_FONTS=y
+CONFIG_FONT_8x8=y
+CONFIG_FONT_8x16=y
+# CONFIG_FONT_6x11 is not set
+# CONFIG_FONT_7x14 is not set
+# CONFIG_FONT_PEARL_8x8 is not set
+# CONFIG_FONT_ACORN_8x8 is not set
+# CONFIG_FONT_MINI_4x6 is not set
+# CONFIG_FONT_SUN8x16 is not set
+# CONFIG_FONT_SUN12x22 is not set
+# CONFIG_FONT_10x18 is not set
+CONFIG_LOGO=y
+CONFIG_LOGO_LINUX_MONO=y
+CONFIG_LOGO_LINUX_VGA16=y
+CONFIG_LOGO_LINUX_CLUT224=y
+# CONFIG_FB_SSD1307 is not set
+CONFIG_SOUND=y
+# CONFIG_SOUND_OSS_CORE is not set
+CONFIG_SND=y
+CONFIG_SND_TIMER=y
+CONFIG_SND_PCM=y
+CONFIG_SND_HWDEP=m
+CONFIG_SND_RAWMIDI=m
+CONFIG_SND_COMPRESS_OFFLOAD=y
+CONFIG_SND_JACK=y
+# CONFIG_SND_SEQUENCER is not set
+# CONFIG_SND_MIXER_OSS is not set
+# CONFIG_SND_PCM_OSS is not set
+# CONFIG_SND_HRTIMER is not set
+# CONFIG_SND_DYNAMIC_MINORS is not set
+CONFIG_SND_SUPPORT_OLD_API=y
+CONFIG_SND_VERBOSE_PROCFS=y
+# CONFIG_SND_VERBOSE_PRINTK is not set
+# CONFIG_SND_DEBUG is not set
+# CONFIG_SND_RAWMIDI_SEQ is not set
+# CONFIG_SND_OPL3_LIB_SEQ is not set
+# CONFIG_SND_OPL4_LIB_SEQ is not set
+# CONFIG_SND_SBAWE_SEQ is not set
+# CONFIG_SND_EMU10K1_SEQ is not set
+CONFIG_SND_DRIVERS=y
+# CONFIG_SND_DUMMY is not set
+# CONFIG_SND_ALOOP is not set
+# CONFIG_SND_MTPAV is not set
+# CONFIG_SND_SERIAL_U16550 is not set
+# CONFIG_SND_MPU401 is not set
+CONFIG_SND_PCI=y
+# CONFIG_SND_AD1889 is not set
+# CONFIG_SND_ALS300 is not set
+# CONFIG_SND_ALI5451 is not set
+# CONFIG_SND_ATIIXP is not set
+# CONFIG_SND_ATIIXP_MODEM is not set
+# CONFIG_SND_AU8810 is not set
+# CONFIG_SND_AU8820 is not set
+# CONFIG_SND_AU8830 is not set
+# CONFIG_SND_AW2 is not set
+# CONFIG_SND_AZT3328 is not set
+# CONFIG_SND_BT87X is not set
+# CONFIG_SND_CA0106 is not set
+# CONFIG_SND_CMIPCI is not set
+# CONFIG_SND_OXYGEN is not set
+# CONFIG_SND_CS4281 is not set
+# CONFIG_SND_CS46XX is not set
+# CONFIG_SND_CS5535AUDIO is not set
+# CONFIG_SND_CTXFI is not set
+# CONFIG_SND_DARLA20 is not set
+# CONFIG_SND_GINA20 is not set
+# CONFIG_SND_LAYLA20 is not set
+# CONFIG_SND_DARLA24 is not set
+# CONFIG_SND_GINA24 is not set
+# CONFIG_SND_LAYLA24 is not set
+# CONFIG_SND_MONA is not set
+# CONFIG_SND_MIA is not set
+# CONFIG_SND_ECHO3G is not set
+# CONFIG_SND_INDIGO is not set
+# CONFIG_SND_INDIGOIO is not set
+# CONFIG_SND_INDIGODJ is not set
+# CONFIG_SND_INDIGOIOX is not set
+# CONFIG_SND_INDIGODJX is not set
+# CONFIG_SND_EMU10K1 is not set
+# CONFIG_SND_EMU10K1X is not set
+# CONFIG_SND_ENS1370 is not set
+# CONFIG_SND_ENS1371 is not set
+# CONFIG_SND_ES1938 is not set
+# CONFIG_SND_ES1968 is not set
+# CONFIG_SND_FM801 is not set
+# CONFIG_SND_HDA_INTEL is not set
+# CONFIG_SND_HDSP is not set
+# CONFIG_SND_HDSPM is not set
+# CONFIG_SND_ICE1712 is not set
+# CONFIG_SND_ICE1724 is not set
+# CONFIG_SND_INTEL8X0 is not set
+# CONFIG_SND_INTEL8X0M is not set
+# CONFIG_SND_KORG1212 is not set
+# CONFIG_SND_LOLA is not set
+# CONFIG_SND_LX6464ES is not set
+# CONFIG_SND_MAESTRO3 is not set
+# CONFIG_SND_MIXART is not set
+# CONFIG_SND_NM256 is not set
+# CONFIG_SND_PCXHR is not set
+# CONFIG_SND_RIPTIDE is not set
+# CONFIG_SND_RME32 is not set
+# CONFIG_SND_RME96 is not set
+# CONFIG_SND_RME9652 is not set
+# CONFIG_SND_SONICVIBES is not set
+# CONFIG_SND_TRIDENT is not set
+# CONFIG_SND_VIA82XX is not set
+# CONFIG_SND_VIA82XX_MODEM is not set
+# CONFIG_SND_VIRTUOSO is not set
+# CONFIG_SND_VX222 is not set
+# CONFIG_SND_YMFPCI is not set
+CONFIG_SND_ARM=y
+CONFIG_SND_SPI=y
+CONFIG_SND_USB=y
+CONFIG_SND_USB_AUDIO=m
+# CONFIG_SND_USB_UA101 is not set
+# CONFIG_SND_USB_CAIAQ is not set
+# CONFIG_SND_USB_6FIRE is not set
+CONFIG_SND_SOC=y
+CONFIG_SND_SOC_DMAENGINE_PCM=y
+CONFIG_SND_SOC_GENERIC_DMAENGINE_PCM=y
+# CONFIG_SND_ATMEL_SOC is not set
+# CONFIG_SND_DESIGNWARE_I2S is not set
+CONFIG_SND_SOC_FSL_SSI=y
+CONFIG_SND_SOC_FSL_ASRC=y
+CONFIG_SND_SOC_FSL_ESAI=y
+CONFIG_SND_SOC_FSL_SPDIF=y
+CONFIG_SND_SOC_FSL_HDMI=y
+CONFIG_SND_SOC_FSL_UTILS=y
+CONFIG_SND_IMX_SOC=y
+CONFIG_SND_SOC_IMX_SSI=y
+CONFIG_SND_SOC_IMX_PCM_FIQ=y
+CONFIG_SND_SOC_IMX_PCM_DMA=y
+CONFIG_SND_SOC_IMX_HDMI_DMA=y
+CONFIG_SND_SOC_IMX_AUDMUX=y
+CONFIG_SND_SOC_EUKREA_TLV320=y
+CONFIG_SND_SOC_IMX_CS42888=y
+CONFIG_SND_SOC_IMX_WM8731=y
+CONFIG_SND_SOC_IMX_WM8962=y
+CONFIG_SND_SOC_IMX_SGTL5000=y
+CONFIG_SND_SOC_IMX_SPDIF=y
+CONFIG_SND_SOC_IMX_MC13783=y
+CONFIG_SND_SOC_IMX_HDMI=y
+CONFIG_SND_SOC_IMX_SI476X=y
+CONFIG_SND_SOC_I2C_AND_SPI=y
+# CONFIG_SND_SOC_ALL_CODECS is not set
+CONFIG_SND_SOC_CS42888=y
+CONFIG_SND_SOC_OMAP_HDMI_CODEC=y
+CONFIG_SND_SOC_SGTL5000=y
+CONFIG_SND_SOC_SI476X=y
+CONFIG_SND_SOC_SPDIF=y
+CONFIG_SND_SOC_TLV320AIC23=y
+CONFIG_SND_SOC_WM8731=y
+CONFIG_SND_SOC_WM8962=y
+CONFIG_SND_SOC_MC13783=y
+# CONFIG_SND_SIMPLE_CARD is not set
+# CONFIG_SOUND_PRIME is not set
+
+#
+# HID support
+#
+CONFIG_HID=y
+# CONFIG_HID_BATTERY_STRENGTH is not set
+# CONFIG_HIDRAW is not set
+# CONFIG_UHID is not set
+CONFIG_HID_GENERIC=y
+
+#
+# Special HID drivers
+#
+# CONFIG_HID_A4TECH is not set
+# CONFIG_HID_ACRUX is not set
+# CONFIG_HID_APPLE is not set
+# CONFIG_HID_APPLEIR is not set
+# CONFIG_HID_AUREAL is not set
+# CONFIG_HID_BELKIN is not set
+# CONFIG_HID_CHERRY is not set
+# CONFIG_HID_CHICONY is not set
+# CONFIG_HID_PRODIKEYS is not set
+# CONFIG_HID_CYPRESS is not set
+# CONFIG_HID_DRAGONRISE is not set
+# CONFIG_HID_EMS_FF is not set
+# CONFIG_HID_ELECOM is not set
+# CONFIG_HID_EZKEY is not set
+# CONFIG_HID_HOLTEK is not set
+# CONFIG_HID_KEYTOUCH is not set
+# CONFIG_HID_KYE is not set
+# CONFIG_HID_UCLOGIC is not set
+# CONFIG_HID_WALTOP is not set
+# CONFIG_HID_GYRATION is not set
+# CONFIG_HID_ICADE is not set
+# CONFIG_HID_TWINHAN is not set
+# CONFIG_HID_KENSINGTON is not set
+# CONFIG_HID_LCPOWER is not set
+# CONFIG_HID_LENOVO_TPKBD is not set
+# CONFIG_HID_LOGITECH is not set
+# CONFIG_HID_MAGICMOUSE is not set
+# CONFIG_HID_MICROSOFT is not set
+# CONFIG_HID_MONTEREY is not set
+# CONFIG_HID_MULTITOUCH is not set
+# CONFIG_HID_NTRIG is not set
+# CONFIG_HID_ORTEK is not set
+# CONFIG_HID_PANTHERLORD is not set
+# CONFIG_HID_PETALYNX is not set
+# CONFIG_HID_PICOLCD is not set
+# CONFIG_HID_PRIMAX is not set
+# CONFIG_HID_PS3REMOTE is not set
+# CONFIG_HID_ROCCAT is not set
+# CONFIG_HID_SAITEK is not set
+# CONFIG_HID_SAMSUNG is not set
+# CONFIG_HID_SONY is not set
+# CONFIG_HID_SPEEDLINK is not set
+# CONFIG_HID_STEELSERIES is not set
+# CONFIG_HID_SUNPLUS is not set
+# CONFIG_HID_GREENASIA is not set
+# CONFIG_HID_SMARTJOYPLUS is not set
+# CONFIG_HID_TIVO is not set
+# CONFIG_HID_TOPSEED is not set
+# CONFIG_HID_THINGM is not set
+# CONFIG_HID_THRUSTMASTER is not set
+# CONFIG_HID_WACOM is not set
+# CONFIG_HID_WIIMOTE is not set
+# CONFIG_HID_ZEROPLUS is not set
+# CONFIG_HID_ZYDACRON is not set
+# CONFIG_HID_SENSOR_HUB is not set
+
+#
+# USB HID support
+#
+CONFIG_USB_HID=y
+# CONFIG_HID_PID is not set
+# CONFIG_USB_HIDDEV is not set
+
+#
+# I2C HID support
+#
+# CONFIG_I2C_HID is not set
+CONFIG_USB_ARCH_HAS_OHCI=y
+CONFIG_USB_ARCH_HAS_EHCI=y
+CONFIG_USB_ARCH_HAS_XHCI=y
+CONFIG_USB_SUPPORT=y
+CONFIG_USB_COMMON=y
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB=y
+# CONFIG_USB_DEBUG is not set
+# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set
+
+#
+# Miscellaneous USB options
+#
+CONFIG_USB_DEFAULT_PERSIST=y
+# CONFIG_USB_DYNAMIC_MINORS is not set
+CONFIG_USB_OTG=y
+CONFIG_USB_OTG_WHITELIST=y
+# CONFIG_USB_OTG_BLACKLIST_HUB is not set
+# CONFIG_USB_MON is not set
+# CONFIG_USB_WUSB_CBAF is not set
+
+#
+# USB Host Controller Drivers
+#
+# CONFIG_USB_C67X00_HCD is not set
+# CONFIG_USB_XHCI_HCD is not set
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_ROOT_HUB_TT=y
+CONFIG_USB_EHCI_TT_NEWSCHED=y
+CONFIG_USB_FSL_MPH_DR_OF=y
+CONFIG_USB_EHCI_PCI=y
+CONFIG_USB_EHCI_MXC=y
+CONFIG_USB_EHCI_HCD_PLATFORM=y
+# CONFIG_USB_OXU210HP_HCD is not set
+# CONFIG_USB_ISP116X_HCD is not set
+# CONFIG_USB_ISP1760_HCD is not set
+# CONFIG_USB_ISP1362_HCD is not set
+# CONFIG_USB_OHCI_HCD is not set
+# CONFIG_USB_UHCI_HCD is not set
+# CONFIG_USB_SL811_HCD is not set
+# CONFIG_USB_R8A66597_HCD is not set
+# CONFIG_USB_IMX21_HCD is not set
+# CONFIG_USB_MUSB_HDRC is not set
+# CONFIG_USB_RENESAS_USBHS is not set
+
+#
+# USB Device Class drivers
+#
+# CONFIG_USB_ACM is not set
+# CONFIG_USB_PRINTER is not set
+# CONFIG_USB_WDM is not set
+# CONFIG_USB_TMC is not set
+
+#
+# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
+#
+
+#
+# also be needed; see USB_STORAGE Help for more info
+#
+CONFIG_USB_STORAGE=y
+# CONFIG_USB_STORAGE_DEBUG is not set
+# CONFIG_USB_STORAGE_REALTEK is not set
+# CONFIG_USB_STORAGE_DATAFAB is not set
+# CONFIG_USB_STORAGE_FREECOM is not set
+# CONFIG_USB_STORAGE_ISD200 is not set
+# CONFIG_USB_STORAGE_USBAT is not set
+# CONFIG_USB_STORAGE_SDDR09 is not set
+# CONFIG_USB_STORAGE_SDDR55 is not set
+# CONFIG_USB_STORAGE_JUMPSHOT is not set
+# CONFIG_USB_STORAGE_ALAUDA is not set
+# CONFIG_USB_STORAGE_ONETOUCH is not set
+# CONFIG_USB_STORAGE_KARMA is not set
+# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
+# CONFIG_USB_STORAGE_ENE_UB6250 is not set
+
+#
+# USB Imaging devices
+#
+# CONFIG_USB_MDC800 is not set
+# CONFIG_USB_MICROTEK is not set
+# CONFIG_USB_DWC3 is not set
+CONFIG_USB_CHIPIDEA=y
+CONFIG_USB_CHIPIDEA_UDC=y
+CONFIG_USB_CHIPIDEA_HOST=y
+# CONFIG_USB_CHIPIDEA_DEBUG is not set
+
+#
+# USB port drivers
+#
+# CONFIG_USB_SERIAL is not set
+
+#
+# USB Miscellaneous drivers
+#
+# CONFIG_USB_EMI62 is not set
+# CONFIG_USB_EMI26 is not set
+# CONFIG_USB_ADUTUX is not set
+# CONFIG_USB_SEVSEG is not set
+# CONFIG_USB_RIO500 is not set
+# CONFIG_USB_LEGOTOWER is not set
+# CONFIG_USB_LCD is not set
+# CONFIG_USB_LED is not set
+# CONFIG_USB_CYPRESS_CY7C63 is not set
+# CONFIG_USB_CYTHERM is not set
+# CONFIG_USB_IDMOUSE is not set
+# CONFIG_USB_FTDI_ELAN is not set
+# CONFIG_USB_APPLEDISPLAY is not set
+# CONFIG_USB_SISUSBVGA is not set
+# CONFIG_USB_LD is not set
+# CONFIG_USB_TRANCEVIBRATOR is not set
+# CONFIG_USB_IOWARRIOR is not set
+# CONFIG_USB_TEST is not set
+# CONFIG_USB_ISIGHTFW is not set
+# CONFIG_USB_YUREX is not set
+# CONFIG_USB_EZUSB_FX2 is not set
+# CONFIG_USB_HSIC_USB3503 is not set
+CONFIG_USB_PHY=y
+CONFIG_NOP_USB_XCEIV=y
+# CONFIG_OMAP_CONTROL_USB is not set
+# CONFIG_OMAP_USB3 is not set
+# CONFIG_SAMSUNG_USBPHY is not set
+# CONFIG_SAMSUNG_USB2PHY is not set
+# CONFIG_SAMSUNG_USB3PHY is not set
+# CONFIG_USB_GPIO_VBUS is not set
+# CONFIG_USB_ISP1301 is not set
+CONFIG_USB_MXS_PHY=y
+# CONFIG_USB_RCAR_PHY is not set
+# CONFIG_USB_ULPI is not set
+CONFIG_USB_GADGET=y
+# CONFIG_USB_GADGET_DEBUG is not set
+# CONFIG_USB_GADGET_DEBUG_FILES is not set
+# CONFIG_USB_GADGET_DEBUG_FS is not set
+CONFIG_USB_GADGET_VBUS_DRAW=2
+CONFIG_USB_GADGET_STORAGE_NUM_BUFFERS=2
+
+#
+# USB Peripheral Controller
+#
+CONFIG_USB_FSL_USB2=y
+# CONFIG_USB_FUSB300 is not set
+# CONFIG_USB_R8A66597 is not set
+# CONFIG_USB_PXA27X is not set
+# CONFIG_USB_MV_UDC is not set
+# CONFIG_USB_MV_U3D is not set
+# CONFIG_USB_M66592 is not set
+# CONFIG_USB_AMD5536UDC is not set
+# CONFIG_USB_NET2272 is not set
+# CONFIG_USB_NET2280 is not set
+# CONFIG_USB_GOKU is not set
+# CONFIG_USB_EG20T is not set
+# CONFIG_USB_DUMMY_HCD is not set
+CONFIG_USB_LIBCOMPOSITE=m
+CONFIG_USB_F_ACM=m
+CONFIG_USB_F_SS_LB=m
+CONFIG_USB_U_SERIAL=m
+CONFIG_USB_F_SERIAL=m
+CONFIG_USB_F_OBEX=m
+CONFIG_USB_ZERO=m
+# CONFIG_USB_ZERO_HNPTEST is not set
+CONFIG_USB_AUDIO=m
+# CONFIG_GADGET_UAC1 is not set
+CONFIG_USB_ETH=m
+CONFIG_USB_ETH_RNDIS=y
+# CONFIG_USB_ETH_EEM is not set
+# CONFIG_USB_G_NCM is not set
+# CONFIG_USB_GADGETFS is not set
+# CONFIG_USB_FUNCTIONFS is not set
+CONFIG_USB_MASS_STORAGE=m
+# CONFIG_FSL_UTP is not set
+CONFIG_USB_G_SERIAL=m
+# CONFIG_USB_MIDI_GADGET is not set
+# CONFIG_USB_G_PRINTER is not set
+# CONFIG_USB_CDC_COMPOSITE is not set
+# CONFIG_USB_G_ACM_MS is not set
+# CONFIG_USB_G_MULTI is not set
+# CONFIG_USB_G_HID is not set
+# CONFIG_USB_G_DBGP is not set
+# CONFIG_USB_G_WEBCAM is not set
+# CONFIG_UWB is not set
+CONFIG_MMC=y
+# CONFIG_MMC_DEBUG is not set
+CONFIG_MMC_UNSAFE_RESUME=y
+# CONFIG_MMC_CLKGATE is not set
+
+#
+# MMC/SD/SDIO Card Drivers
+#
+CONFIG_MMC_BLOCK=y
+CONFIG_MMC_BLOCK_MINORS=8
+CONFIG_MMC_BLOCK_BOUNCE=y
+# CONFIG_SDIO_UART is not set
+# CONFIG_MMC_TEST is not set
+
+#
+# MMC/SD/SDIO Host Controller Drivers
+#
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_IO_ACCESSORS=y
+# CONFIG_MMC_SDHCI_PCI is not set
+CONFIG_MMC_SDHCI_PLTFM=y
+CONFIG_MMC_SDHCI_ESDHC_IMX=y
+# CONFIG_MMC_SDHCI_PXAV3 is not set
+# CONFIG_MMC_SDHCI_PXAV2 is not set
+# CONFIG_MMC_MXC is not set
+# CONFIG_MMC_TIFM_SD is not set
+# CONFIG_MMC_CB710 is not set
+# CONFIG_MMC_VIA_SDMMC is not set
+# CONFIG_MMC_DW is not set
+# CONFIG_MMC_VUB300 is not set
+# CONFIG_MMC_USHC is not set
+# CONFIG_MEMSTICK is not set
+
+#
+# MXC support drivers
+#
+CONFIG_MXC_IPU=y
+
+#
+# MXC Vivante GPU support
+#
+CONFIG_MXC_GPU_VIV=y
+CONFIG_MXC_IPU_V3=y
+
+#
+# MXC Asynchronous Sample Rate Converter support
+#
+CONFIG_MXC_ASRC=y
+
+#
+# MXC VPU(Video Processing Unit) support
+#
+CONFIG_MXC_VPU=y
+# CONFIG_MXC_VPU_DEBUG is not set
+# CONFIG_MX6_VPU_352M is not set
+
+#
+# MXC HDMI CEC (Consumer Electronics Control) support
+#
+# CONFIG_MXC_HDMI_CEC is not set
+
+#
+# MXC MIPI Support
+#
+CONFIG_MXC_MIPI_CSI2=y
+
+#
+# MXC Media Local Bus Driver
+#
+CONFIG_MXC_MLB=y
+CONFIG_MXC_MLB150=m
+CONFIG_LEDS_GPIO_REGISTER=y
+CONFIG_NEW_LEDS=y
+CONFIG_LEDS_CLASS=y
+
+#
+# LED drivers
+#
+# CONFIG_LEDS_LM3530 is not set
+# CONFIG_LEDS_LM3642 is not set
+# CONFIG_LEDS_PCA9532 is not set
+CONFIG_LEDS_GPIO=y
+# CONFIG_LEDS_LP3944 is not set
+# CONFIG_LEDS_LP5521 is not set
+# CONFIG_LEDS_LP5523 is not set
+# CONFIG_LEDS_LP5562 is not set
+# CONFIG_LEDS_PCA955X is not set
+# CONFIG_LEDS_PCA9633 is not set
+# CONFIG_LEDS_DA9052 is not set
+# CONFIG_LEDS_DAC124S085 is not set
+# CONFIG_LEDS_PWM is not set
+# CONFIG_LEDS_REGULATOR is not set
+# CONFIG_LEDS_BD2802 is not set
+# CONFIG_LEDS_LT3593 is not set
+# CONFIG_LEDS_MC13783 is not set
+# CONFIG_LEDS_RENESAS_TPU is not set
+# CONFIG_LEDS_TCA6507 is not set
+# CONFIG_LEDS_LM355x is not set
+# CONFIG_LEDS_OT200 is not set
+# CONFIG_LEDS_BLINKM is not set
+
+#
+# LED Triggers
+#
+CONFIG_LEDS_TRIGGERS=y
+# CONFIG_LEDS_TRIGGER_TIMER is not set
+# CONFIG_LEDS_TRIGGER_ONESHOT is not set
+CONFIG_LEDS_TRIGGER_HEARTBEAT=y
+# CONFIG_LEDS_TRIGGER_BACKLIGHT is not set
+# CONFIG_LEDS_TRIGGER_CPU is not set
+CONFIG_LEDS_TRIGGER_GPIO=y
+# CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set
+
+#
+# iptables trigger is under Netfilter config (LED target)
+#
+# CONFIG_LEDS_TRIGGER_TRANSIENT is not set
+# CONFIG_LEDS_TRIGGER_CAMERA is not set
+# CONFIG_ACCESSIBILITY is not set
+# CONFIG_INFINIBAND is not set
+# CONFIG_EDAC is not set
+CONFIG_RTC_LIB=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_HCTOSYS=y
+CONFIG_RTC_SYSTOHC=y
+CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
+# CONFIG_RTC_DEBUG is not set
+
+#
+# RTC interfaces
+#
+CONFIG_RTC_INTF_SYSFS=y
+CONFIG_RTC_INTF_PROC=y
+CONFIG_RTC_INTF_DEV=y
+CONFIG_RTC_INTF_DEV_UIE_EMUL=y
+# CONFIG_RTC_DRV_TEST is not set
+
+#
+# I2C RTC drivers
+#
+# CONFIG_RTC_DRV_DS1307 is not set
+# CONFIG_RTC_DRV_DS1374 is not set
+# CONFIG_RTC_DRV_DS1672 is not set
+# CONFIG_RTC_DRV_DS3232 is not set
+# CONFIG_RTC_DRV_MAX6900 is not set
+# CONFIG_RTC_DRV_RS5C372 is not set
+# CONFIG_RTC_DRV_ISL1208 is not set
+# CONFIG_RTC_DRV_ISL12022 is not set
+# CONFIG_RTC_DRV_X1205 is not set
+# CONFIG_RTC_DRV_PCF8523 is not set
+# CONFIG_RTC_DRV_PCF8563 is not set
+# CONFIG_RTC_DRV_PCF8583 is not set
+# CONFIG_RTC_DRV_M41T80 is not set
+# CONFIG_RTC_DRV_BQ32K is not set
+# CONFIG_RTC_DRV_S35390A is not set
+# CONFIG_RTC_DRV_FM3130 is not set
+# CONFIG_RTC_DRV_RX8581 is not set
+# CONFIG_RTC_DRV_RX8025 is not set
+CONFIG_RTC_DRV_EM3027=y
+# CONFIG_RTC_DRV_RV3029C2 is not set
+
+#
+# SPI RTC drivers
+#
+# CONFIG_RTC_DRV_M41T93 is not set
+# CONFIG_RTC_DRV_M41T94 is not set
+# CONFIG_RTC_DRV_DS1305 is not set
+# CONFIG_RTC_DRV_DS1390 is not set
+# CONFIG_RTC_DRV_MAX6902 is not set
+# CONFIG_RTC_DRV_R9701 is not set
+# CONFIG_RTC_DRV_RS5C348 is not set
+# CONFIG_RTC_DRV_DS3234 is not set
+# CONFIG_RTC_DRV_PCF2123 is not set
+# CONFIG_RTC_DRV_RX4581 is not set
+
+#
+# Platform RTC drivers
+#
+# CONFIG_RTC_DRV_CMOS is not set
+# CONFIG_RTC_DRV_DS1286 is not set
+# CONFIG_RTC_DRV_DS1511 is not set
+# CONFIG_RTC_DRV_DS1553 is not set
+# CONFIG_RTC_DRV_DS1742 is not set
+# CONFIG_RTC_DRV_DA9052 is not set
+# CONFIG_RTC_DRV_STK17TA8 is not set
+# CONFIG_RTC_DRV_M48T86 is not set
+# CONFIG_RTC_DRV_M48T35 is not set
+# CONFIG_RTC_DRV_M48T59 is not set
+# CONFIG_RTC_DRV_MSM6242 is not set
+# CONFIG_RTC_DRV_BQ4802 is not set
+# CONFIG_RTC_DRV_RP5C01 is not set
+# CONFIG_RTC_DRV_V3020 is not set
+# CONFIG_RTC_DRV_DS2404 is not set
+
+#
+# on-CPU RTC drivers
+#
+# CONFIG_RTC_DRV_IMXDI is not set
+CONFIG_RTC_DRV_MC13XXX=y
+CONFIG_RTC_DRV_MXC=y
+CONFIG_RTC_DRV_SNVS=y
+
+#
+# HID Sensor RTC drivers
+#
+# CONFIG_RTC_DRV_HID_SENSOR_TIME is not set
+CONFIG_DMADEVICES=y
+# CONFIG_DMADEVICES_DEBUG is not set
+
+#
+# DMA Devices
+#
+# CONFIG_DW_DMAC is not set
+CONFIG_MX3_IPU=y
+CONFIG_MX3_IPU_IRQS=4
+CONFIG_MXC_PXP_V2=y
+CONFIG_MXC_PXP_CLIENT_DEVICE=y
+# CONFIG_TIMB_DMA is not set
+CONFIG_IMX_SDMA=y
+# CONFIG_IMX_DMA is not set
+CONFIG_MXS_DMA=y
+CONFIG_DMA_ENGINE=y
+CONFIG_DMA_OF=y
+
+#
+# DMA Clients
+#
+# CONFIG_NET_DMA is not set
+# CONFIG_ASYNC_TX_DMA is not set
+# CONFIG_DMATEST is not set
+# CONFIG_AUXDISPLAY is not set
+# CONFIG_UIO is not set
+# CONFIG_VIRT_DRIVERS is not set
+
+#
+# Virtio drivers
+#
+# CONFIG_VIRTIO_PCI is not set
+# CONFIG_VIRTIO_MMIO is not set
+
+#
+# Microsoft Hyper-V guest support
+#
+CONFIG_STAGING=y
+# CONFIG_ET131X is not set
+# CONFIG_USBIP_CORE is not set
+# CONFIG_W35UND is not set
+# CONFIG_PRISM2_USB is not set
+# CONFIG_ECHO is not set
+# CONFIG_COMEDI is not set
+# CONFIG_ASUS_OLED is not set
+# CONFIG_R8187SE is not set
+# CONFIG_RTL8192U is not set
+# CONFIG_RTLLIB is not set
+# CONFIG_R8712U is not set
+# CONFIG_RTS5139 is not set
+# CONFIG_TRANZPORT is not set
+# CONFIG_IDE_PHISON is not set
+# CONFIG_LINE6_USB is not set
+# CONFIG_VT6655 is not set
+# CONFIG_VT6656 is not set
+# CONFIG_DX_SEP is not set
+# CONFIG_ZSMALLOC is not set
+# CONFIG_FB_SM7XX is not set
+# CONFIG_CRYSTALHD is not set
+# CONFIG_FB_XGI is not set
+# CONFIG_USB_ENESTORAGE is not set
+# CONFIG_BCM_WIMAX is not set
+# CONFIG_FT1000 is not set
+
+#
+# Speakup console speech
+#
+# CONFIG_SPEAKUP is not set
+# CONFIG_TOUCHSCREEN_CLEARPAD_TM1217 is not set
+# CONFIG_TOUCHSCREEN_SYNAPTICS_I2C_RMI4 is not set
+# CONFIG_STAGING_MEDIA is not set
+
+#
+# Android
+#
+# CONFIG_ANDROID is not set
+# CONFIG_USB_WPAN_HCD is not set
+# CONFIG_WIMAX_GDM72XX is not set
+# CONFIG_CSR_WIFI is not set
+CONFIG_NET_VENDOR_SILICOM=y
+# CONFIG_SBYPASS is not set
+# CONFIG_BPCTL is not set
+# CONFIG_CED1401 is not set
+# CONFIG_DRM_IMX is not set
+# CONFIG_DGRP is not set
+CONFIG_CLKDEV_LOOKUP=y
+CONFIG_HAVE_CLK_PREPARE=y
+CONFIG_COMMON_CLK=y
+
+#
+# Common Clock Framework
+#
+CONFIG_COMMON_CLK_DEBUG=y
+# CONFIG_COMMON_CLK_SI5351 is not set
+
+#
+# Hardware Spinlock drivers
+#
+CONFIG_CLKSRC_OF=y
+CONFIG_CLKSRC_MMIO=y
+CONFIG_VF_PIT_TIMER=y
+# CONFIG_MAILBOX is not set
+# CONFIG_IOMMU_SUPPORT is not set
+
+#
+# Remoteproc drivers
+#
+# CONFIG_STE_MODEM_RPROC is not set
+
+#
+# Rpmsg drivers
+#
+# CONFIG_PM_DEVFREQ is not set
+# CONFIG_EXTCON is not set
+# CONFIG_MEMORY is not set
+# CONFIG_IIO is not set
+# CONFIG_VME_BUS is not set
+CONFIG_PWM=y
+CONFIG_PWM_IMX=y
+CONFIG_IRQCHIP=y
+CONFIG_ARM_GIC=y
+# CONFIG_IPACK_BUS is not set
+CONFIG_ARCH_HAS_RESET_CONTROLLER=y
+CONFIG_RESET_CONTROLLER=y
+CONFIG_RESET_GPIO=y
+
+#
+# File systems
+#
+CONFIG_DCACHE_WORD_ACCESS=y
+CONFIG_EXT2_FS=y
+CONFIG_EXT2_FS_XATTR=y
+CONFIG_EXT2_FS_POSIX_ACL=y
+CONFIG_EXT2_FS_SECURITY=y
+# CONFIG_EXT2_FS_XIP is not set
+CONFIG_EXT3_FS=y
+CONFIG_EXT3_DEFAULTS_TO_ORDERED=y
+CONFIG_EXT3_FS_XATTR=y
+CONFIG_EXT3_FS_POSIX_ACL=y
+CONFIG_EXT3_FS_SECURITY=y
+CONFIG_EXT4_FS=y
+CONFIG_EXT4_FS_POSIX_ACL=y
+CONFIG_EXT4_FS_SECURITY=y
+# CONFIG_EXT4_DEBUG is not set
+CONFIG_JBD=y
+# CONFIG_JBD_DEBUG is not set
+CONFIG_JBD2=y
+# CONFIG_JBD2_DEBUG is not set
+CONFIG_FS_MBCACHE=y
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_GFS2_FS is not set
+# CONFIG_OCFS2_FS is not set
+# CONFIG_BTRFS_FS is not set
+# CONFIG_NILFS2_FS is not set
+CONFIG_FS_POSIX_ACL=y
+CONFIG_FILE_LOCKING=y
+CONFIG_FSNOTIFY=y
+CONFIG_DNOTIFY=y
+CONFIG_INOTIFY_USER=y
+# CONFIG_FANOTIFY is not set
+CONFIG_QUOTA=y
+CONFIG_QUOTA_NETLINK_INTERFACE=y
+# CONFIG_PRINT_QUOTA_WARNING is not set
+# CONFIG_QUOTA_DEBUG is not set
+# CONFIG_QFMT_V1 is not set
+# CONFIG_QFMT_V2 is not set
+CONFIG_QUOTACTL=y
+CONFIG_AUTOFS4_FS=y
+CONFIG_FUSE_FS=y
+# CONFIG_CUSE is not set
+
+#
+# Caches
+#
+# CONFIG_FSCACHE is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+CONFIG_ISO9660_FS=m
+CONFIG_JOLIET=y
+CONFIG_ZISOFS=y
+CONFIG_UDF_FS=m
+CONFIG_UDF_NLS=y
+
+#
+# DOS/FAT/NT Filesystems
+#
+CONFIG_FAT_FS=y
+CONFIG_MSDOS_FS=m
+CONFIG_VFAT_FS=y
+CONFIG_FAT_DEFAULT_CODEPAGE=437
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+# CONFIG_TMPFS_POSIX_ACL is not set
+# CONFIG_TMPFS_XATTR is not set
+# CONFIG_HUGETLB_PAGE is not set
+CONFIG_CONFIGFS_FS=m
+CONFIG_MISC_FILESYSTEMS=y
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_ECRYPT_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+CONFIG_JFFS2_FS=y
+CONFIG_JFFS2_FS_DEBUG=0
+CONFIG_JFFS2_FS_WRITEBUFFER=y
+# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
+# CONFIG_JFFS2_SUMMARY is not set
+# CONFIG_JFFS2_FS_XATTR is not set
+# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
+CONFIG_JFFS2_ZLIB=y
+# CONFIG_JFFS2_LZO is not set
+CONFIG_JFFS2_RTIME=y
+# CONFIG_JFFS2_RUBIN is not set
+CONFIG_UBIFS_FS=y
+# CONFIG_UBIFS_FS_ADVANCED_COMPR is not set
+CONFIG_UBIFS_FS_LZO=y
+CONFIG_UBIFS_FS_ZLIB=y
+# CONFIG_LOGFS is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_SQUASHFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_OMFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_QNX6FS_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_PSTORE is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+# CONFIG_F2FS_FS is not set
+CONFIG_NETWORK_FILESYSTEMS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V2=y
+CONFIG_NFS_V3=y
+CONFIG_NFS_V3_ACL=y
+CONFIG_NFS_V4=y
+# CONFIG_NFS_SWAP is not set
+# CONFIG_NFS_V4_1 is not set
+CONFIG_ROOT_NFS=y
+# CONFIG_NFS_USE_LEGACY_DNS is not set
+CONFIG_NFS_USE_KERNEL_DNS=y
+# CONFIG_NFSD is not set
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+CONFIG_NFS_ACL_SUPPORT=y
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+CONFIG_SUNRPC_GSS=y
+# CONFIG_SUNRPC_DEBUG is not set
+# CONFIG_CEPH_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="cp437"
+CONFIG_NLS_CODEPAGE_437=y
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+# CONFIG_NLS_CODEPAGE_850 is not set
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+CONFIG_NLS_ASCII=y
+CONFIG_NLS_ISO8859_1=y
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+CONFIG_NLS_ISO8859_15=m
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+# CONFIG_NLS_MAC_ROMAN is not set
+# CONFIG_NLS_MAC_CELTIC is not set
+# CONFIG_NLS_MAC_CENTEURO is not set
+# CONFIG_NLS_MAC_CROATIAN is not set
+# CONFIG_NLS_MAC_CYRILLIC is not set
+# CONFIG_NLS_MAC_GAELIC is not set
+# CONFIG_NLS_MAC_GREEK is not set
+# CONFIG_NLS_MAC_ICELAND is not set
+# CONFIG_NLS_MAC_INUIT is not set
+# CONFIG_NLS_MAC_ROMANIAN is not set
+# CONFIG_NLS_MAC_TURKISH is not set
+CONFIG_NLS_UTF8=y
+# CONFIG_DLM is not set
+
+#
+# Kernel hacking
+#
+# CONFIG_PRINTK_TIME is not set
+CONFIG_DEFAULT_MESSAGE_LOGLEVEL=4
+CONFIG_ENABLE_WARN_DEPRECATED=y
+CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_FRAME_WARN=1024
+CONFIG_MAGIC_SYSRQ=y
+# CONFIG_STRIP_ASM_SYMS is not set
+# CONFIG_READABLE_ASM is not set
+# CONFIG_UNUSED_SYMBOLS is not set
+CONFIG_DEBUG_FS=y
+# CONFIG_HEADERS_CHECK is not set
+# CONFIG_DEBUG_SECTION_MISMATCH is not set
+CONFIG_DEBUG_KERNEL=y
+# CONFIG_DEBUG_SHIRQ is not set
+# CONFIG_LOCKUP_DETECTOR is not set
+# CONFIG_PANIC_ON_OOPS is not set
+CONFIG_PANIC_ON_OOPS_VALUE=0
+# CONFIG_DETECT_HUNG_TASK is not set
+# CONFIG_SCHED_DEBUG is not set
+# CONFIG_SCHEDSTATS is not set
+# CONFIG_TIMER_STATS is not set
+# CONFIG_DEBUG_OBJECTS is not set
+# CONFIG_SLUB_STATS is not set
+CONFIG_HAVE_DEBUG_KMEMLEAK=y
+# CONFIG_DEBUG_KMEMLEAK is not set
+CONFIG_DEBUG_PREEMPT=y
+# CONFIG_DEBUG_RT_MUTEXES is not set
+# CONFIG_RT_MUTEX_TESTER is not set
+# CONFIG_DEBUG_SPINLOCK is not set
+# CONFIG_DEBUG_MUTEXES is not set
+# CONFIG_DEBUG_LOCK_ALLOC is not set
+# CONFIG_PROVE_LOCKING is not set
+# CONFIG_LOCK_STAT is not set
+# CONFIG_DEBUG_ATOMIC_SLEEP is not set
+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+# CONFIG_DEBUG_STACK_USAGE is not set
+# CONFIG_DEBUG_KOBJECT is not set
+# CONFIG_DEBUG_HIGHMEM is not set
+# CONFIG_DEBUG_BUGVERBOSE is not set
+# CONFIG_DEBUG_INFO is not set
+# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_WRITECOUNT is not set
+# CONFIG_DEBUG_MEMORY_INIT is not set
+# CONFIG_DEBUG_LIST is not set
+# CONFIG_TEST_LIST_SORT is not set
+# CONFIG_DEBUG_SG is not set
+# CONFIG_DEBUG_NOTIFIERS is not set
+# CONFIG_DEBUG_CREDENTIALS is not set
+# CONFIG_BOOT_PRINTK_DELAY is not set
+
+#
+# RCU Debugging
+#
+# CONFIG_PROVE_RCU_DELAY is not set
+# CONFIG_SPARSE_RCU_POINTER is not set
+# CONFIG_RCU_TORTURE_TEST is not set
+CONFIG_RCU_CPU_STALL_TIMEOUT=21
+CONFIG_RCU_CPU_STALL_VERBOSE=y
+# CONFIG_RCU_CPU_STALL_INFO is not set
+# CONFIG_RCU_TRACE is not set
+# CONFIG_BACKTRACE_SELF_TEST is not set
+# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
+# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
+# CONFIG_DEBUG_PER_CPU_MAPS is not set
+# CONFIG_LKDTM is not set
+# CONFIG_NOTIFIER_ERROR_INJECTION is not set
+# CONFIG_FAULT_INJECTION is not set
+# CONFIG_DEBUG_PAGEALLOC is not set
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_HAVE_DYNAMIC_FTRACE=y
+CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
+CONFIG_HAVE_C_RECORDMCOUNT=y
+CONFIG_TRACING_SUPPORT=y
+# CONFIG_FTRACE is not set
+# CONFIG_RBTREE_TEST is not set
+# CONFIG_INTERVAL_TREE_TEST is not set
+# CONFIG_DYNAMIC_DEBUG is not set
+# CONFIG_DMA_API_DEBUG is not set
+# CONFIG_ATOMIC64_SELFTEST is not set
+# CONFIG_SAMPLES is not set
+CONFIG_HAVE_ARCH_KGDB=y
+CONFIG_KGDB=y
+CONFIG_KGDB_SERIAL_CONSOLE=y
+# CONFIG_KGDB_TESTS is not set
+CONFIG_KGDB_KDB=y
+# CONFIG_KDB_KEYBOARD is not set
+CONFIG_KDB_CONTINUE_CATASTROPHIC=0
+# CONFIG_TEST_STRING_HELPERS is not set
+# CONFIG_TEST_KSTRTOX is not set
+# CONFIG_STRICT_DEVMEM is not set
+CONFIG_ARM_UNWIND=y
+# CONFIG_DEBUG_USER is not set
+CONFIG_DEBUG_LL=y
+# CONFIG_DEBUG_IMX51_UART is not set
+# CONFIG_DEBUG_IMX53_UART is not set
+CONFIG_DEBUG_IMX6Q_UART=y
+# CONFIG_DEBUG_IMX6SL_UART is not set
+# CONFIG_DEBUG_VF_UART is not set
+# CONFIG_DEBUG_ICEDCC is not set
+# CONFIG_DEBUG_SEMIHOSTING is not set
+CONFIG_DEBUG_IMX_UART_PORT=4
+CONFIG_DEBUG_LL_INCLUDE="debug/imx.S"
+CONFIG_DEBUG_UNCOMPRESS=y
+CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h"
+CONFIG_EARLY_PRINTK=y
+# CONFIG_PID_IN_CONTEXTIDR is not set
+
+#
+# Security options
+#
+CONFIG_KEYS=y
+# CONFIG_ENCRYPTED_KEYS is not set
+# CONFIG_KEYS_DEBUG_PROC_KEYS is not set
+# CONFIG_SECURITY_DMESG_RESTRICT is not set
+# CONFIG_SECURITY is not set
+CONFIG_SECURITYFS=y
+CONFIG_DEFAULT_SECURITY_DAC=y
+CONFIG_DEFAULT_SECURITY=""
+CONFIG_CRYPTO=y
+
+#
+# Crypto core or helper
+#
+CONFIG_CRYPTO_ALGAPI=y
+CONFIG_CRYPTO_ALGAPI2=y
+CONFIG_CRYPTO_AEAD=y
+CONFIG_CRYPTO_AEAD2=y
+CONFIG_CRYPTO_BLKCIPHER=y
+CONFIG_CRYPTO_BLKCIPHER2=y
+CONFIG_CRYPTO_HASH=y
+CONFIG_CRYPTO_HASH2=y
+CONFIG_CRYPTO_RNG=y
+CONFIG_CRYPTO_RNG2=y
+CONFIG_CRYPTO_PCOMP2=y
+CONFIG_CRYPTO_MANAGER=y
+CONFIG_CRYPTO_MANAGER2=y
+CONFIG_CRYPTO_USER=y
+CONFIG_CRYPTO_MANAGER_DISABLE_TESTS=y
+CONFIG_CRYPTO_GF128MUL=y
+CONFIG_CRYPTO_NULL=y
+# CONFIG_CRYPTO_PCRYPT is not set
+CONFIG_CRYPTO_WORKQUEUE=y
+# CONFIG_CRYPTO_CRYPTD is not set
+CONFIG_CRYPTO_AUTHENC=y
+CONFIG_CRYPTO_TEST=m
+
+#
+# Authenticated Encryption with Associated Data
+#
+CONFIG_CRYPTO_CCM=y
+CONFIG_CRYPTO_GCM=y
+CONFIG_CRYPTO_SEQIV=y
+
+#
+# Block modes
+#
+CONFIG_CRYPTO_CBC=y
+CONFIG_CRYPTO_CTR=y
+CONFIG_CRYPTO_CTS=y
+CONFIG_CRYPTO_ECB=y
+CONFIG_CRYPTO_LRW=y
+# CONFIG_CRYPTO_PCBC is not set
+CONFIG_CRYPTO_XTS=y
+
+#
+# Hash modes
+#
+# CONFIG_CRYPTO_CMAC is not set
+# CONFIG_CRYPTO_HMAC is not set
+# CONFIG_CRYPTO_XCBC is not set
+# CONFIG_CRYPTO_VMAC is not set
+
+#
+# Digest
+#
+CONFIG_CRYPTO_CRC32C=y
+# CONFIG_CRYPTO_CRC32 is not set
+CONFIG_CRYPTO_GHASH=y
+CONFIG_CRYPTO_MD4=y
+CONFIG_CRYPTO_MD5=y
+CONFIG_CRYPTO_MICHAEL_MIC=y
+CONFIG_CRYPTO_RMD128=y
+CONFIG_CRYPTO_RMD160=y
+CONFIG_CRYPTO_RMD256=y
+CONFIG_CRYPTO_RMD320=y
+CONFIG_CRYPTO_SHA1=y
+# CONFIG_CRYPTO_SHA1_ARM is not set
+CONFIG_CRYPTO_SHA256=y
+CONFIG_CRYPTO_SHA512=y
+CONFIG_CRYPTO_TGR192=y
+CONFIG_CRYPTO_WP512=y
+
+#
+# Ciphers
+#
+CONFIG_CRYPTO_AES=y
+# CONFIG_CRYPTO_AES_ARM is not set
+# CONFIG_CRYPTO_ANUBIS is not set
+CONFIG_CRYPTO_ARC4=y
+CONFIG_CRYPTO_BLOWFISH=y
+CONFIG_CRYPTO_BLOWFISH_COMMON=y
+CONFIG_CRYPTO_CAMELLIA=y
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+CONFIG_CRYPTO_DES=y
+# CONFIG_CRYPTO_FCRYPT is not set
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_SALSA20 is not set
+# CONFIG_CRYPTO_SEED is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_TEA is not set
+CONFIG_CRYPTO_TWOFISH=y
+CONFIG_CRYPTO_TWOFISH_COMMON=y
+
+#
+# Compression
+#
+CONFIG_CRYPTO_DEFLATE=y
+# CONFIG_CRYPTO_ZLIB is not set
+CONFIG_CRYPTO_LZO=y
+
+#
+# Random Number Generation
+#
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
+# CONFIG_CRYPTO_USER_API_HASH is not set
+# CONFIG_CRYPTO_USER_API_SKCIPHER is not set
+CONFIG_CRYPTO_HW=y
+# CONFIG_CRYPTO_DEV_HIFN_795X is not set
+CONFIG_CRYPTO_DEV_FSL_CAAM=y
+CONFIG_CRYPTO_DEV_FSL_CAAM_RINGSIZE=9
+# CONFIG_CRYPTO_DEV_FSL_CAAM_INTC is not set
+CONFIG_CRYPTO_DEV_FSL_CAAM_CRYPTO_API=y
+CONFIG_CRYPTO_DEV_FSL_CAAM_AHASH_API=y
+CONFIG_CRYPTO_DEV_FSL_CAAM_RNG_API=y
+# CONFIG_CRYPTO_DEV_FSL_CAAM_RNG_TEST is not set
+CONFIG_CRYPTO_DEV_FSL_CAAM_SM=y
+CONFIG_CRYPTO_DEV_FSL_CAAM_SM_SLOTSIZE=7
+CONFIG_CRYPTO_DEV_FSL_CAAM_SM_TEST=y
+CONFIG_CRYPTO_DEV_FSL_CAAM_SECVIO=y
+# CONFIG_ASYMMETRIC_KEY_TYPE is not set
+# CONFIG_BINARY_PRINTF is not set
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+CONFIG_RATIONAL=y
+CONFIG_GENERIC_STRNCPY_FROM_USER=y
+CONFIG_GENERIC_STRNLEN_USER=y
+CONFIG_GENERIC_PCI_IOMAP=y
+CONFIG_GENERIC_IO=y
+CONFIG_STMP_DEVICE=y
+CONFIG_CRC_CCITT=m
+CONFIG_CRC16=y
+CONFIG_CRC_T10DIF=y
+CONFIG_CRC_ITU_T=m
+CONFIG_CRC32=y
+# CONFIG_CRC32_SELFTEST is not set
+CONFIG_CRC32_SLICEBY8=y
+# CONFIG_CRC32_SLICEBY4 is not set
+# CONFIG_CRC32_SARWATE is not set
+# CONFIG_CRC32_BIT is not set
+CONFIG_CRC7=m
+CONFIG_LIBCRC32C=m
+# CONFIG_CRC8 is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=y
+CONFIG_LZO_COMPRESS=y
+CONFIG_LZO_DECOMPRESS=y
+# CONFIG_XZ_DEC is not set
+# CONFIG_XZ_DEC_BCJ is not set
+CONFIG_DECOMPRESS_GZIP=y
+CONFIG_GENERIC_ALLOCATOR=y
+CONFIG_TEXTSEARCH=y
+CONFIG_TEXTSEARCH_KMP=m
+CONFIG_TEXTSEARCH_BM=m
+CONFIG_TEXTSEARCH_FSM=m
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
+CONFIG_CPU_RMAP=y
+CONFIG_DQL=y
+CONFIG_NLATTR=y
+CONFIG_ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE=y
+CONFIG_AVERAGE=y
+# CONFIG_CORDIC is not set
+# CONFIG_DDR is not set
+CONFIG_OID_REGISTRY=y
+# CONFIG_VIRTUALIZATION is not set
diff --git a/recipes-kernel/linux/linux-cm-fx6-3.10.17/cm_fx6_kernel.patch b/recipes-kernel/linux/linux-cm-fx6-3.10.17/cm_fx6_kernel.patch
new file mode 100644
index 0000000..a78f1d2
--- /dev/null
+++ b/recipes-kernel/linux/linux-cm-fx6-3.10.17/cm_fx6_kernel.patch
@@ -0,0 +1,5782 @@
+diff --git a/Documentation/devicetree/bindings/input/ads7846.txt b/Documentation/devicetree/bindings/input/ads7846.txt
+new file mode 100644
+index 0000000..5f7619c
+--- /dev/null
++++ b/Documentation/devicetree/bindings/input/ads7846.txt
+@@ -0,0 +1,91 @@
++Device tree bindings for TI's ADS7843, ADS7845, ADS7846, ADS7873, TSC2046
++SPI driven touch screen controllers.
++
++The node for this driver must be a child node of a SPI controller, hence
++all mandatory properties described in
++
++	Documentation/devicetree/bindings/spi/spi-bus.txt
++
++must be specified.
++
++Additional required properties:
++
++	compatible		Must be one of the following, depending on the
++				model:
++					"ti,tsc2046"
++					"ti,ads7843"
++					"ti,ads7845"
++					"ti,ads7846"
++					"ti,ads7873"
++
++	interrupt-parent
++	interrupts		An interrupt node describing the IRQ line the chip's
++				!PENIRQ pin is connected to.
++	vcc-supply		A regulator node for the supply voltage.
++
++
++Optional properties:
++
++	ti,vref-delay-usecs		vref supply delay in usecs, 0 for
++					external vref (u16).
++	ti,vref-mv			The VREF voltage, in millivolts (u16).
++	ti,keep-vref-on			set to keep vref on for differential
++					measurements as well
++	ti,swap-xy			swap x and y axis
++	ti,settle-delay-usec		Settling time of the analog signals;
++					a function of Vcc and the capacitance
++					on the X/Y drivers.  If set to non-zero,
++					two samples are taken with settle_delay
++					us apart, and the second one is used.
++					~150 uSec with 0.01uF caps (u16).
++	ti,penirq-recheck-delay-usecs	If set to non-zero, after samples are
++					taken this delay is applied and penirq
++					is rechecked, to help avoid false
++					events.  This value is affected by the
++					material used to build the touch layer
++					(u16).
++	ti,x-plate-ohms			Resistance of the X-plate,
++					in Ohms (u16).
++	ti,y-plate-ohms			Resistance of the Y-plate,
++					in Ohms (u16).
++	ti,x-min			Minimum value on the X axis (u16).
++	ti,y-min			Minimum value on the Y axis (u16).
++	ti,x-max			Maximum value on the X axis (u16).
++	ti,y-max			Minimum value on the Y axis (u16).
++	ti,pressure-min			Minimum reported pressure value
++					(threshold) - u16.
++	ti,pressure-max			Maximum reported pressure value (u16).
++	ti,debounce-max			Max number of additional readings per
++					sample (u16).
++	ti,debounce-tol			Tolerance used for filtering (u16).
++	ti,debounce-rep			Additional consecutive good readings
++					required after the first two (u16).
++	ti,pendown-gpio-debounce	Platform specific debounce time for the
++					pendown-gpio (u32).
++	pendown-gpio			GPIO handle describing the pin the !PENIRQ
++					line is connected to.
++	linux,wakeup			use any event on touchscreen as wakeup event.
++
++
++Example for a TSC2046 chip connected to an McSPI controller of an OMAP SoC::
++
++	spi_controller {
++		tsc2046 at 0 {
++			reg = <0>;	/* CS0 */
++			compatible = "ti,tsc2046";
++			interrupt-parent = <&gpio1>;
++			interrupts = <8 0>;	/* BOOT6 / GPIO 8 */
++			spi-max-frequency = <1000000>;
++			pendown-gpio = <&gpio1 8 0>;
++			vcc-supply = <&reg_vcc3>;
++
++			ti,x-min = /bits/ 16 <0>;
++			ti,x-max = /bits/ 16 <8000>;
++			ti,y-min = /bits/ 16 <0>;
++			ti,y-max = /bits/ 16 <4800>;
++			ti,x-plate-ohms = /bits/ 16 <40>;
++			ti,pressure-max = /bits/ 16 <255>;
++
++			linux,wakeup;
++		};
++	};
+diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
+index c5f9a19..67f6083 100644
+--- a/arch/arm/boot/dts/Makefile
++++ b/arch/arm/boot/dts/Makefile
+@@ -113,6 +113,7 @@ dtb-$(CONFIG_ARCH_MXC) += \
+ 	imx53-mba53.dtb \
+ 	imx53-qsb.dtb \
+ 	imx53-smd.dtb \
++	imx6dl-cm-fx6.dtb \
+ 	imx6dl-sabreauto.dtb \
+ 	imx6dl-sabreauto-ecspi.dtb \
+ 	imx6dl-sabreauto-flexcan1.dtb \
+@@ -121,8 +122,11 @@ dtb-$(CONFIG_ARCH_MXC) += \
+ 	imx6dl-sabresd-hdcp.dtb \
+ 	imx6dl-sabresd-ldo.dtb \
+ 	imx6dl-sabresd-pf200.dtb \
++	imx6dl-sbc-fx6.dtb \
++	imx6dl-sbc-fx6m.dtb \
+ 	imx6dl-wandboard.dtb \
+ 	imx6q-arm2.dtb \
++	imx6q-cm-fx6.dtb \
+ 	imx6q-sabreauto.dtb \
+ 	imx6q-sabreauto-ecspi.dtb \
+ 	imx6q-sabreauto-flexcan1.dtb \
+@@ -131,6 +135,8 @@ dtb-$(CONFIG_ARCH_MXC) += \
+ 	imx6q-sabresd.dtb \
+ 	imx6q-sabresd-hdcp.dtb \
+ 	imx6q-sabresd-ldo.dtb \
++	imx6q-sbc-fx6.dtb \
++	imx6q-sbc-fx6m.dtb \
+ 	imx6q-sbc6x.dtb \
+ 	imx6sl-evk.dtb \
+ 	imx6sl-evk-csi.dtb \
+diff --git a/arch/arm/boot/dts/imx6dl-cm-fx6.dts b/arch/arm/boot/dts/imx6dl-cm-fx6.dts
+new file mode 100644
+index 0000000..d33d14c
+--- /dev/null
++++ b/arch/arm/boot/dts/imx6dl-cm-fx6.dts
+@@ -0,0 +1,21 @@
++/*
++ * Copyright 2015 CompuLab Ltd.
++ *
++ * Author: Valentin Raevsky <valentin at compulab.co.il>
++ *
++ * The code contained herein is licensed under the GNU General Public
++ * License. You may obtain a copy of the GNU General Public License
++ * Version 2 or later at the following locations:
++ *
++ * http://www.opensource.org/licenses/gpl-license.html
++ * http://www.gnu.org/copyleft/gpl.html
++ */
++
++/dts-v1/;
++#include "imx6dl.dtsi"
++#include "imx6qdl-cm-fx6.dtsi"
++
++/ {
++	model = "CompuLab CM-FX6";
++	compatible = "compulab,cm-fx6", "fsl,imx6dl";
++};
+diff --git a/arch/arm/boot/dts/imx6dl-sbc-fx6.dts b/arch/arm/boot/dts/imx6dl-sbc-fx6.dts
+new file mode 100644
+index 0000000..723b654
+--- /dev/null
++++ b/arch/arm/boot/dts/imx6dl-sbc-fx6.dts
+@@ -0,0 +1,23 @@
++/*
++* Copyright 2015 CompuLab Ltd.
++*
++* Author: Valentin Raevsky <valentin at compulab.co.il>
++*
++* The code contained herein is licensed under the GNU General Public
++* License. You may obtain a copy of the GNU General Public License
++* Version 2 or later at the following locations:
++*
++* http://www.opensource.org/licenses/gpl-license.html
++* http://www.gnu.org/copyleft/gpl.html
++*/
++
++/dts-v1/;
++#include "imx6dl.dtsi"
++#include "imx6qdl-cm-fx6.dtsi"
++#include "imx6qdl-sb-fx6x.dtsi"
++#include "imx6qdl-sb-fx6.dtsi"
++
++/ {
++	model = "CompuLab CM-FX6 on SBC-FX6";
++	compatible = "compulab,cm-fx6", "compulab,sbc-fx6", "fsl,imx6dl";
++};
+diff --git a/arch/arm/boot/dts/imx6dl-sbc-fx6m.dts b/arch/arm/boot/dts/imx6dl-sbc-fx6m.dts
+new file mode 100644
+index 0000000..f66b177
+--- /dev/null
++++ b/arch/arm/boot/dts/imx6dl-sbc-fx6m.dts
+@@ -0,0 +1,23 @@
++/*
++* Copyright 2015 CompuLab Ltd.
++*
++* Author: Valentin Raevsky <valentin at compulab.co.il>
++*
++* The code contained herein is licensed under the GNU General Public
++* License. You may obtain a copy of the GNU General Public License
++* Version 2 or later at the following locations:
++*
++* http://www.opensource.org/licenses/gpl-license.html
++* http://www.gnu.org/copyleft/gpl.html
++*/
++
++/dts-v1/;
++#include "imx6dl.dtsi"
++#include "imx6qdl-cm-fx6.dtsi"
++#include "imx6qdl-sb-fx6x.dtsi"
++#include "imx6qdl-sb-fx6m.dtsi"
++
++/ {
++	model = "CompuLab CM-FX6 on SBC-FX6m";	
++	compatible = "compulab,cm-fx6", "compulab,sbc-fx6m", "fsl,imx6dl";
++};
+diff --git a/arch/arm/boot/dts/imx6q-cm-fx6.dts b/arch/arm/boot/dts/imx6q-cm-fx6.dts
+new file mode 100644
+index 0000000..14c2d6a
+--- /dev/null
++++ b/arch/arm/boot/dts/imx6q-cm-fx6.dts
+@@ -0,0 +1,21 @@
++/*
++ * Copyright 2014 CompuLab Ltd.
++ *
++ * Author: Valentin Raevsky <valentin at compulab.co.il>
++ *
++ * The code contained herein is licensed under the GNU General Public
++ * License. You may obtain a copy of the GNU General Public License
++ * Version 2 or later at the following locations:
++ *
++ * http://www.opensource.org/licenses/gpl-license.html
++ * http://www.gnu.org/copyleft/gpl.html
++ */
++
++/dts-v1/;
++#include "imx6q.dtsi"
++#include "imx6q-cm-fx6.dtsi"
++
++/ {
++	model = "CompuLab CM-FX6";
++	compatible = "compulab,cm-fx6", "fsl,imx6q";
++};
+diff --git a/arch/arm/boot/dts/imx6q-cm-fx6.dtsi b/arch/arm/boot/dts/imx6q-cm-fx6.dtsi
+new file mode 100644
+index 0000000..3a10e5e
+--- /dev/null
++++ b/arch/arm/boot/dts/imx6q-cm-fx6.dtsi
+@@ -0,0 +1,95 @@
++/*
++ * Copyright 2014 CompuLab Ltd.
++ *
++ * Author: Valentin Raevsky <valentin at compulab.co.il>
++ *
++ * The code contained herein is licensed under the GNU General Public
++ * License. You may obtain a copy of the GNU General Public License
++ * Version 2 or later at the following locations:
++ *
++ * http://www.opensource.org/licenses/gpl-license.html
++ * http://www.gnu.org/copyleft/gpl.html
++ */
++
++#include "imx6qdl-cm-fx6.dtsi"
++
++/ {
++	regulators {
++		compatible = "simple-bus";
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		reg_sata_ldo_en: sata_ldo_en {
++			compatible = "regulator-fixed";
++			regulator-name = "cm_fx6_sata_ldo_en";
++			regulator-min-microvolt = <3300000>;
++			regulator-max-microvolt = <3300000>;
++			gpio = <&gpio2 16 0>;
++			startup-delay-us = <100>;
++			enable-active-high;
++		};
++
++		reg_sata_phy_slp: sata_phy_slp {
++			compatible = "regulator-fixed";
++			regulator-name = "cm_fx6_sata_phy_slp";
++			regulator-min-microvolt = <3300000>;
++			regulator-max-microvolt = <3300000>;
++			gpio = <&gpio3 23 0>;
++			startup-delay-us = <100>;
++			enable-active-high;
++			vin-supply = <&reg_sata_ldo_en>;
++		};
++
++		reg_sata_nrstdly: sata_nrstdly {
++			compatible = "regulator-fixed";
++			regulator-name = "cm_fx6_sata_nrstdly";
++			regulator-min-microvolt = <3300000>;
++			regulator-max-microvolt = <3300000>;
++			gpio = <&gpio6 6 0>;
++			startup-delay-us = <100>;
++			enable-active-high;
++			vin-supply = <&reg_sata_phy_slp>;
++		};
++
++		reg_sata_pwren: sata_pwren {
++			compatible = "regulator-fixed";
++			regulator-name = "cm_fx6_sata_pwren";
++			regulator-min-microvolt = <3300000>;
++			regulator-max-microvolt = <3300000>;
++			gpio = <&gpio1 28 0>;
++			startup-delay-us = <100>;
++			enable-active-high;
++			vin-supply = <&reg_sata_nrstdly>;
++		};
++
++		reg_sata_nstandby1: sata_nstandby1 {
++			compatible = "regulator-fixed";
++			regulator-name = "cm_fx6_sata_nstandby1";
++			regulator-min-microvolt = <3300000>;
++			regulator-max-microvolt = <3300000>;
++			gpio = <&gpio3 20 0>;
++			startup-delay-us = <100>;
++			enable-active-high;
++			vin-supply = <&reg_sata_pwren>;
++		};
++
++		reg_sata_nstandby2: sata_nstandby2 {
++			compatible = "regulator-fixed";
++			regulator-name = "cm_fx6_sata_nstandby2";
++			regulator-min-microvolt = <3300000>;
++			regulator-max-microvolt = <3300000>;
++			gpio = <&gpio5 2 0>;
++			startup-delay-us = <100>;
++			enable-active-high;
++			regulator-boot-on;
++			vin-supply = <&reg_sata_nstandby1>;
++		};
++
++	};
++
++};
++
++/* sata */
++&sata {
++	status = "okay";
++};
+diff --git a/arch/arm/boot/dts/imx6q-sbc-fx6.dts b/arch/arm/boot/dts/imx6q-sbc-fx6.dts
+new file mode 100644
+index 0000000..1234fb3
+--- /dev/null
++++ b/arch/arm/boot/dts/imx6q-sbc-fx6.dts
+@@ -0,0 +1,23 @@
++/*
++* Copyright 2014 CompuLab Ltd.
++*
++* Author: Valentin Raevsky <valentin at compulab.co.il>
++*
++* The code contained herein is licensed under the GNU General Public
++* License. You may obtain a copy of the GNU General Public License
++* Version 2 or later at the following locations:
++*
++* http://www.opensource.org/licenses/gpl-license.html
++* http://www.gnu.org/copyleft/gpl.html
++*/
++
++/dts-v1/;
++#include "imx6q.dtsi"
++#include "imx6q-cm-fx6.dtsi"
++#include "imx6qdl-sb-fx6x.dtsi"
++#include "imx6qdl-sb-fx6.dtsi"
++
++/ {
++	model = "CompuLab CM-FX6 on SBC-FX6";
++	compatible = "compulab,cm-fx6", "compulab,sbc-fx6", "fsl,imx6q";
++};
+diff --git a/arch/arm/boot/dts/imx6q-sbc-fx6m.dts b/arch/arm/boot/dts/imx6q-sbc-fx6m.dts
+new file mode 100644
+index 0000000..dd8c1c0
+--- /dev/null
++++ b/arch/arm/boot/dts/imx6q-sbc-fx6m.dts
+@@ -0,0 +1,29 @@
++/*
++* Copyright 2014 CompuLab Ltd.
++*
++* Author: Valentin Raevsky <valentin at compulab.co.il>
++*
++* The code contained herein is licensed under the GNU General Public
++* License. You may obtain a copy of the GNU General Public License
++* Version 2 or later at the following locations:
++*
++* http://www.opensource.org/licenses/gpl-license.html
++* http://www.gnu.org/copyleft/gpl.html
++*/
++
++/dts-v1/;
++#include "imx6q.dtsi"
++#include "imx6q-cm-fx6.dtsi"
++#include "imx6qdl-sb-fx6x.dtsi"
++#include "imx6qdl-sb-fx6m.dtsi"
++
++/ {
++	model = "CompuLab CM-FX6 on SBC-FX6m";	
++	compatible = "compulab,cm-fx6", "compulab,sbc-fx6m", "fsl,imx6q";
++};
++
++&hdmi_core {
++	ipu_id = <1>;
++	disp_id = <0>;
++	status = "okay";
++};
+diff --git a/arch/arm/boot/dts/imx6qdl-cm-fx6.dtsi b/arch/arm/boot/dts/imx6qdl-cm-fx6.dtsi
+new file mode 100644
+index 0000000..cff8d4e
+--- /dev/null
++++ b/arch/arm/boot/dts/imx6qdl-cm-fx6.dtsi
+@@ -0,0 +1,605 @@
++/*
++ * Copyright 2014 CompuLab Ltd.
++ *
++ * Author: Valentin Raevsky <valentin at compulab.co.il>
++ *
++ * The code contained herein is licensed under the GNU General Public
++ * License. You may obtain a copy of the GNU General Public License
++ * Version 2 or later at the following locations:
++ *
++ * http://www.opensource.org/licenses/gpl-license.html
++ * http://www.gnu.org/copyleft/gpl.html
++ */
++
++#define MX6QDL_GPR1	0x04 0x04 0x000 0x0 0x0
++#define MX6QDL_GPR6	0x18 0x18 0x000 0x0 0x0
++#define MX6QDL_GPR7	0x1c 0x1c 0x000 0x0 0x0
++
++/ {
++	memory {
++		reg = <0x10000000 0x20000000>;
++	};
++
++	leds {
++		compatible = "gpio-leds";
++		heartbeat-led {
++			label = "Heartbeat";
++			gpios = <&gpio2 31 0>;
++			linux,default-trigger = "heartbeat";
++		};
++	};
++
++	regulators {
++		compatible = "simple-bus";
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		/* regulator for usb otg */
++		reg_usb_otg_vbus: usb_otg_vbus {
++			compatible = "regulator-fixed";
++			regulator-name = "usb_otg_vbus";
++			regulator-min-microvolt = <5000000>;
++			regulator-max-microvolt = <5000000>;
++			gpio = <&gpio3 22 0>;
++			enable-active-high;
++		};
++
++		/* regulator1 for pcie power-on-gpio */
++		pcie_power_on_gpio: regulator-pcie-power-on-gpio {
++			compatible = "regulator-fixed";
++			regulator-name = "regulator-pcie-power-on-gpio";
++			regulator-min-microvolt = <3300000>;
++			regulator-max-microvolt = <3300000>;
++			gpio = <&gpio2 24 0>;
++			enable-active-high;
++		};
++
++		/* regulator for usb hub1 */
++		reg_usb_h1_vbus: usb_h1_vbus {
++			compatible = "regulator-fixed";
++			regulator-name = "usb_h1_vbus";
++			regulator-min-microvolt = <5000000>;
++			regulator-max-microvolt = <5000000>;
++			gpio = <&gpio7 8 0>;
++			enable-active-high;
++		};
++
++		/* regulator1 for wifi/bt */
++		awnh387_npoweron: regulator-awnh387-npoweron {
++			compatible = "regulator-fixed";
++			regulator-name = "regulator-awnh387-npoweron";
++			regulator-min-microvolt = <3300000>;
++			regulator-max-microvolt = <3300000>;
++			gpio = <&gpio7 12 0>;
++			enable-active-high;
++		};
++
++		/* regulator2 for wifi/bt */
++		awnh387_wifi_nreset: regulator-awnh387-wifi-nreset {
++			compatible = "regulator-fixed";
++			regulator-name = "regulator-awnh387-wifi-nreset";
++			regulator-min-microvolt = <3300000>;
++			regulator-max-microvolt = <3300000>;
++			gpio = <&gpio6 16 0>;
++			startup-delay-us = <10000>;
++		};
++
++		tsc2046reg: tsc2046-reg {
++			compatible = "regulator-fixed";
++			regulator-name = "tsc2046-reg";
++			regulator-min-microvolt = <3300000>;
++			regulator-max-microvolt = <3300000>;
++		};
++
++	};
++
++	aliases {
++		mxcfb0 = &mxcfb1;
++		mxcfb1 = &mxcfb2;
++		mxcfb2 = &mxcfb3;
++		mxcfb3 = &mxcfb4;
++	};
++
++	sound {
++		compatible = "fsl,imx-audio-wm8731";
++		model = "wm8731-audio";
++		ssi-controller = <&ssi2>;
++		src-port = <2>;
++		ext-port = <4>;
++		audio-codec = <&codec>;
++		audio-routing = "LOUT", "ROUT", "LLINEIN", "RLINEIN";
++	};
++
++	sound-hdmi {
++		compatible = "fsl,imx-audio-hdmi";
++		model = "imx-audio-hdmi";
++		hdmi-controller = <&hdmi_audio>;
++	};
++
++	sound-spdif {
++		compatible = "fsl,imx-audio-spdif";
++		model = "imx-spdif";
++		spdif-controller = <&spdif>;
++		spdif-out;
++		spdif-in;
++	};
++
++	mxcfb1: fb at 0 {
++		compatible = "fsl,mxc_sdc_fb";
++		disp_dev = "hdmi";
++		interface_pix_fmt = "RGB24";
++		mode_str ="1920x1080M at 60";
++		default_bpp = <32>;
++		int_clk = <0>;
++		late_init = <0>;
++		status = "disabled";
++	};
++
++	mxcfb2: fb at 1 {
++		compatible = "fsl,mxc_sdc_fb";
++		disp_dev = "lcd";
++		interface_pix_fmt = "RGB24";
++		mode_str ="1920x1080M at 60";
++		default_bpp = <32>;
++		int_clk = <0>;
++		late_init = <0>;
++		status = "disabled";
++	};
++
++	mxcfb3: fb at 2 {
++		compatible = "fsl,mxc_sdc_fb";
++		disp_dev = "ldb";
++		interface_pix_fmt = "RGB666";
++		mode_str ="1366x768M-18 at 60";
++		default_bpp = <16>;
++		int_clk = <0>;
++		late_init = <0>;
++		status = "disabled";
++	};
++
++	mxcfb4: fb at 3 {
++		compatible = "fsl,mxc_sdc_fb";
++		disp_dev = "ldb";
++		interface_pix_fmt = "RGB666";
++		mode_str ="1280x800M-18 at 60";
++		default_bpp = <16>;
++		int_clk = <0>;
++		late_init = <0>;
++		status = "disabled";
++	};
++
++	lcd at 0 {
++		compatible = "fsl,lcd";
++		ipu_id = <0>;
++		disp_id = <0>;
++		default_ifmt = "RGB24";
++		pinctrl-names = "default";
++		pinctrl-0 = <&pinctrl_ipu1_lcd>;
++		status = "okay";
++	};
++
++	v4l2_out {
++		compatible = "fsl,mxc_v4l2_output";
++		status = "okay";
++	};
++};
++
++&iomuxc {
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_hog>;
++
++	hog {
++		pinctrl_hog: hoggrp {
++			fsl,pins = <
++				MX6QDL_GPR1 0x48400005
++				/* ipu3 QoS */
++				MX6QDL_GPR6 0x007f007f
++				MX6QDL_GPR7 0x007f007f
++				/* SATA PWR */
++				MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x80000000
++				MX6QDL_PAD_EIM_A22__GPIO2_IO16 0x80000000
++				MX6QDL_PAD_EIM_D20__GPIO3_IO20 0x80000000
++				MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x80000000
++				/* SATA CTRL */
++				MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x80000000
++				MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x80000000
++				MX6QDL_PAD_EIM_A23__GPIO6_IO06 0x80000000
++				MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x80000000
++				/* POWER_BUTTON */
++				MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000
++			>;
++		};
++	};
++
++	imx6q-cm-fx6 {
++		/* pins for eth0 */
++		pinctrl_enet: enetgrp {
++			fsl,pins = <
++				MX6QDL_PAD_RGMII_RXC__RGMII_RXC      0x1b0b0
++				MX6QDL_PAD_RGMII_RD0__RGMII_RD0      0x1b0b0
++				MX6QDL_PAD_RGMII_RD1__RGMII_RD1      0x1b0b0
++				MX6QDL_PAD_RGMII_RD2__RGMII_RD2      0x1b0b0
++				MX6QDL_PAD_RGMII_RD3__RGMII_RD3      0x1b0b0
++				MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b0b0
++				MX6QDL_PAD_RGMII_TXC__RGMII_TXC      0x1b0b0
++				MX6QDL_PAD_RGMII_TD0__RGMII_TD0      0x1b0b0
++				MX6QDL_PAD_RGMII_TD1__RGMII_TD1      0x1b0b0
++				MX6QDL_PAD_RGMII_TD2__RGMII_TD2      0x1b0b0
++				MX6QDL_PAD_RGMII_TD3__RGMII_TD3      0x1b0b0
++				MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b0b0
++				MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK   0x1b0b0
++				MX6QDL_PAD_ENET_MDIO__ENET_MDIO      0x1b0b0
++				MX6QDL_PAD_ENET_MDC__ENET_MDC      0x1b0b0
++			>;
++		};
++
++		pinctrl_ipu1_lcd: ipu1grp-lcd {
++			fsl,pins = <
++				MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x38
++				MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15       0x38
++				MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02        0x38
++				MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03        0x38
++				MX6QDL_PAD_DI0_PIN4__IPU1_DI0_PIN04        0x80000028
++				MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00   0x38
++				MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01   0x38
++				MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02   0x38
++				MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03   0x38
++				MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04   0x38
++				MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05   0x38
++				MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06   0x38
++				MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07   0x38
++				MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08   0x38
++				MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09   0x38
++				MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10  0x38
++				MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11  0x38
++				MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12  0x38
++				MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13  0x38
++				MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14  0x38
++				MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15  0x38
++				MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16  0x38
++				MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17  0x38
++				MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18  0x38
++				MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19  0x38
++				MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20  0x38
++				MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21  0x38
++				MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22  0x38
++				MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23  0x38
++			>;
++		};
++
++		/* pins for spi */
++		pinctrl_ecspi1: ecspi1grp {
++			fsl,pins = <
++				MX6QDL_PAD_EIM_D16__ECSPI1_SCLK      0x100b1
++				MX6QDL_PAD_EIM_D17__ECSPI1_MISO      0x100b1
++				MX6QDL_PAD_EIM_D18__ECSPI1_MOSI      0x100b1
++				MX6QDL_PAD_EIM_EB2__GPIO2_IO30      0x100b1
++				MX6QDL_PAD_EIM_D19__GPIO3_IO19      0x100b1
++			>;
++		};
++
++		/* pins for nand */
++		pinctrl_gpmi_nand: gpminandgrp {
++			fsl,pins = <
++				MX6QDL_PAD_NANDF_CLE__NAND_CLE      0xb0b1
++				MX6QDL_PAD_NANDF_ALE__NAND_ALE      0xb0b1
++				MX6QDL_PAD_NANDF_WP_B__NAND_WP_B   0xb0b1
++				MX6QDL_PAD_NANDF_RB0__NAND_READY_B   0xb000
++				MX6QDL_PAD_NANDF_CS0__NAND_CE0_B   0xb0b1
++				MX6QDL_PAD_NANDF_CS1__NAND_CE1_B   0xb0b1
++				MX6QDL_PAD_SD4_CMD__NAND_RE_B      0xb0b1
++				MX6QDL_PAD_SD4_CLK__NAND_WE_B      0xb0b1
++				MX6QDL_PAD_NANDF_D0__NAND_DATA00   0xb0b1
++				MX6QDL_PAD_NANDF_D1__NAND_DATA01   0xb0b1
++				MX6QDL_PAD_NANDF_D2__NAND_DATA02   0xb0b1
++				MX6QDL_PAD_NANDF_D3__NAND_DATA03   0xb0b1
++				MX6QDL_PAD_NANDF_D4__NAND_DATA04   0xb0b1
++				MX6QDL_PAD_NANDF_D5__NAND_DATA05   0xb0b1
++				MX6QDL_PAD_NANDF_D6__NAND_DATA06   0xb0b1
++				MX6QDL_PAD_NANDF_D7__NAND_DATA07   0xb0b1
++				MX6QDL_PAD_SD4_DAT0__NAND_DQS      0x00b1
++			>;
++		};
++
++		/* pins for i2c2 */
++		pinctrl_i2c2: i2c2grp {
++			fsl,pins = <
++				MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
++				MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
++			>;
++		};
++
++		/* pins for i2c3 */
++		pinctrl_i2c3: i2c3grp {
++			fsl,pins = <
++				MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
++				MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
++			>;
++		};
++
++		/* pins for console */
++		pinctrl_uart4: uart4grp {
++			fsl,pins = <
++				MX6QDL_PAD_KEY_COL0__UART4_TX_DATA   0x1b0b1
++				MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA   0x1b0b1
++			>;
++		};
++
++		/* pins for usb hub1 */
++		pinctrl_usbh1: usbh1grp {
++			fsl,pins = <
++				MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x80000000
++			>;
++		};
++
++		/* pins for usb otg */
++		pinctrl_usbotg: usbotggrp {
++			fsl,pins = <
++				MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
++				MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000
++			>;
++		};
++
++		/* pins for wifi/bt */
++		pinctrl_usdhc1: usdhc1grp {
++			fsl,pins = <
++				MX6QDL_PAD_SD1_CMD__SD1_CMD    0x17071
++				MX6QDL_PAD_SD1_CLK__SD1_CLK    0x10071
++				MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17071
++				MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17071
++				MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17071
++				MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17071
++			>;
++		};
++
++		/* pins for wifi/bt */
++		pinctrl_mrvl1: mrvl1grp {
++			fsl,pins = <
++				/* WIFI_PWR_RST */
++				MX6QDL_PAD_GPIO_17__GPIO7_IO12	0x80000000
++				MX6QDL_PAD_NANDF_CS3__GPIO6_IO16 0x80000000
++			>;
++		};
++
++		/* pins for tsc2046 pendown */
++		pinctrl_tsc2046: tsc2046grp {
++			fsl,pins = <
++				 /* tsc2046 PENDOWN */
++				MX6QDL_PAD_SD4_DAT7__GPIO2_IO15 0x80000000
++			>;
++		};
++
++		/* pins for pcie */
++		pinctrl_pcie: pciegrp {
++			fsl,pins = <
++				MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x80000000
++				MX6QDL_PAD_EIM_CS1__GPIO2_IO24 0x80000000
++			>;
++		};
++
++		/* pins for spdif */
++		pinctrl_spdif: spdifgrp {
++			fsl,pins = <
++				MX6QDL_PAD_GPIO_16__SPDIF_IN  0x1b0b0
++				MX6QDL_PAD_GPIO_19__SPDIF_OUT 0x1b0b0
++			>;
++		};
++
++		/* pins for audmux */
++		pinctrl_audmux: audmuxgrp {
++			fsl,pins = <
++				MX6QDL_PAD_SD2_CMD__AUD4_RXC   0x17059
++				MX6QDL_PAD_SD2_DAT0__AUD4_RXD  0x17059
++				MX6QDL_PAD_SD2_DAT3__AUD4_TXC  0x17059
++				MX6QDL_PAD_SD2_DAT2__AUD4_TXD  0x17059
++				MX6QDL_PAD_SD2_DAT1__AUD4_TXFS 0x17059
++				/* master mode pin */
++				MX6QDL_PAD_GPIO_5__CCM_CLKO1	0x17059
++			>;
++		};
++	};
++};
++
++&cpu0 {
++	operating-points = <
++		/* kHz    uV */
++		996000  1250000
++		852000  1250000
++		792000  1150000
++		396000  975000
++	>;
++	fsl,soc-operating-points = <
++		/* ARM kHz  SOC-PU uV */
++		996000        1250000
++		852000        1250000
++		792000        1175000
++		396000        1175000
++	>;
++};
++
++/* spi */
++&ecspi1 {
++	fsl,spi-num-chipselects = <2>;
++	cs-gpios = <&gpio2 30 0>, <&gpio3 19 0>;
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_ecspi1>;
++	status = "okay";
++
++	flash: m25p80 at 0 {
++		#address-cells = <1>;
++		#size-cells = <1>;
++		compatible = "st,m25px16", "st,m25p";
++		spi-max-frequency = <20000000>;
++		reg = <0>;
++
++		partition at 0 {
++			label = "uboot";
++			reg = <0x0 0xc0000>;
++		};
++
++		partition at c0000 {
++			label = "uboot environment";
++			reg = <0xc0000 0x40000>;
++		};
++
++		partition at 100000 {
++			label = "reserved";
++			reg = <0x100000 0x100000>;
++		};
++	};
++
++	/* touch controller */
++	touch:	tsc2046 at 1 {
++		pinctrl-names = "default";
++		pinctrl-0 = <&pinctrl_tsc2046>;
++
++		compatible = "ti,tsc2046";
++		vcc-supply = <&tsc2046reg>;
++
++		reg = <1>;	/* CS1 */
++		spi-max-frequency = <1500000>;
++
++		interrupt-parent = <&gpio2>;
++		interrupts = <15 0>;
++		pendown-gpio = <&gpio2 15 0>;
++
++		ti,x-min = /bits/ 16 <0x0>;
++		ti,x-max = /bits/ 16 <0x0fff>;
++		ti,y-min = /bits/ 16 <0x0>;
++		ti,y-max = /bits/ 16 <0x0fff>;
++
++		ti,x-plate-ohms = /bits/ 16 <180>;
++		ti,pressure-max = /bits/ 16 <255>;
++
++		ti,debounce-max = /bits/ 16 <30>;
++		ti,debounce-tol = /bits/ 16 <10>;
++		ti,debounce-rep = /bits/ 16 <1>;
++
++		linux,wakeup;
++	};
++};
++
++/* eth0 */
++&fec {
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_enet>;
++	phy-mode = "rgmii";
++	status = "okay";
++};
++
++/* nand */
++&gpmi {
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_gpmi_nand>;
++	status = "okay";
++
++	partition at 0 {
++		label = "linux";
++		reg = <0x0 0x800000>;
++	};
++
++	partition at 800000 {
++		label = "rootfs";
++		reg = < 0x800000 0x0>;
++	};
++};
++
++/* i2c3 */
++&i2c3 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_i2c3>;
++	status = "okay";
++
++	eeprom at 50 {
++		compatible = "at24,24c02";
++		reg = <0x50>;
++		pagesize = <16>;
++	};
++
++	codec: wm8731 at 1a {
++		compatible = "wlf,wm8731";
++		reg = <0x1a>;
++		clocks = <&clks 173>, <&clks 158>, <&clks 201>, <&clks 200>;
++		clock-names = "pll4", "imx-ssi.1", "cko", "cko2";
++		AVDD-supply = <&pu_dummy>;
++		HPVDD-supply = <&pu_dummy>;
++		DCVDD-supply = <&pu_dummy>;
++		DBVDD-supply = <&pu_dummy>;
++	};
++};
++
++&pcie {
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_pcie>;
++	reset-gpio = <&gpio1 26 0>;
++	vdd-supply = <&pcie_power_on_gpio>;
++	status = "okay";
++};
++
++/* console */
++&uart4 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_uart4>;
++	status = "okay";
++};
++
++/* usb otg */
++&usbotg {
++	vbus-supply = <&reg_usb_otg_vbus>;
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_usbotg>;
++	dr_mode = "otg";
++	status = "okay";
++};
++
++/* usb hub1 */
++&usbh1 {
++	vbus-supply = <&reg_usb_h1_vbus>;
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_usbh1>;
++	status = "okay";
++};
++
++/* wifi/bt */
++&usdhc1 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_usdhc1>, <&pinctrl_mrvl1>;
++	non-removable;
++	vmmc-supply = <&awnh387_npoweron>;
++	vmmc_aux-supply = <&awnh387_wifi_nreset>;
++	status = "okay";
++};
++
++&ssi2 {
++	fsl,mode = "i2s-master";
++	status = "okay";
++};
++
++&hdmi_core {
++	ipu_id = <0>;
++	disp_id = <1>;
++	status = "okay";
++};
++
++&hdmi_video {
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_hdmi_hdcp_1>;
++	fsl,hdcp;
++	status = "okay";
++};
++
++&hdmi_audio {
++	status = "okay";
++};
++
++&spdif {
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_spdif>;
++	status = "okay";
++};
++
++&audmux {
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_audmux>;
++	status = "okay";
++};
+diff --git a/arch/arm/boot/dts/imx6qdl-sb-fx6.dtsi b/arch/arm/boot/dts/imx6qdl-sb-fx6.dtsi
+new file mode 100644
+index 0000000..85836d7
+--- /dev/null
++++ b/arch/arm/boot/dts/imx6qdl-sb-fx6.dtsi
+@@ -0,0 +1,115 @@
++/*
++ * Copyright 2014 CompuLab Ltd.
++ *
++ * Author: Valentin Raevsky <valentin at compulab.co.il>
++ *
++ * The code contained herein is licensed under the GNU General Public
++ * License. You may obtain a copy of the GNU General Public License
++ * Version 2 or later at the following locations:
++ *
++ * http://www.opensource.org/licenses/gpl-license.html
++ * http://www.gnu.org/copyleft/gpl.html
++ */
++
++/ {
++	backlight {
++		compatible = "pwm-backlight";
++		pwms = <&pwm3 0 5000000>;
++		brightness-levels = <0 4 8 16 32 64 128 255>;
++		default-brightness-level = <7>;
++	};
++
++	i2cmux {
++		compatible = "i2c-mux-gpio";
++		#address-cells = <1>;
++		#size-cells = <0>;
++		mux-gpios = <&gpio1 2 0>;
++		i2c-parent = <&i2c1>;
++
++		i2c at 0 {
++			reg = <0>;
++			#address-cells = <1>;
++			#size-cells = <0>;
++
++			pca9555 at 26 {
++			      compatible = "nxp,pca9555";
++			      gpio-controller;
++			      #gpio-cells = <2>;
++			      reg = <0x26>;
++			};
++
++			hx8526 at 4a {
++			      compatible = "himax,himax_ts";
++			      reg = <0x4a>;
++			      gpio_intr = <&gpio1 4 0>;
++			};
++
++			eeprom at 50 {
++				compatible = "at24,24c02";
++				reg = <0x50>;
++				pagesize = <16>;
++			};
++
++		};
++
++		i2c at 1 {
++			reg = <1>;
++			#address-cells = <1>;
++			#size-cells = <0>;
++
++			dvi: edid at 50 {
++				compatible = "fsl,imx6-hdmi-i2c";
++				reg = <0x50>;
++			};
++		};
++
++	};
++};
++
++&i2c1 {
++	status = "okay";
++};
++
++&usdhc3 {
++	wp-gpios = <&gpio7 0 0>;
++	status = "okay";
++};
++
++&pwm3 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_pwm3_1>;
++	status = "okay";
++};
++
++&mxcfb1 {
++	status = "okay";
++};
++
++&mxcfb2 {
++	mode_str ="KD050C-WVGA";
++	status = "okay";
++};
++
++&mxcfb3 {
++	status = "okay";
++};
++
++&mxcfb4 {
++	status = "okay";
++};
++
++&ldb {
++	ipu_id = <1>;
++	disp_id = <0>;
++	ext_ref = <1>;
++	mode = "sep0";
++	sec_ipu_id = <1>;
++	sec_disp_id = <1>;
++	status = "okay";
++};
++
++&flexcan1 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_flexcan1_1>;
++	status = "okay";
++};
+diff --git a/arch/arm/boot/dts/imx6qdl-sb-fx6m.dtsi b/arch/arm/boot/dts/imx6qdl-sb-fx6m.dtsi
+new file mode 100644
+index 0000000..5394364
+--- /dev/null
++++ b/arch/arm/boot/dts/imx6qdl-sb-fx6m.dtsi
+@@ -0,0 +1,113 @@
++/*
++ * Copyright 2014 CompuLab Ltd.
++ *
++ * Author: Valentin Raevsky <valentin at compulab.co.il>
++ *
++ * The code contained herein is licensed under the GNU General Public
++ * License. You may obtain a copy of the GNU General Public License
++ * Version 2 or later at the following locations:
++ *
++ * http://www.opensource.org/licenses/gpl-license.html
++ * http://www.gnu.org/copyleft/gpl.html
++ */
++
++/ {
++	iomux_uart2: pinmux at 20E0924 {
++		compatible = "pinctrl-single";
++		reg = <0x20E0000 0x924>;	/* Single register */
++		#address-cells = <1>;
++		#size-cells = <0>;
++		pinctrl-single,register-width = <32>;
++		pinctrl-single,function-mask = <0x4>;
++	};
++
++	eth at pcie {
++		compatible = "intel,i211";
++		local-mac-address = [FF FF FF FF FF FF];
++		status = "okay";
++	};
++
++	gpio-keys {
++		compatible = "gpio-keys";
++		power {
++			label = "Power Button";
++			gpios = <&gpio1 29 1>;
++			linux,code = <116>; /* KEY_POWER */
++			gpio-key,wakeup;
++		};
++	};
++
++	i2cmux {
++		compatible = "i2c-mux-gpio";
++		#address-cells = <1>;
++		#size-cells = <0>;
++		mux-gpios = <&gpio1 2 0>;
++		i2c-parent = <&i2c1>;
++
++		i2c at 0 {
++			reg = <0>;
++			#address-cells = <1>;
++			#size-cells = <0>;
++
++			eeprom at 50 {
++				compatible = "at24,24c02";
++				reg = <0x50>;
++				pagesize = <16>;
++			};
++
++			rtc at 56 {
++				compatible = "emmicro,em3027";
++				reg = <0x56>;
++			};
++		};
++
++		i2c at 1 {
++			reg = <1>;
++			#address-cells = <1>;
++			#size-cells = <0>;
++
++			dvi: edid at 50 {
++				compatible = "fsl,imx6-hdmi-i2c";
++				reg = <0x50>;
++			};
++		};
++	};
++};
++
++&iomuxc {
++	imx6q-sbc-fx6m {
++		/* pins for uart2 */
++		pinctrl_uart2: uart2grp {
++			fsl,pins = <
++				MX6QDL_PAD_GPIO_7__UART2_TX_DATA 0x1b0b1
++				MX6QDL_PAD_GPIO_8__UART2_RX_DATA 0x1b0b1
++				MX6QDL_PAD_SD4_DAT5__UART2_RTS_B 0x1b0b1
++				MX6QDL_PAD_SD4_DAT6__UART2_CTS_B 0x1b0b1
++		>;
++		};
++	};
++};
++
++&i2c1 {
++	status = "okay";
++};
++
++&usdhc3 {
++	status = "okay";
++};
++
++/* rear serial console */
++&uart2 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_uart2>;
++	fsl,uart-has-rtscts;
++	status = "okay";
++};
++
++&mxcfb1 {
++	status = "okay";
++};
++
++&mxcfb2 {
++	status = "okay";
++};
+diff --git a/arch/arm/boot/dts/imx6qdl-sb-fx6x.dtsi b/arch/arm/boot/dts/imx6qdl-sb-fx6x.dtsi
+new file mode 100644
+index 0000000..01f73ae
+--- /dev/null
++++ b/arch/arm/boot/dts/imx6qdl-sb-fx6x.dtsi
+@@ -0,0 +1,110 @@
++/*
++ * Copyright 2014 CompuLab Ltd.
++ *
++ * Author: Valentin Raevsky <valentin at compulab.co.il>
++ *
++ * The code contained herein is licensed under the GNU General Public
++ * License. You may obtain a copy of the GNU General Public License
++ * Version 2 or later at the following locations:
++ *
++ * http://www.opensource.org/licenses/gpl-license.html
++ * http://www.gnu.org/copyleft/gpl.html
++ */
++
++/ {
++	regulators {
++		compatible = "simple-bus";
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		/* regulator for mmc */
++		reg_3p3v: 3p3v {
++			compatible = "regulator-fixed";
++			regulator-name = "3P3V";
++			regulator-min-microvolt = <3300000>;
++			regulator-max-microvolt = <3300000>;
++			regulator-always-on;
++		};
++	};
++
++};
++
++&iomuxc {
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_hog>, <&pinctrl_dvi0>;
++
++	imx6q-sb-fx6x {
++		/* pins for i2c1 */
++		pinctrl_i2c1: i2c1grp {
++			fsl,pins = <
++				MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
++				MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
++			>;
++		};
++
++		/* pins for mmc */
++		pinctrl_usdhc3: usdhc3grp {
++			fsl,pins = <
++				MX6QDL_PAD_SD3_CMD__SD3_CMD    0x17059
++				MX6QDL_PAD_SD3_CLK__SD3_CLK    0x10059
++				MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
++				MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
++				MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
++				MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
++				MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x80000000
++				MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x80000000
++			>;
++		};
++
++		pinctrl_usdhc3_100mhz: usdhc3grp-100mhz { /* 100Mhz */
++			fsl,pins = <
++				MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170B9
++				MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100B9
++				MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170B9
++				MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170B9
++				MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170B9
++				MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170B9
++			>;
++		};
++
++		pinctrl_usdhc3_200mhz: usdhc3grp-200mhz { /* 200Mhz */
++			fsl,pins = <
++				MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170F9
++				MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100F9
++				MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170F9
++				MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170F9
++				MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170F9
++				MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170F9
++			>;
++		};
++
++		/* pins for dvi/ts */
++		pinctrl_dvi0: dvi0grp {
++			fsl,pins = <
++				/* DVI_DDC_SEL */
++				MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x80000000
++				/* SB-FX6 Himax TS PENDOWN or SB-FX6m DVI HPD */
++				MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x80000000
++			>;
++		};
++	};
++};
++
++/* i2c1 */
++&i2c1 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_i2c1>;
++	status = "disabled";
++};
++
++/* mmc */
++&usdhc3 {
++	pinctrl-names = "default", "state_100mhz", "state_200mhz";
++	pinctrl-0 = <&pinctrl_usdhc3>;
++	pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
++	pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
++	cd-gpios = <&gpio7 1 0>;
++	no-1-8-v;
++	vmmc-supply = <&reg_3p3v>;
++	status = "disabled";
++};
+diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi
+index 2cb5ae0..b6df3fd 100644
+--- a/arch/arm/boot/dts/imx6qdl.dtsi
++++ b/arch/arm/boot/dts/imx6qdl.dtsi
+@@ -823,6 +823,7 @@
+ 				interrupts = <0 118 0x04 0 119 0x04>;
+ 				clocks = <&clks 117>, <&clks 117>, <&clks 190>;
+ 				clock-names = "ipg", "ahb", "ptp";
++				local-mac-address = [FF FF FF FF FF FF];
+ 				status = "disabled";
+ 			};
+ 
+diff --git a/arch/arm/configs/cm_fx6_defconfig b/arch/arm/configs/cm_fx6_defconfig
+new file mode 100644
+index 0000000..a4be268
+--- /dev/null
++++ b/arch/arm/configs/cm_fx6_defconfig
+@@ -0,0 +1,457 @@
++CONFIG_LOCALVERSION="-cm-fx6-1-beta4"
++CONFIG_KERNEL_LZO=y
++CONFIG_SYSVIPC=y
++CONFIG_NO_HZ=y
++CONFIG_HIGH_RES_TIMERS=y
++CONFIG_IKCONFIG=y
++CONFIG_IKCONFIG_PROC=y
++CONFIG_LOG_BUF_SHIFT=18
++CONFIG_CGROUPS=y
++CONFIG_RELAY=y
++CONFIG_BLK_DEV_INITRD=y
++CONFIG_EXPERT=y
++CONFIG_PERF_EVENTS=y
++# CONFIG_SLUB_DEBUG is not set
++# CONFIG_COMPAT_BRK is not set
++CONFIG_MODULES=y
++CONFIG_MODULE_UNLOAD=y
++CONFIG_MODVERSIONS=y
++CONFIG_MODULE_SRCVERSION_ALL=y
++# CONFIG_BLK_DEV_BSG is not set
++CONFIG_GPIO_PCA953X=y
++CONFIG_ARCH_MXC=y
++CONFIG_MXC_DEBUG_BOARD=y
++CONFIG_MACH_IMX51_DT=y
++CONFIG_MACH_EUKREA_CPUIMX51SD=y
++CONFIG_SOC_IMX53=y
++CONFIG_SOC_IMX6Q=y
++CONFIG_SOC_IMX6SL=y
++CONFIG_SOC_VF610=y
++CONFIG_MACH_CM_FX6=y
++# CONFIG_SWP_EMULATE is not set
++CONFIG_PCI=y
++CONFIG_PCI_IMX6=y
++CONFIG_SMP=y
++CONFIG_VMSPLIT_2G=y
++CONFIG_PREEMPT=y
++CONFIG_AEABI=y
++# CONFIG_OABI_COMPAT is not set
++CONFIG_HIGHMEM=y
++CONFIG_CMDLINE="console=ttymxc3,115200 root=/dev/mmcblk0p1 rootwait"
++CONFIG_CPU_FREQ=y
++CONFIG_CPU_FREQ_DEFAULT_GOV_INTERACTIVE=y
++CONFIG_CPU_FREQ_GOV_POWERSAVE=y
++CONFIG_CPU_FREQ_GOV_USERSPACE=y
++CONFIG_CPU_FREQ_GOV_ONDEMAND=y
++CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
++CONFIG_ARM_IMX6_CPUFREQ=y
++CONFIG_CPU_IDLE=y
++CONFIG_VFP=y
++CONFIG_NEON=y
++CONFIG_BINFMT_MISC=m
++CONFIG_PM_RUNTIME=y
++CONFIG_PM_DEBUG=y
++CONFIG_PM_TEST_SUSPEND=y
++CONFIG_NET=y
++CONFIG_PACKET=y
++CONFIG_UNIX=y
++CONFIG_INET=y
++CONFIG_IP_PNP=y
++CONFIG_IP_PNP_DHCP=y
++# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
++# CONFIG_INET_XFRM_MODE_TUNNEL is not set
++# CONFIG_INET_XFRM_MODE_BEET is not set
++# CONFIG_INET_LRO is not set
++CONFIG_IPV6=y
++CONFIG_NETFILTER=y
++CONFIG_NETFILTER_DEBUG=y
++CONFIG_NF_CONNTRACK=m
++CONFIG_NF_CONNTRACK_FTP=m
++CONFIG_NF_CONNTRACK_TFTP=m
++CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m
++CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m
++CONFIG_NETFILTER_XT_TARGET_CONNMARK=m
++CONFIG_NETFILTER_XT_TARGET_DSCP=m
++CONFIG_NETFILTER_XT_TARGET_IDLETIMER=m
++CONFIG_NETFILTER_XT_TARGET_LED=m
++CONFIG_NETFILTER_XT_TARGET_MARK=m
++CONFIG_NETFILTER_XT_TARGET_NFLOG=m
++CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m
++CONFIG_NETFILTER_XT_TARGET_NOTRACK=m
++CONFIG_NETFILTER_XT_TARGET_TEE=m
++CONFIG_NETFILTER_XT_TARGET_TRACE=m
++CONFIG_NETFILTER_XT_TARGET_TCPMSS=m
++CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP=m
++CONFIG_NETFILTER_XT_MATCH_ADDRTYPE=m
++CONFIG_NETFILTER_XT_MATCH_CLUSTER=m
++CONFIG_NETFILTER_XT_MATCH_COMMENT=m
++CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m
++CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m
++CONFIG_NETFILTER_XT_MATCH_CONNMARK=m
++CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m
++CONFIG_NETFILTER_XT_MATCH_CPU=m
++CONFIG_NETFILTER_XT_MATCH_DEVGROUP=m
++CONFIG_NETFILTER_XT_MATCH_DSCP=m
++CONFIG_NETFILTER_XT_MATCH_ESP=m
++CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m
++CONFIG_NETFILTER_XT_MATCH_HELPER=m
++CONFIG_NETFILTER_XT_MATCH_IPRANGE=m
++CONFIG_NETFILTER_XT_MATCH_LENGTH=m
++CONFIG_NETFILTER_XT_MATCH_LIMIT=m
++CONFIG_NETFILTER_XT_MATCH_MAC=m
++CONFIG_NETFILTER_XT_MATCH_MARK=m
++CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m
++CONFIG_NETFILTER_XT_MATCH_OSF=m
++CONFIG_NETFILTER_XT_MATCH_OWNER=m
++CONFIG_NETFILTER_XT_MATCH_POLICY=m
++CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m
++CONFIG_NETFILTER_XT_MATCH_QUOTA=m
++CONFIG_NETFILTER_XT_MATCH_RATEEST=m
++CONFIG_NETFILTER_XT_MATCH_REALM=m
++CONFIG_NETFILTER_XT_MATCH_RECENT=m
++CONFIG_NETFILTER_XT_MATCH_STATE=m
++CONFIG_NETFILTER_XT_MATCH_STATISTIC=m
++CONFIG_NETFILTER_XT_MATCH_STRING=m
++CONFIG_NETFILTER_XT_MATCH_TCPMSS=m
++CONFIG_NETFILTER_XT_MATCH_TIME=m
++CONFIG_NETFILTER_XT_MATCH_U32=m
++CONFIG_NF_CONNTRACK_IPV4=m
++CONFIG_IP_NF_IPTABLES=y
++CONFIG_IP_NF_MATCH_AH=m
++CONFIG_IP_NF_MATCH_ECN=m
++CONFIG_IP_NF_MATCH_RPFILTER=m
++CONFIG_IP_NF_MATCH_TTL=m
++CONFIG_IP_NF_FILTER=y
++CONFIG_IP_NF_TARGET_REJECT=y
++CONFIG_IP_NF_TARGET_ULOG=m
++CONFIG_NF_NAT_IPV4=m
++CONFIG_IP_NF_TARGET_MASQUERADE=m
++CONFIG_IP_NF_TARGET_NETMAP=m
++CONFIG_IP_NF_TARGET_REDIRECT=m
++CONFIG_IP_NF_MANGLE=m
++CONFIG_IP_NF_TARGET_ECN=m
++CONFIG_IP_NF_TARGET_TTL=m
++CONFIG_IP_NF_RAW=m
++CONFIG_IP_NF_ARPTABLES=m
++CONFIG_IP_NF_ARPFILTER=m
++CONFIG_IP_NF_ARP_MANGLE=m
++CONFIG_VLAN_8021Q=m
++CONFIG_VLAN_8021Q_GVRP=y
++CONFIG_CAN=y
++CONFIG_CAN_FLEXCAN=y
++CONFIG_BT=m
++CONFIG_BT_MRVL=m
++CONFIG_BT_MRVL_SDIO=m
++CONFIG_CFG80211=y
++CONFIG_CFG80211_WEXT=y
++CONFIG_MAC80211=y
++CONFIG_DEVTMPFS=y
++CONFIG_DEVTMPFS_MOUNT=y
++# CONFIG_STANDALONE is not set
++CONFIG_CMA=y
++CONFIG_CMA_SIZE_MBYTES=320
++CONFIG_IMX_WEIM=y
++CONFIG_CONNECTOR=y
++CONFIG_MTD=y
++CONFIG_MTD_CMDLINE_PARTS=y
++CONFIG_MTD_BLOCK=y
++CONFIG_MTD_CFI=y
++CONFIG_MTD_JEDECPROBE=y
++CONFIG_MTD_CFI_INTELEXT=y
++CONFIG_MTD_CFI_AMDSTD=y
++CONFIG_MTD_CFI_STAA=y
++CONFIG_MTD_PHYSMAP_OF=y
++CONFIG_MTD_DATAFLASH=y
++CONFIG_MTD_M25P80=y
++CONFIG_MTD_SST25L=y
++CONFIG_MTD_NAND=y
++CONFIG_MTD_NAND_GPMI_NAND=y
++CONFIG_MTD_NAND_MXC=y
++CONFIG_MTD_UBI=y
++CONFIG_BLK_DEV_LOOP=y
++CONFIG_BLK_DEV_RAM=y
++CONFIG_BLK_DEV_RAM_SIZE=65536
++CONFIG_EEPROM_AT24=y
++CONFIG_EEPROM_AT25=y
++# CONFIG_SCSI_PROC_FS is not set
++CONFIG_BLK_DEV_SD=y
++CONFIG_SCSI_MULTI_LUN=y
++CONFIG_SCSI_CONSTANTS=y
++CONFIG_SCSI_LOGGING=y
++CONFIG_SCSI_SCAN_ASYNC=y
++# CONFIG_SCSI_LOWLEVEL is not set
++CONFIG_ATA=y
++CONFIG_SATA_AHCI=y
++CONFIG_SATA_AHCI_PLATFORM=y
++CONFIG_AHCI_IMX=y
++CONFIG_PATA_IMX=y
++CONFIG_NETDEVICES=y
++CONFIG_TUN=m
++# CONFIG_NET_VENDOR_BROADCOM is not set
++CONFIG_CS89x0=y
++CONFIG_CS89x0_PLATFORM=y
++# CONFIG_NET_VENDOR_FARADAY is not set
++CONFIG_IGB=m
++# CONFIG_NET_VENDOR_MARVELL is not set
++# CONFIG_NET_VENDOR_MICREL is not set
++# CONFIG_NET_VENDOR_MICROCHIP is not set
++# CONFIG_NET_VENDOR_NATSEMI is not set
++# CONFIG_NET_VENDOR_SEEQ is not set
++CONFIG_SMC91X=y
++CONFIG_SMC911X=y
++CONFIG_SMSC911X=y
++# CONFIG_NET_VENDOR_STMICRO is not set
++CONFIG_ATH_CARDS=y
++CONFIG_ATH6KL=m
++CONFIG_ATH6KL_SDIO=m
++CONFIG_MWIFIEX=m
++CONFIG_MWIFIEX_SDIO=m
++# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
++CONFIG_INPUT_EVDEV=y
++CONFIG_INPUT_EVBUG=m
++CONFIG_KEYBOARD_GPIO=y
++CONFIG_KEYBOARD_IMX=y
++CONFIG_MOUSE_PS2=m
++CONFIG_MOUSE_PS2_ELANTECH=y
++CONFIG_INPUT_TOUCHSCREEN=y
++CONFIG_TOUCHSCREEN_EGALAX=y
++CONFIG_TOUCHSCREEN_ELAN=y
++CONFIG_TOUCHSCREEN_MAX11801=y
++CONFIG_TOUCHSCREEN_MC13783=y
++CONFIG_INPUT_MISC=y
++CONFIG_INPUT_MMA8450=y
++CONFIG_INPUT_ISL29023=y
++CONFIG_SERIO_SERPORT=m
++CONFIG_VT_HW_CONSOLE_BINDING=y
++# CONFIG_LEGACY_PTYS is not set
++# CONFIG_DEVKMEM is not set
++CONFIG_SERIAL_IMX=y
++CONFIG_SERIAL_IMX_CONSOLE=y
++CONFIG_SERIAL_FSL_LPUART=y
++CONFIG_SERIAL_FSL_LPUART_CONSOLE=y
++CONFIG_FSL_OTP=y
++CONFIG_MXS_VIIM=y
++# CONFIG_I2C_COMPAT is not set
++CONFIG_I2C_CHARDEV=y
++CONFIG_I2C_MUX=y
++CONFIG_I2C_MUX_GPIO=y
++CONFIG_I2C_MUX_PCA954x=y
++# CONFIG_I2C_HELPER_AUTO is not set
++CONFIG_I2C_ALGOPCF=m
++CONFIG_I2C_ALGOPCA=m
++CONFIG_I2C_IMX=y
++CONFIG_SPI=y
++CONFIG_SPI_IMX=y
++CONFIG_GPIO_SYSFS=y
++CONFIG_POWER_SUPPLY=y
++CONFIG_SABRESD_MAX8903=y
++CONFIG_IMX6_USB_CHARGER=y
++CONFIG_SENSORS_MAX17135=y
++CONFIG_SENSORS_MAG3110=y
++CONFIG_THERMAL=y
++CONFIG_CPU_THERMAL=y
++CONFIG_IMX_THERMAL=y
++CONFIG_DEVICE_THERMAL=y
++CONFIG_WATCHDOG=y
++CONFIG_IMX2_WDT=y
++CONFIG_MFD_DA9052_I2C=y
++CONFIG_MFD_MC13XXX_SPI=y
++CONFIG_MFD_MC13XXX_I2C=y
++CONFIG_MFD_MAX17135=y
++CONFIG_MFD_SI476X_CORE=y
++CONFIG_REGULATOR=y
++CONFIG_REGULATOR_DUMMY=y
++CONFIG_REGULATOR_FIXED_VOLTAGE=y
++CONFIG_REGULATOR_DA9052=y
++CONFIG_REGULATOR_ANATOP=y
++CONFIG_REGULATOR_MC13783=y
++CONFIG_REGULATOR_MC13892=y
++CONFIG_REGULATOR_MAX17135=y
++CONFIG_REGULATOR_PFUZE100=y
++CONFIG_MEDIA_SUPPORT=y
++CONFIG_MEDIA_CAMERA_SUPPORT=y
++CONFIG_MEDIA_RADIO_SUPPORT=y
++CONFIG_VIDEO_V4L2_INT_DEVICE=y
++CONFIG_MEDIA_USB_SUPPORT=y
++CONFIG_USB_VIDEO_CLASS=m
++CONFIG_V4L_PLATFORM_DRIVERS=y
++CONFIG_VIDEO_MXC_OUTPUT=y
++CONFIG_VIDEO_MXC_CAPTURE=m
++CONFIG_VIDEO_MXC_CSI_CAMERA=m
++CONFIG_MXC_CAMERA_OV5640=m
++CONFIG_MXC_CAMERA_OV5642=m
++CONFIG_MXC_CAMERA_OV5640_MIPI=m
++CONFIG_MXC_TVIN_ADV7180=m
++CONFIG_MXC_IPU_DEVICE_QUEUE_SDC=m
++CONFIG_VIDEO_MXC_IPU_OUTPUT=y
++CONFIG_VIDEO_MXC_PXP_V4L2=y
++CONFIG_SOC_CAMERA=y
++CONFIG_VIDEO_MX3=y
++CONFIG_RADIO_SI476X=y
++CONFIG_SOC_CAMERA_OV2640=y
++CONFIG_DRM=y
++CONFIG_DRM_VIVANTE=y
++CONFIG_FB=y
++CONFIG_FB_MXS=y
++CONFIG_BACKLIGHT_LCD_SUPPORT=y
++CONFIG_LCD_CLASS_DEVICE=y
++CONFIG_LCD_L4F00242T03=y
++CONFIG_LCD_PLATFORM=y
++CONFIG_BACKLIGHT_CLASS_DEVICE=y
++CONFIG_BACKLIGHT_PWM=y
++CONFIG_FB_MXC_SYNC_PANEL=y
++CONFIG_FB_MXC_LDB=y
++CONFIG_FB_MXC_MIPI_DSI=y
++CONFIG_FB_MXC_TRULY_WVGA_SYNC_PANEL=y
++CONFIG_FB_MXC_HDMI=y
++CONFIG_FB_MXC_EINK_PANEL=y
++CONFIG_FB_MXS_SII902X=y
++CONFIG_HANNSTAR_CABC=y
++CONFIG_FRAMEBUFFER_CONSOLE=y
++CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
++CONFIG_FONTS=y
++CONFIG_FONT_8x8=y
++CONFIG_FONT_8x16=y
++CONFIG_LOGO=y
++CONFIG_SOUND=y
++CONFIG_SND=y
++CONFIG_SND_USB_AUDIO=m
++CONFIG_SND_SOC=y
++CONFIG_SND_IMX_SOC=y
++CONFIG_SND_SOC_EUKREA_TLV320=y
++CONFIG_SND_SOC_IMX_CS42888=y
++CONFIG_SND_SOC_IMX_WM8731=y
++CONFIG_SND_SOC_IMX_WM8962=y
++CONFIG_SND_SOC_IMX_SGTL5000=y
++CONFIG_SND_SOC_IMX_SPDIF=y
++CONFIG_SND_SOC_IMX_MC13783=y
++CONFIG_SND_SOC_IMX_HDMI=y
++CONFIG_SND_SOC_IMX_SI476X=y
++CONFIG_USB=y
++CONFIG_USB_OTG=y
++CONFIG_USB_EHCI_HCD=y
++CONFIG_USB_EHCI_MXC=y
++CONFIG_USB_EHCI_HCD_PLATFORM=y
++CONFIG_USB_STORAGE=y
++CONFIG_USB_CHIPIDEA=y
++CONFIG_USB_CHIPIDEA_UDC=y
++CONFIG_USB_CHIPIDEA_HOST=y
++CONFIG_USB_PHY=y
++CONFIG_NOP_USB_XCEIV=y
++CONFIG_USB_MXS_PHY=y
++CONFIG_USB_GADGET=y
++CONFIG_USB_FSL_USB2=y
++CONFIG_USB_ZERO=m
++CONFIG_USB_AUDIO=m
++CONFIG_USB_ETH=m
++CONFIG_USB_MASS_STORAGE=m
++CONFIG_USB_G_SERIAL=m
++CONFIG_MMC=y
++CONFIG_MMC_UNSAFE_RESUME=y
++CONFIG_MMC_SDHCI=y
++CONFIG_MMC_SDHCI_PLTFM=y
++CONFIG_MMC_SDHCI_ESDHC_IMX=y
++CONFIG_MXC_IPU=y
++CONFIG_MXC_GPU_VIV=y
++CONFIG_MXC_ASRC=y
++CONFIG_MXC_MIPI_CSI2=y
++CONFIG_MXC_MLB150=m
++CONFIG_NEW_LEDS=y
++CONFIG_LEDS_CLASS=y
++CONFIG_LEDS_GPIO=y
++CONFIG_LEDS_TRIGGERS=y
++CONFIG_LEDS_TRIGGER_HEARTBEAT=y
++CONFIG_LEDS_TRIGGER_GPIO=y
++CONFIG_RTC_CLASS=y
++CONFIG_RTC_INTF_DEV_UIE_EMUL=y
++CONFIG_RTC_DRV_EM3027=y
++CONFIG_RTC_DRV_MC13XXX=y
++CONFIG_RTC_DRV_MXC=y
++CONFIG_RTC_DRV_SNVS=y
++CONFIG_DMADEVICES=y
++CONFIG_MXC_PXP_V2=y
++CONFIG_IMX_SDMA=y
++CONFIG_MXS_DMA=y
++CONFIG_STAGING=y
++CONFIG_COMMON_CLK_DEBUG=y
++# CONFIG_IOMMU_SUPPORT is not set
++CONFIG_PWM=y
++CONFIG_PWM_IMX=y
++CONFIG_EXT2_FS=y
++CONFIG_EXT2_FS_XATTR=y
++CONFIG_EXT2_FS_POSIX_ACL=y
++CONFIG_EXT2_FS_SECURITY=y
++CONFIG_EXT3_FS=y
++CONFIG_EXT3_FS_POSIX_ACL=y
++CONFIG_EXT3_FS_SECURITY=y
++CONFIG_EXT4_FS=y
++CONFIG_EXT4_FS_POSIX_ACL=y
++CONFIG_EXT4_FS_SECURITY=y
++CONFIG_QUOTA=y
++CONFIG_QUOTA_NETLINK_INTERFACE=y
++# CONFIG_PRINT_QUOTA_WARNING is not set
++CONFIG_AUTOFS4_FS=y
++CONFIG_FUSE_FS=y
++CONFIG_ISO9660_FS=m
++CONFIG_JOLIET=y
++CONFIG_ZISOFS=y
++CONFIG_UDF_FS=m
++CONFIG_MSDOS_FS=m
++CONFIG_VFAT_FS=y
++CONFIG_TMPFS=y
++CONFIG_JFFS2_FS=y
++CONFIG_UBIFS_FS=y
++CONFIG_NFS_FS=y
++CONFIG_NFS_V3_ACL=y
++CONFIG_NFS_V4=y
++CONFIG_ROOT_NFS=y
++CONFIG_NLS_DEFAULT="cp437"
++CONFIG_NLS_CODEPAGE_437=y
++CONFIG_NLS_ASCII=y
++CONFIG_NLS_ISO8859_1=y
++CONFIG_NLS_ISO8859_15=m
++CONFIG_NLS_UTF8=y
++# CONFIG_SCHED_DEBUG is not set
++# CONFIG_DEBUG_BUGVERBOSE is not set
++# CONFIG_FTRACE is not set
++CONFIG_KGDB=y
++CONFIG_KGDB_KDB=y
++CONFIG_DEBUG_LL=y
++CONFIG_DEBUG_IMX6Q_UART=y
++CONFIG_DEBUG_IMX_UART_PORT=4
++CONFIG_EARLY_PRINTK=y
++CONFIG_SECURITYFS=y
++CONFIG_CRYPTO_USER=y
++CONFIG_CRYPTO_TEST=m
++CONFIG_CRYPTO_CCM=y
++CONFIG_CRYPTO_GCM=y
++CONFIG_CRYPTO_CBC=y
++CONFIG_CRYPTO_CTS=y
++CONFIG_CRYPTO_ECB=y
++CONFIG_CRYPTO_LRW=y
++CONFIG_CRYPTO_XTS=y
++CONFIG_CRYPTO_MD4=y
++CONFIG_CRYPTO_MD5=y
++CONFIG_CRYPTO_MICHAEL_MIC=y
++CONFIG_CRYPTO_RMD128=y
++CONFIG_CRYPTO_RMD160=y
++CONFIG_CRYPTO_RMD256=y
++CONFIG_CRYPTO_RMD320=y
++CONFIG_CRYPTO_SHA1=y
++CONFIG_CRYPTO_SHA256=y
++CONFIG_CRYPTO_SHA512=y
++CONFIG_CRYPTO_TGR192=y
++CONFIG_CRYPTO_WP512=y
++CONFIG_CRYPTO_BLOWFISH=y
++CONFIG_CRYPTO_CAMELLIA=y
++CONFIG_CRYPTO_DES=y
++CONFIG_CRYPTO_TWOFISH=y
++# CONFIG_CRYPTO_ANSI_CPRNG is not set
++CONFIG_CRYPTO_DEV_FSL_CAAM=y
++CONFIG_CRYPTO_DEV_FSL_CAAM_SM=y
++CONFIG_CRYPTO_DEV_FSL_CAAM_SM_TEST=y
++CONFIG_CRYPTO_DEV_FSL_CAAM_SECVIO=y
++CONFIG_CRC_CCITT=m
++CONFIG_CRC_T10DIF=y
++CONFIG_CRC7=m
++CONFIG_LIBCRC32C=m
+diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
+index 6c14172..f11a03f 100644
+--- a/arch/arm/mach-imx/Kconfig
++++ b/arch/arm/mach-imx/Kconfig
+@@ -857,6 +857,12 @@ config SOC_VF610
+ 	help
+ 	  This enable support for Freescale Vybrid VF610 processor.
+ 
++config MACH_CM_FX6
++	bool "CompuLab CM-FX6 Support"
++
++	help
++	  This enable support for CompuLab CM-FX6 board.
++
+ endif
+ 
+ source "arch/arm/mach-imx/devices/Kconfig"
+diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile
+index 87a323b..943d334 100644
+--- a/arch/arm/mach-imx/Makefile
++++ b/arch/arm/mach-imx/Makefile
+@@ -119,6 +119,7 @@ obj-$(CONFIG_MACH_EUKREA_MBIMXSD51_BASEBOARD) += eukrea_mbimxsd51-baseboard.o
+ 
+ obj-$(CONFIG_MACH_IMX51_DT) += imx51-dt.o
+ obj-$(CONFIG_SOC_IMX53) += mach-imx53.o
++obj-$(CONFIG_MACH_CM_FX6) += mach-cm_fx6.o
+ 
+ obj-$(CONFIG_SOC_VF610) += clk-vf610.o mach-vf610.o
+ 
+diff --git a/arch/arm/mach-imx/mach-cm_fx6.c b/arch/arm/mach-imx/mach-cm_fx6.c
+new file mode 100644
+index 0000000..a2a40f0
+--- /dev/null
++++ b/arch/arm/mach-imx/mach-cm_fx6.c
+@@ -0,0 +1,92 @@
++/*
++ *
++ * The code contained herein is licensed under the GNU General Public
++ * License. You may obtain a copy of the GNU General Public License
++ * Version 2 or later at the following locations:
++ *
++ * http://www.opensource.org/licenses/gpl-license.html
++ * http://www.gnu.org/copyleft/gpl.html
++ */
++
++#include <linux/module.h>
++#include <linux/of_platform.h>
++
++#include <linux/delay.h>
++#include <linux/err.h>
++#include <linux/io.h>
++#include <linux/of.h>
++#include <linux/of_address.h>
++#include <linux/mfd/syscon.h>
++#include <linux/regmap.h>
++#include "common.h"
++#include "hardware.h"
++#include <linux/string.h>
++
++
++extern unsigned int system_rev;
++static unsigned int _system_rev;
++
++#define ANADIG_DIGPROG		0x260
++#define ANADIG_DIGPROG_IMX6SL	0x280
++
++extern unsigned int __mxc_cpu_type;
++
++static void revision_from_anatop(void)
++{
++	struct device_node *np;
++	void __iomem *anatop_base;
++	u32 cpu_type;
++	u16 offset = ANADIG_DIGPROG;
++	u32 fsl_system_rev = 0;
++
++	np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-anatop");
++	anatop_base = of_iomap(np, 0);
++	WARN_ON(!anatop_base);
++	if (of_device_is_compatible(np, "fsl,imx6sl-anatop"))
++		offset = ANADIG_DIGPROG_IMX6SL;
++	cpu_type = readl_relaxed(anatop_base + offset);
++	iounmap(anatop_base);
++
++	/* Chip Silicon ID */
++	fsl_system_rev = ((cpu_type >> 16) & 0xFF) << 12;
++	/* Chip silicon major revision */
++	fsl_system_rev |= ((cpu_type >> 8) & 0xFF) << 4;
++	fsl_system_rev += 0x10;
++	/* Chip silicon minor revision */
++	fsl_system_rev |= cpu_type & 0xFF;
++
++	/*
++	 * Move the CompuLab board revision to a different variable,
++	 * so we can use it anytime it is needed.
++	 * Put the Freescale silicon revision information to the place where
++	 * the userspace video libraries expect it to be.
++	 */
++	system_rev = fsl_system_rev;
++}
++
++static int cm_fx6_init(void)
++{
++	struct device_node *np;
++
++	np = of_find_compatible_node(NULL, NULL, "compulab,cm-fx6");
++
++	if (!np)
++		return -EINVAL;
++
++	_system_rev = system_rev;
++	revision_from_anatop();
++
++	return 0;
++}
++
++static void __exit cm_fx6_exit(void)
++{
++	system_rev = _system_rev;
++}
++module_init(cm_fx6_init);
++module_exit(cm_fx6_exit);
++
++MODULE_AUTHOR("CompuLab, Ltd.");
++MODULE_DESCRIPTION("CompuLab CM-FX6 machine driver");
++MODULE_LICENSE("GPL v2");
++MODULE_ALIAS("platform:cm-fx6");
+diff --git a/drivers/bluetooth/btmrvl_drv.h b/drivers/bluetooth/btmrvl_drv.h
+index 27068d1..9e81a3d0 100644
+--- a/drivers/bluetooth/btmrvl_drv.h
++++ b/drivers/bluetooth/btmrvl_drv.h
+@@ -66,6 +66,7 @@ struct btmrvl_adapter {
+ 	u8 hs_state;
+ 	u8 wakeup_tries;
+ 	wait_queue_head_t cmd_wait_q;
++	wait_queue_head_t event_hs_wait_q;
+ 	u8 cmd_complete;
+ 	bool is_suspended;
+ };
+@@ -86,11 +87,12 @@ struct btmrvl_private {
+ 
+ #define MRVL_VENDOR_PKT			0xFE
+ 
+-/* Bluetooth commands  */
+-#define BT_CMD_AUTO_SLEEP_MODE		0x23
+-#define BT_CMD_HOST_SLEEP_CONFIG	0x59
+-#define BT_CMD_HOST_SLEEP_ENABLE	0x5A
+-#define BT_CMD_MODULE_CFG_REQ		0x5B
++/* Vendor specific Bluetooth commands */
++#define BT_CMD_AUTO_SLEEP_MODE		0xFC23
++#define BT_CMD_HOST_SLEEP_CONFIG	0xFC59
++#define BT_CMD_HOST_SLEEP_ENABLE	0xFC5A
++#define BT_CMD_MODULE_CFG_REQ		0xFC5B
++#define BT_CMD_LOAD_CONFIG_DATA		0xFC61
+ 
+ /* Sub-commands: Module Bringup/Shutdown Request/Response */
+ #define MODULE_BRINGUP_REQ		0xF1
+@@ -99,6 +101,11 @@ struct btmrvl_private {
+ 
+ #define MODULE_SHUTDOWN_REQ		0xF2
+ 
++/* Vendor specific Bluetooth events */
++#define BT_EVENT_AUTO_SLEEP_MODE	0x23
++#define BT_EVENT_HOST_SLEEP_CONFIG	0x59
++#define BT_EVENT_HOST_SLEEP_ENABLE	0x5A
++#define BT_EVENT_MODULE_CFG_REQ		0x5B
+ #define BT_EVENT_POWER_STATE		0x20
+ 
+ /* Bluetooth Power States */
+@@ -106,8 +113,6 @@ struct btmrvl_private {
+ #define BT_PS_DISABLE			0x03
+ #define BT_PS_SLEEP			0x01
+ 
+-#define OGF				0x3F
+-
+ /* Host Sleep states */
+ #define HS_ACTIVATED			0x01
+ #define HS_DEACTIVATED			0x00
+@@ -116,11 +121,8 @@ struct btmrvl_private {
+ #define PS_SLEEP			0x01
+ #define PS_AWAKE			0x00
+ 
+-struct btmrvl_cmd {
+-	__le16 ocf_ogf;
+-	u8 length;
+-	u8 data[4];
+-} __packed;
++#define BT_CAL_HDR_LEN			4
++#define BT_CAL_DATA_SIZE		28
+ 
+ struct btmrvl_event {
+ 	u8 ec;		/* event counter */
+diff --git a/drivers/bluetooth/btmrvl_main.c b/drivers/bluetooth/btmrvl_main.c
+index 9a9f518..5a57afb 100644
+--- a/drivers/bluetooth/btmrvl_main.c
++++ b/drivers/bluetooth/btmrvl_main.c
+@@ -19,7 +19,7 @@
+  **/
+ 
+ #include <linux/module.h>
+-
++#include <linux/of.h>
+ #include <net/bluetooth/bluetooth.h>
+ #include <net/bluetooth/hci_core.h>
+ 
+@@ -50,23 +50,19 @@ bool btmrvl_check_evtpkt(struct btmrvl_private *priv, struct sk_buff *skb)
+ 
+ 	if (hdr->evt == HCI_EV_CMD_COMPLETE) {
+ 		struct hci_ev_cmd_complete *ec;
+-		u16 opcode, ocf, ogf;
++		u16 opcode;
+ 
+ 		ec = (void *) (skb->data + HCI_EVENT_HDR_SIZE);
+ 		opcode = __le16_to_cpu(ec->opcode);
+-		ocf = hci_opcode_ocf(opcode);
+-		ogf = hci_opcode_ogf(opcode);
+ 
+-		if (ocf == BT_CMD_MODULE_CFG_REQ &&
+-					priv->btmrvl_dev.sendcmdflag) {
++		if (priv->btmrvl_dev.sendcmdflag) {
+ 			priv->btmrvl_dev.sendcmdflag = false;
+ 			priv->adapter->cmd_complete = true;
+ 			wake_up_interruptible(&priv->adapter->cmd_wait_q);
+ 		}
+ 
+-		if (ogf == OGF) {
+-			BT_DBG("vendor event skipped: ogf 0x%4.4x ocf 0x%4.4x",
+-			       ogf, ocf);
++		if (hci_opcode_ogf(opcode) == 0x3F) {
++			BT_DBG("vendor event skipped: opcode=%#4.4x", opcode);
+ 			kfree_skb(skb);
+ 			return false;
+ 		}
+@@ -90,7 +86,7 @@ int btmrvl_process_event(struct btmrvl_private *priv, struct sk_buff *skb)
+ 	}
+ 
+ 	switch (event->data[0]) {
+-	case BT_CMD_AUTO_SLEEP_MODE:
++	case BT_EVENT_AUTO_SLEEP_MODE:
+ 		if (!event->data[2]) {
+ 			if (event->data[1] == BT_PS_ENABLE)
+ 				adapter->psmode = 1;
+@@ -103,7 +99,7 @@ int btmrvl_process_event(struct btmrvl_private *priv, struct sk_buff *skb)
+ 		}
+ 		break;
+ 
+-	case BT_CMD_HOST_SLEEP_CONFIG:
++	case BT_EVENT_HOST_SLEEP_CONFIG:
+ 		if (!event->data[3])
+ 			BT_DBG("gpio=%x, gap=%x", event->data[1],
+ 							event->data[2]);
+@@ -111,19 +107,19 @@ int btmrvl_process_event(struct btmrvl_private *priv, struct sk_buff *skb)
+ 			BT_DBG("HSCFG command failed");
+ 		break;
+ 
+-	case BT_CMD_HOST_SLEEP_ENABLE:
++	case BT_EVENT_HOST_SLEEP_ENABLE:
+ 		if (!event->data[1]) {
+ 			adapter->hs_state = HS_ACTIVATED;
+ 			if (adapter->psmode)
+ 				adapter->ps_state = PS_SLEEP;
+-			wake_up_interruptible(&adapter->cmd_wait_q);
++			wake_up_interruptible(&adapter->event_hs_wait_q);
+ 			BT_DBG("HS ACTIVATED!");
+ 		} else {
+ 			BT_DBG("HS Enable failed");
+ 		}
+ 		break;
+ 
+-	case BT_CMD_MODULE_CFG_REQ:
++	case BT_EVENT_MODULE_CFG_REQ:
+ 		if (priv->btmrvl_dev.sendcmdflag &&
+ 				event->data[1] == MODULE_BRINGUP_REQ) {
+ 			BT_DBG("EVENT:%s",
+@@ -168,22 +164,24 @@ exit:
+ }
+ EXPORT_SYMBOL_GPL(btmrvl_process_event);
+ 
+-int btmrvl_send_module_cfg_cmd(struct btmrvl_private *priv, int subcmd)
++static int btmrvl_send_sync_cmd(struct btmrvl_private *priv, u16 opcode,
++				const void *param, u8 len)
+ {
+ 	struct sk_buff *skb;
+-	struct btmrvl_cmd *cmd;
+-	int ret = 0;
++	struct hci_command_hdr *hdr;
+ 
+-	skb = bt_skb_alloc(sizeof(*cmd), GFP_ATOMIC);
++	skb = bt_skb_alloc(HCI_COMMAND_HDR_SIZE + len, GFP_ATOMIC);
+ 	if (skb == NULL) {
+ 		BT_ERR("No free skb");
+ 		return -ENOMEM;
+ 	}
+ 
+-	cmd = (struct btmrvl_cmd *) skb_put(skb, sizeof(*cmd));
+-	cmd->ocf_ogf = cpu_to_le16(hci_opcode_pack(OGF, BT_CMD_MODULE_CFG_REQ));
+-	cmd->length = 1;
+-	cmd->data[0] = subcmd;
++	hdr = (struct hci_command_hdr *)skb_put(skb, HCI_COMMAND_HDR_SIZE);
++	hdr->opcode = cpu_to_le16(opcode);
++	hdr->plen = len;
++
++	if (len)
++		memcpy(skb_put(skb, len), param, len);
+ 
+ 	bt_cb(skb)->pkt_type = MRVL_VENDOR_PKT;
+ 
+@@ -194,19 +192,23 @@ int btmrvl_send_module_cfg_cmd(struct btmrvl_private *priv, int subcmd)
+ 
+ 	priv->adapter->cmd_complete = false;
+ 
+-	BT_DBG("Queue module cfg Command");
+-
+ 	wake_up_interruptible(&priv->main_thread.wait_q);
+ 
+ 	if (!wait_event_interruptible_timeout(priv->adapter->cmd_wait_q,
+ 				priv->adapter->cmd_complete,
+-				msecs_to_jiffies(WAIT_UNTIL_CMD_RESP))) {
+-		ret = -ETIMEDOUT;
+-		BT_ERR("module_cfg_cmd(%x): timeout: %d",
+-					subcmd, priv->btmrvl_dev.sendcmdflag);
+-	}
++				msecs_to_jiffies(WAIT_UNTIL_CMD_RESP)))
++		return -ETIMEDOUT;
+ 
+-	BT_DBG("module cfg Command done");
++	return 0;
++}
++
++int btmrvl_send_module_cfg_cmd(struct btmrvl_private *priv, int subcmd)
++{
++	int ret;
++
++	ret = btmrvl_send_sync_cmd(priv, BT_CMD_MODULE_CFG_REQ, &subcmd, 1);
++	if (ret)
++		BT_ERR("module_cfg_cmd(%x) failed\n", subcmd);
+ 
+ 	return ret;
+ }
+@@ -214,61 +216,36 @@ EXPORT_SYMBOL_GPL(btmrvl_send_module_cfg_cmd);
+ 
+ int btmrvl_send_hscfg_cmd(struct btmrvl_private *priv)
+ {
+-	struct sk_buff *skb;
+-	struct btmrvl_cmd *cmd;
+-
+-	skb = bt_skb_alloc(sizeof(*cmd), GFP_ATOMIC);
+-	if (!skb) {
+-		BT_ERR("No free skb");
+-		return -ENOMEM;
+-	}
++	int ret;
++	u8 param[2];
+ 
+-	cmd = (struct btmrvl_cmd *) skb_put(skb, sizeof(*cmd));
+-	cmd->ocf_ogf = cpu_to_le16(hci_opcode_pack(OGF,
+-						   BT_CMD_HOST_SLEEP_CONFIG));
+-	cmd->length = 2;
+-	cmd->data[0] = (priv->btmrvl_dev.gpio_gap & 0xff00) >> 8;
+-	cmd->data[1] = (u8) (priv->btmrvl_dev.gpio_gap & 0x00ff);
++	param[0] = (priv->btmrvl_dev.gpio_gap & 0xff00) >> 8;
++	param[1] = (u8) (priv->btmrvl_dev.gpio_gap & 0x00ff);
+ 
+-	bt_cb(skb)->pkt_type = MRVL_VENDOR_PKT;
++	BT_DBG("Sending HSCFG Command, gpio=0x%x, gap=0x%x",
++	       param[0], param[1]);
+ 
+-	skb->dev = (void *) priv->btmrvl_dev.hcidev;
+-	skb_queue_head(&priv->adapter->tx_queue, skb);
++	ret = btmrvl_send_sync_cmd(priv, BT_CMD_HOST_SLEEP_CONFIG, param, 2);
++	if (ret)
++		BT_ERR("HSCFG command failed\n");
+ 
+-	BT_DBG("Queue HSCFG Command, gpio=0x%x, gap=0x%x", cmd->data[0],
+-	       cmd->data[1]);
+-
+-	return 0;
++	return ret;
+ }
+ EXPORT_SYMBOL_GPL(btmrvl_send_hscfg_cmd);
+ 
+ int btmrvl_enable_ps(struct btmrvl_private *priv)
+ {
+-	struct sk_buff *skb;
+-	struct btmrvl_cmd *cmd;
+-
+-	skb = bt_skb_alloc(sizeof(*cmd), GFP_ATOMIC);
+-	if (skb == NULL) {
+-		BT_ERR("No free skb");
+-		return -ENOMEM;
+-	}
+-
+-	cmd = (struct btmrvl_cmd *) skb_put(skb, sizeof(*cmd));
+-	cmd->ocf_ogf = cpu_to_le16(hci_opcode_pack(OGF,
+-					BT_CMD_AUTO_SLEEP_MODE));
+-	cmd->length = 1;
++	int ret;
++	u8 param;
+ 
+ 	if (priv->btmrvl_dev.psmode)
+-		cmd->data[0] = BT_PS_ENABLE;
++		param = BT_PS_ENABLE;
+ 	else
+-		cmd->data[0] = BT_PS_DISABLE;
++		param = BT_PS_DISABLE;
+ 
+-	bt_cb(skb)->pkt_type = MRVL_VENDOR_PKT;
+-
+-	skb->dev = (void *) priv->btmrvl_dev.hcidev;
+-	skb_queue_head(&priv->adapter->tx_queue, skb);
+-
+-	BT_DBG("Queue PSMODE Command:%d", cmd->data[0]);
++	ret = btmrvl_send_sync_cmd(priv, BT_CMD_AUTO_SLEEP_MODE, &param, 1);
++	if (ret)
++		BT_ERR("PSMODE command failed\n");
+ 
+ 	return 0;
+ }
+@@ -276,36 +253,30 @@ EXPORT_SYMBOL_GPL(btmrvl_enable_ps);
+ 
+ int btmrvl_enable_hs(struct btmrvl_private *priv)
+ {
+-	struct sk_buff *skb;
+-	struct btmrvl_cmd *cmd;
+-	int ret = 0;
++	struct btmrvl_adapter *adapter = priv->adapter;
++	int ret;
+ 
+-	skb = bt_skb_alloc(sizeof(*cmd), GFP_ATOMIC);
+-	if (skb == NULL) {
+-		BT_ERR("No free skb");
+-		return -ENOMEM;
++	ret = btmrvl_send_sync_cmd(priv, BT_CMD_HOST_SLEEP_ENABLE, NULL, 0);
++	if (ret) {
++		BT_ERR("Host sleep enable command failed\n");
++		return ret;
+ 	}
+ 
+-	cmd = (struct btmrvl_cmd *) skb_put(skb, sizeof(*cmd));
+-	cmd->ocf_ogf = cpu_to_le16(hci_opcode_pack(OGF, BT_CMD_HOST_SLEEP_ENABLE));
+-	cmd->length = 0;
+-
+-	bt_cb(skb)->pkt_type = MRVL_VENDOR_PKT;
+-
+-	skb->dev = (void *) priv->btmrvl_dev.hcidev;
+-	skb_queue_head(&priv->adapter->tx_queue, skb);
+-
+-	BT_DBG("Queue hs enable Command");
+-
+-	wake_up_interruptible(&priv->main_thread.wait_q);
+-
+-	if (!wait_event_interruptible_timeout(priv->adapter->cmd_wait_q,
+-			priv->adapter->hs_state,
+-			msecs_to_jiffies(WAIT_UNTIL_HS_STATE_CHANGED))) {
++	ret = wait_event_interruptible_timeout(adapter->event_hs_wait_q,
++					       adapter->hs_state,
++			msecs_to_jiffies(WAIT_UNTIL_HS_STATE_CHANGED));
++	if (ret < 0) {
++		BT_ERR("event_hs_wait_q terminated (%d): %d,%d,%d",
++		       ret, adapter->hs_state, adapter->ps_state,
++		       adapter->wakeup_tries);
++	} else if (!ret) {
++		BT_ERR("hs_enable timeout: %d,%d,%d", adapter->hs_state,
++		       adapter->ps_state, adapter->wakeup_tries);
+ 		ret = -ETIMEDOUT;
+-		BT_ERR("timeout: %d, %d,%d", priv->adapter->hs_state,
+-						priv->adapter->ps_state,
+-						priv->adapter->wakeup_tries);
++	} else {
++		BT_DBG("host sleep enabled: %d,%d,%d", adapter->hs_state,
++		       adapter->ps_state, adapter->wakeup_tries);
++		ret = 0;
+ 	}
+ 
+ 	return ret;
+@@ -392,6 +363,7 @@ static void btmrvl_init_adapter(struct btmrvl_private *priv)
+ 	priv->adapter->ps_state = PS_AWAKE;
+ 
+ 	init_waitqueue_head(&priv->adapter->cmd_wait_q);
++	init_waitqueue_head(&priv->adapter->event_hs_wait_q);
+ }
+ 
+ static void btmrvl_free_adapter(struct btmrvl_private *priv)
+@@ -479,6 +451,72 @@ static int btmrvl_open(struct hci_dev *hdev)
+ 	return 0;
+ }
+ 
++static int btmrvl_download_cal_data(struct btmrvl_private *priv,
++				    u8 *data, int len)
++{
++	int ret;
++
++	data[0] = 0x00;
++	data[1] = 0x00;
++	data[2] = 0x00;
++	data[3] = len;
++
++	print_hex_dump_bytes("Calibration data: ",
++			     DUMP_PREFIX_OFFSET, data, BT_CAL_HDR_LEN + len);
++
++	ret = btmrvl_send_sync_cmd(priv, BT_CMD_LOAD_CONFIG_DATA, data,
++				   BT_CAL_HDR_LEN + len);
++	if (ret)
++		BT_ERR("Failed to download caibration data\n");
++
++	return 0;
++}
++
++static int btmrvl_cal_data_dt(struct btmrvl_private *priv)
++{
++	struct device_node *dt_node;
++	u8 cal_data[BT_CAL_HDR_LEN + BT_CAL_DATA_SIZE];
++	const char name[] = "btmrvl_caldata";
++	const char property[] = "btmrvl,caldata";
++	int ret;
++
++	dt_node = of_find_node_by_name(NULL, name);
++	if (!dt_node)
++		return -ENODEV;
++
++	ret = of_property_read_u8_array(dt_node, property,
++					cal_data + BT_CAL_HDR_LEN,
++					BT_CAL_DATA_SIZE);
++	if (ret)
++		return ret;
++
++	BT_DBG("Use cal data from device tree");
++	ret = btmrvl_download_cal_data(priv, cal_data, BT_CAL_DATA_SIZE);
++	if (ret) {
++		BT_ERR("Fail to download calibrate data");
++		return ret;
++	}
++
++	return 0;
++}
++
++static int btmrvl_setup(struct hci_dev *hdev)
++{
++	struct btmrvl_private *priv = hci_get_drvdata(hdev);
++
++	btmrvl_send_module_cfg_cmd(priv, MODULE_BRINGUP_REQ);
++
++	btmrvl_cal_data_dt(priv);
++
++	priv->btmrvl_dev.psmode = 1;
++	btmrvl_enable_ps(priv);
++
++	priv->btmrvl_dev.gpio_gap = 0xffff;
++	btmrvl_send_hscfg_cmd(priv);
++
++	return 0;
++}
++
+ /*
+  * This function handles the event generated by firmware, rx data
+  * received from firmware, and tx data sent from kernel.
+@@ -572,8 +610,7 @@ int btmrvl_register_hdev(struct btmrvl_private *priv)
+ 	hdev->flush = btmrvl_flush;
+ 	hdev->send = btmrvl_send_frame;
+ 	hdev->ioctl = btmrvl_ioctl;
+-
+-	btmrvl_send_module_cfg_cmd(priv, MODULE_BRINGUP_REQ);
++	hdev->setup = btmrvl_setup;
+ 
+ 	hdev->dev_type = priv->btmrvl_dev.dev_type;
+ 
+@@ -649,6 +686,7 @@ int btmrvl_remove_card(struct btmrvl_private *priv)
+ 	hdev = priv->btmrvl_dev.hcidev;
+ 
+ 	wake_up_interruptible(&priv->adapter->cmd_wait_q);
++	wake_up_interruptible(&priv->adapter->event_hs_wait_q);
+ 
+ 	kthread_stop(priv->main_thread.task);
+ 
+diff --git a/drivers/bluetooth/btmrvl_sdio.c b/drivers/bluetooth/btmrvl_sdio.c
+index 13693b7..df577b6 100644
+--- a/drivers/bluetooth/btmrvl_sdio.c
++++ b/drivers/bluetooth/btmrvl_sdio.c
+@@ -134,9 +134,11 @@ static const struct sdio_device_id btmrvl_sdio_ids[] = {
+ 	/* Marvell SD8787 Bluetooth device */
+ 	{ SDIO_DEVICE(SDIO_VENDOR_ID_MARVELL, 0x911A),
+ 			.driver_data = (unsigned long) &btmrvl_sdio_sd8787 },
++#ifdef SD8787_AMP
+ 	/* Marvell SD8787 Bluetooth AMP device */
+ 	{ SDIO_DEVICE(SDIO_VENDOR_ID_MARVELL, 0x911B),
+ 			.driver_data = (unsigned long) &btmrvl_sdio_sd8787 },
++#endif
+ 	/* Marvell SD8797 Bluetooth device */
+ 	{ SDIO_DEVICE(SDIO_VENDOR_ID_MARVELL, 0x912A),
+ 			.driver_data = (unsigned long) &btmrvl_sdio_sd8797 },
+@@ -1045,12 +1047,6 @@ static int btmrvl_sdio_probe(struct sdio_func *func,
+ 		goto disable_host_int;
+ 	}
+ 
+-	priv->btmrvl_dev.psmode = 1;
+-	btmrvl_enable_ps(priv);
+-
+-	priv->btmrvl_dev.gpio_gap = 0xffff;
+-	btmrvl_send_hscfg_cmd(priv);
+-
+ 	return 0;
+ 
+ disable_host_int:
+diff --git a/drivers/bluetooth/hci_vhci.c b/drivers/bluetooth/hci_vhci.c
+index d8b7aed..c04a3e6 100644
+--- a/drivers/bluetooth/hci_vhci.c
++++ b/drivers/bluetooth/hci_vhci.c
+@@ -24,6 +24,7 @@
+  */
+ 
+ #include <linux/module.h>
++#include <asm/unaligned.h>
+ 
+ #include <linux/kernel.h>
+ #include <linux/init.h>
+@@ -39,17 +40,17 @@
+ #include <net/bluetooth/bluetooth.h>
+ #include <net/bluetooth/hci_core.h>
+ 
+-#define VERSION "1.3"
++#define VERSION "1.4"
+ 
+ static bool amp;
+ 
+ struct vhci_data {
+ 	struct hci_dev *hdev;
+ 
+-	unsigned long flags;
+-
+ 	wait_queue_head_t read_wait;
+ 	struct sk_buff_head readq;
++
++	struct delayed_work open_timeout;
+ };
+ 
+ static int vhci_open_dev(struct hci_dev *hdev)
+@@ -99,16 +100,62 @@ static int vhci_send_frame(struct sk_buff *skb)
+ 	skb_queue_tail(&data->readq, skb);
+ 
+ 	wake_up_interruptible(&data->read_wait);
++	return 0;
++}
++
++static int vhci_create_device(struct vhci_data *data, __u8 dev_type)
++{
++	struct hci_dev *hdev;
++	struct sk_buff *skb;
++
++	skb = bt_skb_alloc(4, GFP_KERNEL);
++	if (!skb)
++		return -ENOMEM;
++
++	hdev = hci_alloc_dev();
++	if (!hdev) {
++		kfree_skb(skb);
++		return -ENOMEM;
++	}
++
++	data->hdev = hdev;
++
++	hdev->bus = HCI_VIRTUAL;
++	hdev->dev_type = dev_type;
++	hci_set_drvdata(hdev, data);
++
++	hdev->open  = vhci_open_dev;
++	hdev->close = vhci_close_dev;
++	hdev->flush = vhci_flush;
++	hdev->send  = vhci_send_frame;
+ 
++	if (hci_register_dev(hdev) < 0) {
++		BT_ERR("Can't register HCI device");
++		hci_free_dev(hdev);
++		data->hdev = NULL;
++		kfree_skb(skb);
++		return -EBUSY;
++	}
++
++	bt_cb(skb)->pkt_type = HCI_VENDOR_PKT;
++
++	*skb_put(skb, 1) = 0xff;
++	*skb_put(skb, 1) = dev_type;
++	put_unaligned_le16(hdev->id, skb_put(skb, 2));
++	skb_queue_tail(&data->readq, skb);
++
++	wake_up_interruptible(&data->read_wait);
+ 	return 0;
+ }
+ 
+ static inline ssize_t vhci_get_user(struct vhci_data *data,
+-					const char __user *buf, size_t count)
++				    const char __user *buf, size_t count)
+ {
+ 	struct sk_buff *skb;
++	__u8 pkt_type, dev_type;
++	int ret;
+ 
+-	if (count > HCI_MAX_FRAME_SIZE)
++	if (count < 2 || count > HCI_MAX_FRAME_SIZE)
+ 		return -EINVAL;
+ 
+ 	skb = bt_skb_alloc(count, GFP_KERNEL);
+@@ -120,27 +167,70 @@ static inline ssize_t vhci_get_user(struct vhci_data *data,
+ 		return -EFAULT;
+ 	}
+ 
+-	skb->dev = (void *) data->hdev;
+-	bt_cb(skb)->pkt_type = *((__u8 *) skb->data);
++	pkt_type = *((__u8 *) skb->data);
+ 	skb_pull(skb, 1);
+ 
+-	hci_recv_frame(skb);
++	switch (pkt_type) {
++	case HCI_EVENT_PKT:
++	case HCI_ACLDATA_PKT:
++	case HCI_SCODATA_PKT:
++		if (!data->hdev) {
++			kfree_skb(skb);
++			return -ENODEV;
++		}
++
++		skb->dev = (void *) data->hdev;
++		bt_cb(skb)->pkt_type = pkt_type;
++
++		ret = hci_recv_frame(skb);
++		break;
++
++	case HCI_VENDOR_PKT:
++		if (data->hdev) {
++			kfree_skb(skb);
++			return -EBADFD;
++		}
+ 
+-	return count;
++		cancel_delayed_work_sync(&data->open_timeout);
++
++		dev_type = *((__u8 *) skb->data);
++		skb_pull(skb, 1);
++
++		if (skb->len > 0) {
++			kfree_skb(skb);
++			return -EINVAL;
++		}
++
++		kfree_skb(skb);
++
++		if (dev_type != HCI_BREDR && dev_type != HCI_AMP)
++			return -EINVAL;
++
++		ret = vhci_create_device(data, dev_type);
++		break;
++
++	default:
++		kfree_skb(skb);
++		return -EINVAL;
++	}
++
++	return (ret < 0) ? ret : count;
+ }
+ 
+ static inline ssize_t vhci_put_user(struct vhci_data *data,
+-			struct sk_buff *skb, char __user *buf, int count)
++				    struct sk_buff *skb,
++				    char __user *buf, int count)
+ {
+ 	char __user *ptr = buf;
+-	int len, total = 0;
++	int len;
+ 
+ 	len = min_t(unsigned int, skb->len, count);
+ 
+ 	if (copy_to_user(ptr, skb->data, len))
+ 		return -EFAULT;
+ 
+-	total += len;
++	if (!data->hdev)
++		return len;
+ 
+ 	data->hdev->stat.byte_tx += len;
+ 
+@@ -148,21 +238,19 @@ static inline ssize_t vhci_put_user(struct vhci_data *data,
+ 	case HCI_COMMAND_PKT:
+ 		data->hdev->stat.cmd_tx++;
+ 		break;
+-
+ 	case HCI_ACLDATA_PKT:
+ 		data->hdev->stat.acl_tx++;
+ 		break;
+-
+ 	case HCI_SCODATA_PKT:
+ 		data->hdev->stat.sco_tx++;
+ 		break;
+ 	}
+ 
+-	return total;
++	return len;
+ }
+ 
+ static ssize_t vhci_read(struct file *file,
+-				char __user *buf, size_t count, loff_t *pos)
++			 char __user *buf, size_t count, loff_t *pos)
+ {
+ 	struct vhci_data *data = file->private_data;
+ 	struct sk_buff *skb;
+@@ -185,7 +273,7 @@ static ssize_t vhci_read(struct file *file,
+ 		}
+ 
+ 		ret = wait_event_interruptible(data->read_wait,
+-					!skb_queue_empty(&data->readq));
++					       !skb_queue_empty(&data->readq));
+ 		if (ret < 0)
+ 			break;
+ 	}
+@@ -194,7 +282,7 @@ static ssize_t vhci_read(struct file *file,
+ }
+ 
+ static ssize_t vhci_write(struct file *file,
+-			const char __user *buf, size_t count, loff_t *pos)
++			  const char __user *buf, size_t count, loff_t *pos)
+ {
+ 	struct vhci_data *data = file->private_data;
+ 
+@@ -213,10 +301,17 @@ static unsigned int vhci_poll(struct file *file, poll_table *wait)
+ 	return POLLOUT | POLLWRNORM;
+ }
+ 
++static void vhci_open_timeout(struct work_struct *work)
++{
++	struct vhci_data *data = container_of(work, struct vhci_data,
++					      open_timeout.work);
++
++	vhci_create_device(data, amp ? HCI_AMP : HCI_BREDR);
++}
++
+ static int vhci_open(struct inode *inode, struct file *file)
+ {
+ 	struct vhci_data *data;
+-	struct hci_dev *hdev;
+ 
+ 	data = kzalloc(sizeof(struct vhci_data), GFP_KERNEL);
+ 	if (!data)
+@@ -225,35 +320,13 @@ static int vhci_open(struct inode *inode, struct file *file)
+ 	skb_queue_head_init(&data->readq);
+ 	init_waitqueue_head(&data->read_wait);
+ 
+-	hdev = hci_alloc_dev();
+-	if (!hdev) {
+-		kfree(data);
+-		return -ENOMEM;
+-	}
+-
+-	data->hdev = hdev;
+-
+-	hdev->bus = HCI_VIRTUAL;
+-	hci_set_drvdata(hdev, data);
+-
+-	if (amp)
+-		hdev->dev_type = HCI_AMP;
+-
+-	hdev->open     = vhci_open_dev;
+-	hdev->close    = vhci_close_dev;
+-	hdev->flush    = vhci_flush;
+-	hdev->send     = vhci_send_frame;
+-
+-	if (hci_register_dev(hdev) < 0) {
+-		BT_ERR("Can't register HCI device");
+-		kfree(data);
+-		hci_free_dev(hdev);
+-		return -EBUSY;
+-	}
++	INIT_DELAYED_WORK(&data->open_timeout, vhci_open_timeout);
+ 
+ 	file->private_data = data;
+ 	nonseekable_open(inode, file);
+ 
++	schedule_delayed_work(&data->open_timeout, msecs_to_jiffies(1000));
++
+ 	return 0;
+ }
+ 
+@@ -262,8 +335,12 @@ static int vhci_release(struct inode *inode, struct file *file)
+ 	struct vhci_data *data = file->private_data;
+ 	struct hci_dev *hdev = data->hdev;
+ 
+-	hci_unregister_dev(hdev);
+-	hci_free_dev(hdev);
++	cancel_delayed_work_sync(&data->open_timeout);
++
++	if (hdev) {
++		hci_unregister_dev(hdev);
++		hci_free_dev(hdev);
++	}
+ 
+ 	file->private_data = NULL;
+ 	kfree(data);
+@@ -309,3 +386,4 @@ MODULE_AUTHOR("Marcel Holtmann <marcel at holtmann.org>");
+ MODULE_DESCRIPTION("Bluetooth virtual HCI driver ver " VERSION);
+ MODULE_VERSION(VERSION);
+ MODULE_LICENSE("GPL");
++MODULE_ALIAS("devname:vhci");
+diff --git a/drivers/input/touchscreen/Kconfig b/drivers/input/touchscreen/Kconfig
+index 041a3da..4d1a7a2 100644
+--- a/drivers/input/touchscreen/Kconfig
++++ b/drivers/input/touchscreen/Kconfig
+@@ -909,4 +909,14 @@ config TOUCHSCREEN_TPS6507X
+ 	  To compile this driver as a module, choose M here: the
+ 	  module will be called tps6507x_ts.
+ 
++config TOUCHSCREEN_HIMAX
++	tristate "Himax touchscreen support"
++	depends on I2C
++	help
++	  Say Y here if you have a Himax touchscreen and your
++	  board-specific setup code includes that in its table
++	  of I2C devices.
++
++	  If unsure, say N.
++
+ endif
+diff --git a/drivers/input/touchscreen/Makefile b/drivers/input/touchscreen/Makefile
+index a5dde29..cdba9e6 100644
+--- a/drivers/input/touchscreen/Makefile
++++ b/drivers/input/touchscreen/Makefile
+@@ -73,3 +73,4 @@ obj-$(CONFIG_TOUCHSCREEN_WM97XX_MAINSTONE)	+= mainstone-wm97xx.o
+ obj-$(CONFIG_TOUCHSCREEN_WM97XX_ZYLONITE)	+= zylonite-wm97xx.o
+ obj-$(CONFIG_TOUCHSCREEN_W90X900)	+= w90p910_ts.o
+ obj-$(CONFIG_TOUCHSCREEN_TPS6507X)	+= tps6507x-ts.o
++obj-$(CONFIG_TOUCHSCREEN_HIMAX)	+= himax_ts.o
+diff --git a/drivers/input/touchscreen/ads7846.c b/drivers/input/touchscreen/ads7846.c
+index 84ccf14..5695786 100644
+--- a/drivers/input/touchscreen/ads7846.c
++++ b/drivers/input/touchscreen/ads7846.c
+@@ -27,6 +27,9 @@
+ #include <linux/interrupt.h>
+ #include <linux/slab.h>
+ #include <linux/pm.h>
++#include <linux/of.h>
++#include <linux/of_gpio.h>
++#include <linux/of_device.h>
+ #include <linux/gpio.h>
+ #include <linux/spi/spi.h>
+ #include <linux/spi/ads7846.h>
+@@ -98,7 +101,7 @@ struct ads7846 {
+ 	struct spi_device	*spi;
+ 	struct regulator	*reg;
+ 
+-#if defined(CONFIG_HWMON) || defined(CONFIG_HWMON_MODULE)
++#if IS_ENABLED(CONFIG_HWMON)
+ 	struct attribute_group	*attr_group;
+ 	struct device		*hwmon;
+ #endif
+@@ -418,7 +421,7 @@ static int ads7845_read12_ser(struct device *dev, unsigned command)
+ 	return status;
+ }
+ 
+-#if defined(CONFIG_HWMON) || defined(CONFIG_HWMON_MODULE)
++#if IS_ENABLED(CONFIG_HWMON)
+ 
+ #define SHOW(name, var, adjust) static ssize_t \
+ name ## _show(struct device *dev, struct device_attribute *attr, char *buf) \
+@@ -961,9 +964,9 @@ static int ads7846_resume(struct device *dev)
+ static SIMPLE_DEV_PM_OPS(ads7846_pm, ads7846_suspend, ads7846_resume);
+ 
+ static int ads7846_setup_pendown(struct spi_device *spi,
+-					   struct ads7846 *ts)
++				 struct ads7846 *ts,
++				 const struct ads7846_platform_data *pdata)
+ {
+-	struct ads7846_platform_data *pdata = spi->dev.platform_data;
+ 	int err;
+ 
+ 	/*
+@@ -1003,7 +1006,7 @@ static int ads7846_setup_pendown(struct spi_device *spi,
+  * use formula #2 for pressure, not #3.
+  */
+ static void ads7846_setup_spi_msg(struct ads7846 *ts,
+-				const struct ads7846_platform_data *pdata)
++				  const struct ads7846_platform_data *pdata)
+ {
+ 	struct spi_message *m = &ts->msg[0];
+ 	struct spi_transfer *x = ts->xfer;
+@@ -1201,33 +1204,107 @@ static void ads7846_setup_spi_msg(struct ads7846 *ts,
+ 	spi_message_add_tail(x, m);
+ }
+ 
++#ifdef CONFIG_OF
++static const struct of_device_id ads7846_dt_ids[] = {
++	{ .compatible = "ti,tsc2046",	.data = (void *) 7846 },
++	{ .compatible = "ti,ads7843",	.data = (void *) 7843 },
++	{ .compatible = "ti,ads7845",	.data = (void *) 7845 },
++	{ .compatible = "ti,ads7846",	.data = (void *) 7846 },
++	{ .compatible = "ti,ads7873",	.data = (void *) 7873 },
++	{ }
++};
++MODULE_DEVICE_TABLE(of, ads7846_dt_ids);
++
++static const struct ads7846_platform_data *ads7846_probe_dt(struct device *dev)
++{
++	struct ads7846_platform_data *pdata;
++	struct device_node *node = dev->of_node;
++	const struct of_device_id *match;
++
++	if (!node) {
++		dev_err(dev, "Device does not have associated DT data\n");
++		return ERR_PTR(-EINVAL);
++	}
++
++	match = of_match_device(ads7846_dt_ids, dev);
++	if (!match) {
++		dev_err(dev, "Unknown device model\n");
++		return ERR_PTR(-EINVAL);
++	}
++
++	pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);
++	if (!pdata)
++		return ERR_PTR(-ENOMEM);
++
++	pdata->model = (unsigned long)match->data;
++
++	of_property_read_u16(node, "ti,vref-delay-usecs",
++			     &pdata->vref_delay_usecs);
++	of_property_read_u16(node, "ti,vref-mv", &pdata->vref_mv);
++	pdata->keep_vref_on = of_property_read_bool(node, "ti,keep-vref-on");
++
++	pdata->swap_xy = of_property_read_bool(node, "ti,swap-xy");
++
++	of_property_read_u16(node, "ti,settle-delay-usec",
++			     &pdata->settle_delay_usecs);
++	of_property_read_u16(node, "ti,penirq-recheck-delay-usecs",
++			     &pdata->penirq_recheck_delay_usecs);
++
++	of_property_read_u16(node, "ti,x-plate-ohms", &pdata->x_plate_ohms);
++	of_property_read_u16(node, "ti,y-plate-ohms", &pdata->y_plate_ohms);
++
++	of_property_read_u16(node, "ti,x-min", &pdata->x_min);
++	of_property_read_u16(node, "ti,y-min", &pdata->y_min);
++	of_property_read_u16(node, "ti,x-max", &pdata->x_max);
++	of_property_read_u16(node, "ti,y-max", &pdata->y_max);
++
++	of_property_read_u16(node, "ti,pressure-min", &pdata->pressure_min);
++	of_property_read_u16(node, "ti,pressure-max", &pdata->pressure_max);
++
++	of_property_read_u16(node, "ti,debounce-max", &pdata->debounce_max);
++	of_property_read_u16(node, "ti,debounce-tol", &pdata->debounce_tol);
++	of_property_read_u16(node, "ti,debounce-rep", &pdata->debounce_rep);
++
++	of_property_read_u32(node, "ti,pendown-gpio-debounce",
++			     &pdata->gpio_pendown_debounce);
++
++	pdata->wakeup = of_property_read_bool(node, "linux,wakeup");
++
++	pdata->gpio_pendown = of_get_named_gpio(dev->of_node, "pendown-gpio", 0);
++
++	return pdata;
++}
++#else
++static const struct ads7846_platform_data *ads7846_probe_dt(struct device *dev)
++{
++	dev_err(dev, "no platform data defined\n");
++	return ERR_PTR(-EINVAL);
++}
++#endif
++
+ static int ads7846_probe(struct spi_device *spi)
+ {
++	const struct ads7846_platform_data *pdata;
+ 	struct ads7846 *ts;
+ 	struct ads7846_packet *packet;
+ 	struct input_dev *input_dev;
+-	struct ads7846_platform_data *pdata = spi->dev.platform_data;
+ 	unsigned long irq_flags;
+ 	int err;
+ 
+ 	if (!spi->irq) {
+ 		dev_dbg(&spi->dev, "no IRQ?\n");
+-		return -ENODEV;
+-	}
+-
+-	if (!pdata) {
+-		dev_dbg(&spi->dev, "no platform data?\n");
+-		return -ENODEV;
++		return -EINVAL;
+ 	}
+ 
+ 	/* don't exceed max specified sample rate */
+ 	if (spi->max_speed_hz > (125000 * SAMPLE_BITS)) {
+-		dev_dbg(&spi->dev, "f(sample) %d KHz?\n",
++		dev_err(&spi->dev, "f(sample) %d KHz?\n",
+ 				(spi->max_speed_hz/SAMPLE_BITS)/1000);
+ 		return -EINVAL;
+ 	}
+ 
+-	/* We'd set TX word size 8 bits and RX word size to 13 bits ... except
++	/*
++	 * We'd set TX word size 8 bits and RX word size to 13 bits ... except
+ 	 * that even if the hardware can do that, the SPI controller driver
+ 	 * may not.  So we stick to very-portable 8 bit words, both RX and TX.
+ 	 */
+@@ -1250,17 +1327,25 @@ static int ads7846_probe(struct spi_device *spi)
+ 	ts->packet = packet;
+ 	ts->spi = spi;
+ 	ts->input = input_dev;
+-	ts->vref_mv = pdata->vref_mv;
+-	ts->swap_xy = pdata->swap_xy;
+ 
+ 	mutex_init(&ts->lock);
+ 	init_waitqueue_head(&ts->wait);
+ 
++	pdata = dev_get_platdata(&spi->dev);
++	if (!pdata) {
++		pdata = ads7846_probe_dt(&spi->dev);
++		if (IS_ERR(pdata))
++			return PTR_ERR(pdata);
++	}
++
+ 	ts->model = pdata->model ? : 7846;
+ 	ts->vref_delay_usecs = pdata->vref_delay_usecs ? : 100;
+ 	ts->x_plate_ohms = pdata->x_plate_ohms ? : 400;
+ 	ts->pressure_max = pdata->pressure_max ? : ~0;
+ 
++	ts->vref_mv = pdata->vref_mv;
++	ts->swap_xy = pdata->swap_xy;
++
+ 	if (pdata->filter != NULL) {
+ 		if (pdata->filter_init != NULL) {
+ 			err = pdata->filter_init(pdata, &ts->filter_data);
+@@ -1281,7 +1366,7 @@ static int ads7846_probe(struct spi_device *spi)
+ 		ts->filter = ads7846_no_filter;
+ 	}
+ 
+-	err = ads7846_setup_pendown(spi, ts);
++	err = ads7846_setup_pendown(spi, ts, pdata);
+ 	if (err)
+ 		goto err_cleanup_filter;
+ 
+@@ -1370,6 +1455,13 @@ static int ads7846_probe(struct spi_device *spi)
+ 
+ 	device_init_wakeup(&spi->dev, pdata->wakeup);
+ 
++	/*
++	 * If device does not carry platform data we must have allocated it
++	 * when parsing DT data.
++	 */
++	if (!dev_get_platdata(&spi->dev))
++		devm_kfree(&spi->dev, (void *)pdata);
++
+ 	return 0;
+ 
+  err_remove_attr_group:
+@@ -1437,6 +1529,7 @@ static struct spi_driver ads7846_driver = {
+ 		.name	= "ads7846",
+ 		.owner	= THIS_MODULE,
+ 		.pm	= &ads7846_pm,
++		.of_match_table = of_match_ptr(ads7846_dt_ids),
+ 	},
+ 	.probe		= ads7846_probe,
+ 	.remove		= ads7846_remove,
+diff --git a/drivers/input/touchscreen/himax_ts.c b/drivers/input/touchscreen/himax_ts.c
+new file mode 100644
+index 0000000..068e307
+--- /dev/null
++++ b/drivers/input/touchscreen/himax_ts.c
+@@ -0,0 +1,505 @@
++/*
++ * Touch Screen driver for Himax touchscreen controllers used in
++ * DataImage's I2C connected touchscreen panels.
++ *   Copyright (c) 2012 Anders Electronics
++ *   Copyright 2012 CompuLab Ltd, Dmitry Lifshitz <lifshitz at compulab.co.il>
++ *
++ * Based on migor_ts.c
++ *   Copyright (c) 2008 Magnus Damm
++ *   Copyright (c) 2007 Ujjwal Pande <ujjwal at kenati.com>
++ *
++ * This file is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU  General Public
++ * License as published by the Free Software Foundation; either
++ * version 2 of the License, or (at your option) any later version.
++ *
++ * This file is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
++ *  General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public
++ * License along with this library; if not, write to the Free Software
++ * Foundation, Inc.
++ */
++#include <linux/module.h>
++#include <linux/kernel.h>
++#include <linux/input.h>
++#include <linux/delay.h>
++#include <linux/interrupt.h>
++#include <linux/pm.h>
++#include <linux/slab.h>
++#include <linux/io.h>
++#include <linux/i2c.h>
++#include <linux/timer.h>
++#include <linux/input/mt.h>
++#include <linux/of.h>
++#include <linux/of_device.h>
++
++#define HX_MAX_X		480
++#define HX_MAX_Y		800
++
++#define HX_PNT_SIZE		4
++#define HX_EMPTY		0xFFFF
++
++struct himax_ts_initseq_entry {
++	char *cmd;
++	int count;
++	int delay_ms;
++};
++
++struct himax_ts_props_entry {
++	int model;
++	struct himax_ts_initseq_entry *initseq;
++	int initseq_size;
++	int packet_size;
++	int touch_points;
++	bool invert_x;
++	bool invert_y;
++	bool xy_order;
++};
++
++struct himax_ts_priv {
++	struct i2c_client *client;
++	struct himax_ts_props_entry *ts_props;
++	struct input_dev *input;
++	int prev_touches;
++	int irq;
++	char *buf;
++};
++
++static char hx85x_ic_poweron_cmd[]	= {0x81};
++static char hx85x_mcu_poweron_cmd[]	= {0x35, 0x02};
++static char hx85x_senseon_cmd[]		= {0x83};
++static char hx85x_senseoff_cmd[]	= {0x82};
++static char hx85x_get_id_cmd[]		= {0x31};
++static char hx85x_get_event_cmd[]	= {0x85};
++static char hx85x_get_sleep_cmd[]	= {0x63};
++
++static char hx8526_flash_poweron_cmd[]	= {0x36, 0x0F, 0x53};
++static char hx8526_fetch_flash_cmd[]	= {0xDD, 0x04, 0x02};
++
++static char hx8520_flash_poweron_cmd[]	= {0x36, 0x01};
++static char hx8520_speed_mode_cmd[]	= {0x9D, 0x80};
++
++static struct himax_ts_initseq_entry hx8526_initseq[] = {
++	{hx85x_ic_poweron_cmd,     ARRAY_SIZE(hx85x_ic_poweron_cmd), 120},
++	{hx85x_mcu_poweron_cmd,    ARRAY_SIZE(hx85x_mcu_poweron_cmd), 10},
++	{hx8526_flash_poweron_cmd, ARRAY_SIZE(hx8526_flash_poweron_cmd), 10},
++	{hx8526_fetch_flash_cmd,   ARRAY_SIZE(hx8526_fetch_flash_cmd), 10},
++};
++
++static struct himax_ts_initseq_entry hx8520_initseq[] = {
++	{hx85x_ic_poweron_cmd,     ARRAY_SIZE(hx85x_ic_poweron_cmd), 120},
++	{hx8520_speed_mode_cmd,    ARRAY_SIZE(hx8520_speed_mode_cmd), 10},
++	{hx85x_mcu_poweron_cmd,    ARRAY_SIZE(hx85x_mcu_poweron_cmd), 10},
++	{hx8520_flash_poweron_cmd, ARRAY_SIZE(hx8520_flash_poweron_cmd), 10},
++};
++
++static struct himax_ts_props_entry himax_ts_props[] = {
++	{
++		.model		= 0x8520,
++		.initseq	= hx8520_initseq,
++		.initseq_size	= ARRAY_SIZE(hx8520_initseq),
++		.packet_size	= 16,
++		.touch_points	= 2,
++		.invert_y	= true,
++	},
++	{
++		.model		= 0x8526,
++		.initseq	= hx8526_initseq,
++		.initseq_size	= ARRAY_SIZE(hx8526_initseq),
++		.packet_size	= 32,
++		.touch_points	= 5,
++		.xy_order	= true,
++	},
++};
++
++static void himax_ts_set_coords(struct himax_ts_props_entry *props,
++				u32 *px, u32 *py)
++{
++	u32 x = *px;
++	u32 y = *py;
++
++	if (!props->xy_order)
++		swap(x, y);
++
++	if (props->invert_x && x != HX_EMPTY)
++		x = HX_MAX_X - x;
++
++	if (props->invert_y && y != HX_EMPTY)
++		y = HX_MAX_Y - y;
++
++	*px = x;
++	*py = y;
++}
++
++static irqreturn_t himax_ts_isr(int irq, void *data)
++{
++	struct himax_ts_priv *priv = data;
++	struct himax_ts_props_entry *props = priv->ts_props;
++	struct input_dev *input = priv->input;
++	int packet_size = props->packet_size;
++	char *buf = priv->buf;
++	int curr_touches, touch_count, i;
++	u32 x, y;
++	bool was_touched, now_touched, report_event;
++
++	memset(buf, 0, packet_size);
++
++	if (i2c_master_send(priv->client, hx85x_get_event_cmd, 1) != 1) {
++		dev_err(&priv->client->dev, "Unable to write get event cmd\n");
++		return IRQ_HANDLED;
++	}
++
++	if (i2c_master_recv(priv->client, buf, packet_size) != packet_size) {
++		dev_err(&priv->client->dev, "Unable to read events data\n");
++		return IRQ_HANDLED;
++	}
++
++	/*
++	 * Two last bytes in the buffer correspond to invalid data. Next two
++	 * from the end, correspond to touch counter and touch points ids.
++	 */
++
++	/* Retrieve touch points counter. 0x0F corresponds to 0 touches */
++	touch_count = buf[packet_size - 2 - 2] & 0x0F;
++	if (touch_count == 0x0F)
++		touch_count = 0;
++
++	/* According to the Himax code examples, this value can be invalid */
++	if (touch_count > props->touch_points)
++		return IRQ_HANDLED;
++
++	/* Retrieve touch points ids. 0xFF corresponds to 0 touches */
++	curr_touches = buf[packet_size - 2 - 1];
++	if (curr_touches == 0xFF)
++		curr_touches = 0;
++
++	for (i = 0; i < props->touch_points; i++) {
++		x = (buf[i * HX_PNT_SIZE + 0] << 8) | buf[i * HX_PNT_SIZE + 1];
++		y = (buf[i * HX_PNT_SIZE + 2] << 8) | buf[i * HX_PNT_SIZE + 3];
++
++		himax_ts_set_coords(props, &x, &y);
++
++		report_event = false;
++		was_touched = priv->prev_touches & (1 << i);
++		now_touched = curr_touches & (1 << i);
++
++		/* Check for touch state and coordinates consistency */
++		if (now_touched && (x <= HX_MAX_X && y <= HX_MAX_Y)) {
++			report_event = true;
++			dev_dbg(&priv->client->dev, "# %d x=%d y=%d", i, x, y);
++		} else if (was_touched && (x == HX_EMPTY && y == HX_EMPTY)) {
++			report_event = true;
++			dev_dbg(&priv->client->dev, "# %d released", i);
++		}
++
++		if (report_event) {
++			input_mt_slot(priv->input, i);
++			input_mt_report_slot_state(input, MT_TOOL_FINGER,
++							now_touched);
++			if (now_touched) {
++				input_report_abs(input, ABS_MT_POSITION_X, x);
++				input_report_abs(input, ABS_MT_POSITION_Y, y);
++				input_report_abs(input, ABS_MT_PRESSURE, 0xFF);
++			}
++		}
++	}
++
++	input_mt_report_pointer_emulation(input, true);
++	input_sync(input);
++
++	priv->prev_touches = curr_touches;
++
++	return IRQ_HANDLED;
++}
++
++static int himax_ts_setup(struct himax_ts_priv *priv)
++{
++	struct himax_ts_props_entry *props = priv->ts_props;
++	struct i2c_client *client = priv->client;
++	char *cmd = hx85x_get_sleep_cmd;
++	char buf = 0x00;
++	int count, i;
++
++	if (i2c_master_send(client, cmd, 1) != 1)
++		goto err_stop_seq;
++
++	if (i2c_master_recv(client, &buf, 1) != 1) {
++		dev_err(&client->dev, "Failed to read get sleep data\n");
++		return -EBUSY;
++	}
++
++	if (buf != 0) {
++		dev_dbg(&client->dev, "already initialized 0x%02X\n", buf);
++		return 0;
++	}
++
++	for (i = 0; i < props->initseq_size; i++) {
++		cmd = props->initseq[i].cmd;
++		count = props->initseq[i].count;
++
++		if (i2c_master_send(client, cmd, count) != count)
++			goto err_stop_seq;
++
++		msleep(props->initseq[i].delay_ms);
++	}
++
++	return 0;
++
++err_stop_seq:
++	dev_err(&client->dev, "Failed to send I2C command 0x%02X\n", cmd[0]);
++	return -EBUSY;
++}
++
++static int himax_ts_open(struct input_dev *dev)
++{
++	struct himax_ts_priv *priv = input_get_drvdata(dev);
++	struct i2c_client *client = priv->client;
++
++	if (i2c_master_send(client, hx85x_senseon_cmd, 1) != 1) {
++		dev_err(&priv->client->dev, "failed to write sense on cmd\n");
++		return -EBUSY;
++	}
++
++	msleep(100);
++
++	return 0;
++}
++
++static void himax_ts_close(struct input_dev *dev)
++{
++	struct himax_ts_priv *priv = input_get_drvdata(dev);
++	struct i2c_client *client = priv->client;
++
++	if (i2c_master_send(client, hx85x_senseoff_cmd, 1) != 1)
++		dev_err(&priv->client->dev, "failed to write sense off cmd\n");
++}
++
++static struct input_dev *himax_ts_init_input(struct himax_ts_priv *priv)
++{
++	struct input_dev *input;
++
++	input = input_allocate_device();
++	if (!input) {
++		dev_err(&priv->client->dev, "Failed to allocate input dev\n");
++		return NULL;
++	}
++
++	input->name = priv->client->name;
++	input->phys = priv->client->adapter->name,
++	input->id.bustype = BUS_I2C;
++	input->dev.parent = &priv->client->dev;
++	input->open = himax_ts_open;
++	input->close = himax_ts_close;
++
++	__set_bit(EV_KEY, input->evbit);
++	__set_bit(EV_ABS, input->evbit);
++	__set_bit(EV_SYN, input->evbit);
++	__set_bit(BTN_TOUCH, input->keybit);
++	__set_bit(ABS_X, input->absbit);
++	__set_bit(ABS_Y, input->absbit);
++
++	input_set_abs_params(input, ABS_X, 0, HX_MAX_X, 0, 0);
++	input_set_abs_params(input, ABS_Y, 0, HX_MAX_Y, 0, 0);
++	input_set_abs_params(input, ABS_PRESSURE, 0, 0xFF, 0, 0);
++
++	input_set_abs_params(input, ABS_MT_POSITION_X, 0, HX_MAX_X, 0, 0);
++	input_set_abs_params(input, ABS_MT_POSITION_Y, 0, HX_MAX_Y, 0, 0);
++	input_set_abs_params(input, ABS_MT_PRESSURE, 0, 0xff, 0, 0);
++
++	input_mt_init_slots(input, priv->ts_props->touch_points, 0);
++
++	input_set_drvdata(input, priv);
++
++	return input;
++}
++
++static int himax_ts_probe(struct i2c_client *client,
++			const struct i2c_device_id *idp)
++{
++	struct himax_ts_priv *priv;
++	struct himax_ts_props_entry *ts_props = NULL;
++	int error, i;
++	char buf[3];
++	int chip_model;
++
++	if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) {
++		dev_err(&client->dev, "I2C_FUNC_I2C check failed\n");
++		return -EBUSY;
++	}
++
++	if (i2c_master_send(client, hx85x_get_id_cmd, 1) == 1 &&
++		i2c_master_recv(client, buf, 3) == 3) {
++		dev_info(&client->dev, "Found device ID: 0x%02X%02X%02X\n",
++			 buf[0], buf[1], buf[2]);
++	} else {
++		dev_err(&client->dev, "Unable to get DevId\n");
++		return -ENODEV;
++	}
++
++	chip_model = (buf[0] << 8) | buf[1];
++
++	for (i = 0; i < ARRAY_SIZE(himax_ts_props); i++) {
++		if (chip_model == himax_ts_props[i].model) {
++			ts_props = &himax_ts_props[i];
++			break;
++		}
++	}
++
++	if (!ts_props) {
++		dev_err(&client->dev, "Unsupported device model\n");
++		return -ENODEV;
++	} else if (ts_props->model != idp->driver_data) {
++		dev_warn(&client->dev,
++		"Requested model 0x%04X not found, proceed with 0x%04X setup\n",
++			(unsigned int)idp->driver_data, ts_props->model);
++	}
++
++	priv = kzalloc(sizeof(*priv), GFP_KERNEL);
++	if (!priv) {
++		dev_err(&client->dev, "failed to allocate driver data\n");
++		return -ENOMEM;
++	}
++
++	priv->client = client;
++	priv->irq = client->irq;
++	priv->ts_props = ts_props;
++
++	error = himax_ts_setup(priv);
++	if (error)
++		goto err_free_mem;
++
++	priv->buf = kzalloc(priv->ts_props->packet_size, GFP_KERNEL);
++	if (!priv->buf) {
++		dev_err(&client->dev, "failed to allocate read buffer\n");
++		error = -ENOMEM;
++		goto err_free_mem;
++	}
++
++	priv->input = himax_ts_init_input(priv);
++	if (!priv->input) {
++		error = -ENOMEM;
++		goto err_free_mem;
++	}
++
++	error = input_register_device(priv->input);
++	if (error) {
++		dev_err(&client->dev, "Failed to register input device.\n");
++		goto err_free_mem;
++	}
++
++	error = request_threaded_irq(priv->irq, NULL, himax_ts_isr,
++					IRQF_TRIGGER_LOW | IRQF_ONESHOT,
++					client->name, priv);
++	if (error) {
++		dev_err(&client->dev, "Unable to request touchscreen IRQ.\n");
++		goto err_free_dev;
++	}
++
++	i2c_set_clientdata(client, priv);
++	device_init_wakeup(&client->dev, 1);
++
++	return 0;
++
++err_free_dev:
++	input_unregister_device(priv->input);
++	priv->input = NULL;
++err_free_mem:
++	input_free_device(priv->input);
++	kfree(priv->buf);
++	kfree(priv);
++
++	return error;
++}
++
++static int himax_ts_remove(struct i2c_client *client)
++{
++	struct himax_ts_priv *priv = i2c_get_clientdata(client);
++
++	free_irq(priv->irq, priv);
++	i2c_set_clientdata(client, NULL);
++	input_unregister_device(priv->input);
++	kfree(priv->buf);
++	kfree(priv);
++
++	return 0;
++}
++
++static int himax_ts_suspend(struct device *dev)
++{
++	struct i2c_client *client = to_i2c_client(dev);
++	struct himax_ts_priv *priv = i2c_get_clientdata(client);
++
++	if (device_may_wakeup(&client->dev))
++		enable_irq_wake(priv->irq);
++	else if (i2c_master_send(client, hx85x_senseoff_cmd, 1) != 1)
++		dev_err(&priv->client->dev, "failed to write sense off cmd\n");
++
++	return 0;
++}
++
++static int himax_ts_resume(struct device *dev)
++{
++	struct i2c_client *client = to_i2c_client(dev);
++	struct himax_ts_priv *priv = i2c_get_clientdata(client);
++
++	himax_ts_setup(priv);
++
++	if (i2c_master_send(client, hx85x_senseon_cmd, 1) != 1)
++		dev_err(&priv->client->dev, "failed to write sense on cmd\n");
++
++	msleep(100);
++
++	if (device_may_wakeup(&client->dev))
++		disable_irq_wake(priv->irq);
++
++	return 0;
++}
++
++static SIMPLE_DEV_PM_OPS(himax_ts_pm, himax_ts_suspend, himax_ts_resume);
++
++static const struct i2c_device_id himax_ts_id[] = {
++	{ "hx8520-c"	, 0x8520 },
++	{ "hx8526-a"	, 0x8526 },
++	{ },
++};
++
++static const struct of_device_id himax_ts_dt_ids[] = {
++        { .compatible = "himax,hx8520-c", },
++        { .compatible = "himax,hx8526-a", },
++        { .compatible = "himax,himax_ts", },
++        { /* sentinel */ }
++};
++
++MODULE_DEVICE_TABLE(i2c, himax_ts_id);
++MODULE_DEVICE_TABLE(of, himax_ts_dt_id);
++
++static struct i2c_driver himax_ts_driver = {
++	.driver = {
++		.owner = THIS_MODULE,
++		.name = "himax_ts",
++		.pm = &himax_ts_pm,
++		.of_match_table = himax_ts_dt_ids,
++	},
++	.probe = himax_ts_probe,
++	.remove = himax_ts_remove,
++	.id_table = himax_ts_id,
++};
++
++static int __init himax_ts_init(void)
++{
++	return i2c_add_driver(&himax_ts_driver);
++}
++
++static void __exit himax_ts_exit(void)
++{
++	i2c_del_driver(&himax_ts_driver);
++}
++
++module_init(himax_ts_init);
++module_exit(himax_ts_exit);
++
++MODULE_DESCRIPTION("Himax Touchscreen driver");
++MODULE_LICENSE("GPL v2");
+diff --git a/drivers/mtd/devices/m25p80.c b/drivers/mtd/devices/m25p80.c
+index 2f3d2a5..364d034 100644
+--- a/drivers/mtd/devices/m25p80.c
++++ b/drivers/mtd/devices/m25p80.c
+@@ -824,6 +824,7 @@ static const struct spi_device_id m25p_ids[] = {
+ 	{ "m25pe80", INFO(0x208014,  0, 64 * 1024, 16,       0) },
+ 	{ "m25pe16", INFO(0x208015,  0, 64 * 1024, 32, SECT_4K) },
+ 
++	{ "m25px16",    INFO(0x207115,  0, 64 * 1024, 32, SECT_4K) },
+ 	{ "m25px32",    INFO(0x207116,  0, 64 * 1024, 64, SECT_4K) },
+ 	{ "m25px32-s0", INFO(0x207316,  0, 64 * 1024, 64, SECT_4K) },
+ 	{ "m25px32-s1", INFO(0x206316,  0, 64 * 1024, 64, SECT_4K) },
+diff --git a/drivers/net/ethernet/intel/igb/igb_main.c b/drivers/net/ethernet/intel/igb/igb_main.c
+index 64cbe0d..51404d3 100644
+--- a/drivers/net/ethernet/intel/igb/igb_main.c
++++ b/drivers/net/ethernet/intel/igb/igb_main.c
+@@ -1979,6 +1979,30 @@ static s32 igb_init_i2c(struct igb_adapter *adapter)
+ 	return status;
+ }
+ 
++
++/**
++ *  igb_read_mac_addr_dts - Read mac addres from the device tree
++ *  blob
++ *  @adapter: pointer to adapter structure
++ **/
++static void igb_read_mac_addr_dts(struct e1000_hw *hw)
++{
++	struct device_node *dn;
++	const uint8_t *mac;
++
++	dn = of_find_compatible_node(NULL, NULL, "intel,i211");
++
++	if (!dn)
++		return;
++
++	mac = of_get_property(dn, "local-mac-address", NULL);
++
++	if (mac)
++		memcpy(hw->mac.addr, mac, ETH_ALEN);
++
++	return;
++}
++
+ /**
+  *  igb_probe - Device Initialization Routine
+  *  @pdev: PCI device information struct
+@@ -2178,6 +2202,14 @@ static int igb_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
+ 	if (hw->mac.ops.read_mac_addr(hw))
+ 		dev_err(&pdev->dev, "NVM Read Error\n");
+ 
++	if (!is_valid_ether_addr(hw->mac.addr))
++		igb_read_mac_addr_dts(hw);
++
++	if (!is_valid_ether_addr(hw->mac.addr)) {
++		dev_info(&pdev->dev, "Random MAC Address\n");
++		random_ether_addr(hw->mac.addr);
++	}
++
+ 	memcpy(netdev->dev_addr, hw->mac.addr, netdev->addr_len);
+ 
+ 	if (!is_valid_ether_addr(netdev->dev_addr)) {
+diff --git a/drivers/net/wireless/mwifiex/Kconfig b/drivers/net/wireless/mwifiex/Kconfig
+index 4f614aa..f7ff472 100644
+--- a/drivers/net/wireless/mwifiex/Kconfig
++++ b/drivers/net/wireless/mwifiex/Kconfig
+@@ -3,13 +3,13 @@ config MWIFIEX
+ 	depends on CFG80211
+ 	---help---
+ 	  This adds support for wireless adapters based on Marvell
+-	  802.11n chipsets.
++	  802.11n/ac chipsets.
+ 
+ 	  If you choose to build it as a module, it will be called
+ 	  mwifiex.
+ 
+ config MWIFIEX_SDIO
+-	tristate "Marvell WiFi-Ex Driver for SD8786/SD8787/SD8797"
++	tristate "Marvell WiFi-Ex Driver for SD8786/SD8787/SD8797/SD8897"
+ 	depends on MWIFIEX && MMC
+ 	select FW_LOADER
+ 	---help---
+diff --git a/drivers/net/wireless/mwifiex/sdio.c b/drivers/net/wireless/mwifiex/sdio.c
+index 139c958..c9f3ecf 100644
+--- a/drivers/net/wireless/mwifiex/sdio.c
++++ b/drivers/net/wireless/mwifiex/sdio.c
+@@ -77,6 +77,17 @@ mwifiex_sdio_probe(struct sdio_func *func, const struct sdio_device_id *id)
+ 
+ 	func->card->quirks |= MMC_QUIRK_BLKSZ_FOR_BYTE_MODE;
+ 
++	if (id->driver_data) {
++		struct mwifiex_sdio_device *data = (void *)id->driver_data;
++
++		card->firmware = data->firmware;
++		card->reg = data->reg;
++		card->max_ports = data->max_ports;
++		card->mp_agg_pkt_limit = data->mp_agg_pkt_limit;
++		card->supports_sdio_new_mode = data->supports_sdio_new_mode;
++		card->has_control_mask = data->has_control_mask;
++	}
++
+ 	sdio_claim_host(func);
+ 	ret = sdio_enable_func(func);
+ 	sdio_release_host(func);
+@@ -251,12 +262,19 @@ static int mwifiex_sdio_resume(struct device *dev)
+ #define SDIO_DEVICE_ID_MARVELL_8787   (0x9119)
+ /* Device ID for SD8797 */
+ #define SDIO_DEVICE_ID_MARVELL_8797   (0x9129)
++/* Device ID for SD8897 */
++#define SDIO_DEVICE_ID_MARVELL_8897   (0x912d)
+ 
+ /* WLAN IDs */
+ static const struct sdio_device_id mwifiex_ids[] = {
+-	{SDIO_DEVICE(SDIO_VENDOR_ID_MARVELL, SDIO_DEVICE_ID_MARVELL_8786)},
+-	{SDIO_DEVICE(SDIO_VENDOR_ID_MARVELL, SDIO_DEVICE_ID_MARVELL_8787)},
+-	{SDIO_DEVICE(SDIO_VENDOR_ID_MARVELL, SDIO_DEVICE_ID_MARVELL_8797)},
++	{SDIO_DEVICE(SDIO_VENDOR_ID_MARVELL, SDIO_DEVICE_ID_MARVELL_8786),
++		.driver_data = (unsigned long) &mwifiex_sdio_sd8786},
++	{SDIO_DEVICE(SDIO_VENDOR_ID_MARVELL, SDIO_DEVICE_ID_MARVELL_8787),
++		.driver_data = (unsigned long) &mwifiex_sdio_sd8787},
++	{SDIO_DEVICE(SDIO_VENDOR_ID_MARVELL, SDIO_DEVICE_ID_MARVELL_8797),
++		.driver_data = (unsigned long) &mwifiex_sdio_sd8797},
++	{SDIO_DEVICE(SDIO_VENDOR_ID_MARVELL, SDIO_DEVICE_ID_MARVELL_8897),
++		.driver_data = (unsigned long) &mwifiex_sdio_sd8897},
+ 	{},
+ };
+ 
+@@ -282,13 +300,13 @@ static struct sdio_driver mwifiex_sdio = {
+  * This function writes data into SDIO card register.
+  */
+ static int
+-mwifiex_write_reg(struct mwifiex_adapter *adapter, u32 reg, u32 data)
++mwifiex_write_reg(struct mwifiex_adapter *adapter, u32 reg, u8 data)
+ {
+ 	struct sdio_mmc_card *card = adapter->card;
+ 	int ret = -1;
+ 
+ 	sdio_claim_host(card->func);
+-	sdio_writeb(card->func, (u8) data, reg, &ret);
++	sdio_writeb(card->func, data, reg, &ret);
+ 	sdio_release_host(card->func);
+ 
+ 	return ret;
+@@ -298,7 +316,7 @@ mwifiex_write_reg(struct mwifiex_adapter *adapter, u32 reg, u32 data)
+  * This function reads data from SDIO card register.
+  */
+ static int
+-mwifiex_read_reg(struct mwifiex_adapter *adapter, u32 reg, u32 *data)
++mwifiex_read_reg(struct mwifiex_adapter *adapter, u32 reg, u8 *data)
+ {
+ 	struct sdio_mmc_card *card = adapter->card;
+ 	int ret = -1;
+@@ -400,7 +418,40 @@ static int mwifiex_pm_wakeup_card_complete(struct mwifiex_adapter *adapter)
+ }
+ 
+ /*
+- * This function initializes the IO ports.
++ * This function is used to initialize IO ports for the
++ * chipsets supporting SDIO new mode eg SD8897.
++ */
++static int mwifiex_init_sdio_new_mode(struct mwifiex_adapter *adapter)
++{
++	u8 reg;
++
++	adapter->ioport = MEM_PORT;
++
++	/* enable sdio new mode */
++	if (mwifiex_read_reg(adapter, CARD_CONFIG_2_1_REG, &reg))
++		return -1;
++	if (mwifiex_write_reg(adapter, CARD_CONFIG_2_1_REG,
++			      reg | CMD53_NEW_MODE))
++		return -1;
++
++	/* Configure cmd port and enable reading rx length from the register */
++	if (mwifiex_read_reg(adapter, CMD_CONFIG_0, &reg))
++		return -1;
++	if (mwifiex_write_reg(adapter, CMD_CONFIG_0, reg | CMD_PORT_RD_LEN_EN))
++		return -1;
++
++	/* Enable Dnld/Upld ready auto reset for cmd port after cmd53 is
++	 * completed
++	 */
++	if (mwifiex_read_reg(adapter, CMD_CONFIG_1, &reg))
++		return -1;
++	if (mwifiex_write_reg(adapter, CMD_CONFIG_1, reg | CMD_PORT_AUTO_EN))
++		return -1;
++
++	return 0;
++}
++
++/* This function initializes the IO ports.
+  *
+  * The following operations are performed -
+  *      - Read the IO ports (0, 1 and 2)
+@@ -409,10 +460,17 @@ static int mwifiex_pm_wakeup_card_complete(struct mwifiex_adapter *adapter)
+  */
+ static int mwifiex_init_sdio_ioport(struct mwifiex_adapter *adapter)
+ {
+-	u32 reg;
++	u8 reg;
++	struct sdio_mmc_card *card = adapter->card;
+ 
+ 	adapter->ioport = 0;
+ 
++	if (card->supports_sdio_new_mode) {
++		if (mwifiex_init_sdio_new_mode(adapter))
++			return -1;
++		goto cont;
++	}
++
+ 	/* Read the IO port */
+ 	if (!mwifiex_read_reg(adapter, IO_PORT_0_REG, &reg))
+ 		adapter->ioport |= (reg & 0xff);
+@@ -428,19 +486,19 @@ static int mwifiex_init_sdio_ioport(struct mwifiex_adapter *adapter)
+ 		adapter->ioport |= ((reg & 0xff) << 16);
+ 	else
+ 		return -1;
+-
++cont:
+ 	pr_debug("info: SDIO FUNC1 IO port: %#x\n", adapter->ioport);
+ 
+ 	/* Set Host interrupt reset to read to clear */
+ 	if (!mwifiex_read_reg(adapter, HOST_INT_RSR_REG, &reg))
+ 		mwifiex_write_reg(adapter, HOST_INT_RSR_REG,
+-				  reg | SDIO_INT_MASK);
++				  reg | card->reg->sdio_int_mask);
+ 	else
+ 		return -1;
+ 
+ 	/* Dnld/Upld ready set to auto reset */
+-	if (!mwifiex_read_reg(adapter, CARD_MISC_CFG_REG, &reg))
+-		mwifiex_write_reg(adapter, CARD_MISC_CFG_REG,
++	if (!mwifiex_read_reg(adapter, card->reg->card_misc_cfg_reg, &reg))
++		mwifiex_write_reg(adapter, card->reg->card_misc_cfg_reg,
+ 				  reg | AUTO_RE_ENABLE_INT);
+ 	else
+ 		return -1;
+@@ -486,34 +544,42 @@ static int mwifiex_write_data_to_card(struct mwifiex_adapter *adapter,
+ static int mwifiex_get_rd_port(struct mwifiex_adapter *adapter, u8 *port)
+ {
+ 	struct sdio_mmc_card *card = adapter->card;
+-	u16 rd_bitmap = card->mp_rd_bitmap;
++	const struct mwifiex_sdio_card_reg *reg = card->reg;
++	u32 rd_bitmap = card->mp_rd_bitmap;
+ 
+-	dev_dbg(adapter->dev, "data: mp_rd_bitmap=0x%04x\n", rd_bitmap);
++	dev_dbg(adapter->dev, "data: mp_rd_bitmap=0x%08x\n", rd_bitmap);
+ 
+-	if (!(rd_bitmap & (CTRL_PORT_MASK | DATA_PORT_MASK)))
+-		return -1;
++	if (card->supports_sdio_new_mode) {
++		if (!(rd_bitmap & reg->data_port_mask))
++			return -1;
++	} else {
++		if (!(rd_bitmap & (CTRL_PORT_MASK | reg->data_port_mask)))
++			return -1;
++	}
+ 
+-	if (card->mp_rd_bitmap & CTRL_PORT_MASK) {
+-		card->mp_rd_bitmap &= (u16) (~CTRL_PORT_MASK);
++	if ((card->has_control_mask) &&
++	    (card->mp_rd_bitmap & CTRL_PORT_MASK)) {
++		card->mp_rd_bitmap &= (u32) (~CTRL_PORT_MASK);
+ 		*port = CTRL_PORT;
+-		dev_dbg(adapter->dev, "data: port=%d mp_rd_bitmap=0x%04x\n",
++		dev_dbg(adapter->dev, "data: port=%d mp_rd_bitmap=0x%08x\n",
+ 			*port, card->mp_rd_bitmap);
+-	} else {
+-		if (card->mp_rd_bitmap & (1 << card->curr_rd_port)) {
+-			card->mp_rd_bitmap &= (u16)
+-						(~(1 << card->curr_rd_port));
+-			*port = card->curr_rd_port;
++		return 0;
++	}
+ 
+-			if (++card->curr_rd_port == MAX_PORT)
+-				card->curr_rd_port = 1;
+-		} else {
+-			return -1;
+-		}
++	if (!(card->mp_rd_bitmap & (1 << card->curr_rd_port)))
++		return -1;
++
++	/* We are now handling the SDIO data ports */
++	card->mp_rd_bitmap &= (u32)(~(1 << card->curr_rd_port));
++	*port = card->curr_rd_port;
++
++	if (++card->curr_rd_port == card->max_ports)
++		card->curr_rd_port = reg->start_rd_port;
++
++	dev_dbg(adapter->dev,
++		"data: port=%d mp_rd_bitmap=0x%08x -> 0x%08x\n",
++		*port, rd_bitmap, card->mp_rd_bitmap);
+ 
+-		dev_dbg(adapter->dev,
+-			"data: port=%d mp_rd_bitmap=0x%04x -> 0x%04x\n",
+-			*port, rd_bitmap, card->mp_rd_bitmap);
+-	}
+ 	return 0;
+ }
+ 
+@@ -524,35 +590,45 @@ static int mwifiex_get_rd_port(struct mwifiex_adapter *adapter, u8 *port)
+  * increased (provided it does not reach the maximum limit, in which
+  * case it is reset to 1)
+  */
+-static int mwifiex_get_wr_port_data(struct mwifiex_adapter *adapter, u8 *port)
++static int mwifiex_get_wr_port_data(struct mwifiex_adapter *adapter, u32 *port)
+ {
+ 	struct sdio_mmc_card *card = adapter->card;
+-	u16 wr_bitmap = card->mp_wr_bitmap;
++	const struct mwifiex_sdio_card_reg *reg = card->reg;
++	u32 wr_bitmap = card->mp_wr_bitmap;
+ 
+-	dev_dbg(adapter->dev, "data: mp_wr_bitmap=0x%04x\n", wr_bitmap);
++	dev_dbg(adapter->dev, "data: mp_wr_bitmap=0x%08x\n", wr_bitmap);
+ 
+-	if (!(wr_bitmap & card->mp_data_port_mask))
++	if (card->supports_sdio_new_mode &&
++	    !(wr_bitmap & reg->data_port_mask)) {
++		adapter->data_sent = true;
++		return -EBUSY;
++	} else if (!card->supports_sdio_new_mode &&
++		   !(wr_bitmap & card->mp_data_port_mask)) {
+ 		return -1;
++	}
+ 
+ 	if (card->mp_wr_bitmap & (1 << card->curr_wr_port)) {
+-		card->mp_wr_bitmap &= (u16) (~(1 << card->curr_wr_port));
++		card->mp_wr_bitmap &= (u32) (~(1 << card->curr_wr_port));
+ 		*port = card->curr_wr_port;
+-		if (++card->curr_wr_port == card->mp_end_port)
+-			card->curr_wr_port = 1;
++		if (((card->supports_sdio_new_mode) &&
++		     (++card->curr_wr_port == card->max_ports)) ||
++		    ((!card->supports_sdio_new_mode) &&
++		     (++card->curr_wr_port == card->mp_end_port)))
++			card->curr_wr_port = reg->start_wr_port;
+ 	} else {
+ 		adapter->data_sent = true;
+ 		return -EBUSY;
+ 	}
+ 
+-	if (*port == CTRL_PORT) {
+-		dev_err(adapter->dev, "invalid data port=%d cur port=%d"
+-			" mp_wr_bitmap=0x%04x -> 0x%04x\n",
++	if ((card->has_control_mask) && (*port == CTRL_PORT)) {
++		dev_err(adapter->dev,
++			"invalid data port=%d cur port=%d mp_wr_bitmap=0x%08x -> 0x%08x\n",
+ 			*port, card->curr_wr_port, wr_bitmap,
+ 			card->mp_wr_bitmap);
+ 		return -1;
+ 	}
+ 
+-	dev_dbg(adapter->dev, "data: port=%d mp_wr_bitmap=0x%04x -> 0x%04x\n",
++	dev_dbg(adapter->dev, "data: port=%d mp_wr_bitmap=0x%08x -> 0x%08x\n",
+ 		*port, wr_bitmap, card->mp_wr_bitmap);
+ 
+ 	return 0;
+@@ -564,11 +640,12 @@ static int mwifiex_get_wr_port_data(struct mwifiex_adapter *adapter, u8 *port)
+ static int
+ mwifiex_sdio_poll_card_status(struct mwifiex_adapter *adapter, u8 bits)
+ {
++	struct sdio_mmc_card *card = adapter->card;
+ 	u32 tries;
+-	u32 cs;
++	u8 cs;
+ 
+ 	for (tries = 0; tries < MAX_POLL_TRIES; tries++) {
+-		if (mwifiex_read_reg(adapter, CARD_STATUS_REG, &cs))
++		if (mwifiex_read_reg(adapter, card->reg->poll_reg, &cs))
+ 			break;
+ 		else if ((cs & bits) == bits)
+ 			return 0;
+@@ -587,12 +664,14 @@ mwifiex_sdio_poll_card_status(struct mwifiex_adapter *adapter, u8 bits)
+ static int
+ mwifiex_sdio_read_fw_status(struct mwifiex_adapter *adapter, u16 *dat)
+ {
+-	u32 fws0, fws1;
++	struct sdio_mmc_card *card = adapter->card;
++	const struct mwifiex_sdio_card_reg *reg = card->reg;
++	u8 fws0, fws1;
+ 
+-	if (mwifiex_read_reg(adapter, CARD_FW_STATUS0_REG, &fws0))
++	if (mwifiex_read_reg(adapter, reg->status_reg_0, &fws0))
+ 		return -1;
+ 
+-	if (mwifiex_read_reg(adapter, CARD_FW_STATUS1_REG, &fws1))
++	if (mwifiex_read_reg(adapter, reg->status_reg_1, &fws1))
+ 		return -1;
+ 
+ 	*dat = (u16) ((fws1 << 8) | fws0);
+@@ -608,14 +687,14 @@ mwifiex_sdio_read_fw_status(struct mwifiex_adapter *adapter, u16 *dat)
+  */
+ static int mwifiex_sdio_disable_host_int(struct mwifiex_adapter *adapter)
+ {
+-	u32 host_int_mask;
++	u8 host_int_mask, host_int_disable = HOST_INT_DISABLE;
+ 
+ 	/* Read back the host_int_mask register */
+ 	if (mwifiex_read_reg(adapter, HOST_INT_MASK_REG, &host_int_mask))
+ 		return -1;
+ 
+ 	/* Update with the mask and write back to the register */
+-	host_int_mask &= ~HOST_INT_DISABLE;
++	host_int_mask &= ~host_int_disable;
+ 
+ 	if (mwifiex_write_reg(adapter, HOST_INT_MASK_REG, host_int_mask)) {
+ 		dev_err(adapter->dev, "disable host interrupt failed\n");
+@@ -633,8 +712,11 @@ static int mwifiex_sdio_disable_host_int(struct mwifiex_adapter *adapter)
+  */
+ static int mwifiex_sdio_enable_host_int(struct mwifiex_adapter *adapter)
+ {
++	struct sdio_mmc_card *card = adapter->card;
++
+ 	/* Simply write the mask to the register */
+-	if (mwifiex_write_reg(adapter, HOST_INT_MASK_REG, HOST_INT_ENABLE)) {
++	if (mwifiex_write_reg(adapter, HOST_INT_MASK_REG,
++			      card->reg->host_int_enable)) {
+ 		dev_err(adapter->dev, "enable host interrupt failed\n");
+ 		return -1;
+ 	}
+@@ -686,11 +768,13 @@ static int mwifiex_sdio_card_to_host(struct mwifiex_adapter *adapter,
+ static int mwifiex_prog_fw_w_helper(struct mwifiex_adapter *adapter,
+ 				    struct mwifiex_fw_image *fw)
+ {
++	struct sdio_mmc_card *card = adapter->card;
++	const struct mwifiex_sdio_card_reg *reg = card->reg;
+ 	int ret;
+ 	u8 *firmware = fw->fw_buf;
+ 	u32 firmware_len = fw->fw_len;
+ 	u32 offset = 0;
+-	u32 base0, base1;
++	u8 base0, base1;
+ 	u8 *fwbuf;
+ 	u16 len = 0;
+ 	u32 txlen, tx_blocks = 0, tries;
+@@ -727,7 +811,7 @@ static int mwifiex_prog_fw_w_helper(struct mwifiex_adapter *adapter,
+ 			break;
+ 
+ 		for (tries = 0; tries < MAX_POLL_TRIES; tries++) {
+-			ret = mwifiex_read_reg(adapter, HOST_F1_RD_BASE_0,
++			ret = mwifiex_read_reg(adapter, reg->base_0_reg,
+ 					       &base0);
+ 			if (ret) {
+ 				dev_err(adapter->dev,
+@@ -736,7 +820,7 @@ static int mwifiex_prog_fw_w_helper(struct mwifiex_adapter *adapter,
+ 					base0, base0);
+ 				goto done;
+ 			}
+-			ret = mwifiex_read_reg(adapter, HOST_F1_RD_BASE_1,
++			ret = mwifiex_read_reg(adapter, reg->base_1_reg,
+ 					       &base1);
+ 			if (ret) {
+ 				dev_err(adapter->dev,
+@@ -828,10 +912,11 @@ done:
+ static int mwifiex_check_fw_status(struct mwifiex_adapter *adapter,
+ 				   u32 poll_num)
+ {
++	struct sdio_mmc_card *card = adapter->card;
+ 	int ret = 0;
+ 	u16 firmware_stat;
+ 	u32 tries;
+-	u32 winner_status;
++	u8 winner_status;
+ 
+ 	/* Wait for firmware initialization event */
+ 	for (tries = 0; tries < poll_num; tries++) {
+@@ -849,7 +934,7 @@ static int mwifiex_check_fw_status(struct mwifiex_adapter *adapter,
+ 
+ 	if (ret) {
+ 		if (mwifiex_read_reg
+-		    (adapter, CARD_FW_STATUS0_REG, &winner_status))
++		    (adapter, card->reg->status_reg_0, &winner_status))
+ 			winner_status = 0;
+ 
+ 		if (winner_status)
+@@ -866,12 +951,12 @@ static int mwifiex_check_fw_status(struct mwifiex_adapter *adapter,
+ static void mwifiex_interrupt_status(struct mwifiex_adapter *adapter)
+ {
+ 	struct sdio_mmc_card *card = adapter->card;
+-	u32 sdio_ireg;
++	u8 sdio_ireg;
+ 	unsigned long flags;
+ 
+-	if (mwifiex_read_data_sync(adapter, card->mp_regs, MAX_MP_REGS,
+-				   REG_PORT | MWIFIEX_SDIO_BYTE_MODE_MASK,
+-				   0)) {
++	if (mwifiex_read_data_sync(adapter, card->mp_regs,
++				   card->reg->max_mp_regs,
++				   REG_PORT | MWIFIEX_SDIO_BYTE_MODE_MASK, 0)) {
+ 		dev_err(adapter->dev, "read mp_regs failed\n");
+ 		return;
+ 	}
+@@ -880,6 +965,9 @@ static void mwifiex_interrupt_status(struct mwifiex_adapter *adapter)
+ 	if (sdio_ireg) {
+ 		/*
+ 		 * DN_LD_HOST_INT_STATUS and/or UP_LD_HOST_INT_STATUS
++		 * For SDIO new mode CMD port interrupts
++		 *	DN_LD_CMD_PORT_HOST_INT_STATUS and/or
++		 *	UP_LD_CMD_PORT_HOST_INT_STATUS
+ 		 * Clear the interrupt status register
+ 		 */
+ 		dev_dbg(adapter->dev, "int: sdio_ireg = %#x\n", sdio_ireg);
+@@ -1003,11 +1091,11 @@ static int mwifiex_sdio_card_to_host_mp_aggr(struct mwifiex_adapter *adapter,
+ 	s32 f_aggr_cur = 0;
+ 	struct sk_buff *skb_deaggr;
+ 	u32 pind;
+-	u32 pkt_len, pkt_type = 0;
++	u32 pkt_len, pkt_type, mport;
+ 	u8 *curr_ptr;
+ 	u32 rx_len = skb->len;
+ 
+-	if (port == CTRL_PORT) {
++	if ((card->has_control_mask) && (port == CTRL_PORT)) {
+ 		/* Read the command Resp without aggr */
+ 		dev_dbg(adapter->dev, "info: %s: no aggregation for cmd "
+ 			"response\n", __func__);
+@@ -1024,7 +1112,10 @@ static int mwifiex_sdio_card_to_host_mp_aggr(struct mwifiex_adapter *adapter,
+ 		goto rx_curr_single;
+ 	}
+ 
+-	if (card->mp_rd_bitmap & (~((u16) CTRL_PORT_MASK))) {
++	if ((!card->has_control_mask && (card->mp_rd_bitmap &
++					 card->reg->data_port_mask)) ||
++	    (card->has_control_mask && (card->mp_rd_bitmap &
++					(~((u32) CTRL_PORT_MASK))))) {
+ 		/* Some more data RX pending */
+ 		dev_dbg(adapter->dev, "info: %s: not last packet\n", __func__);
+ 
+@@ -1060,10 +1151,10 @@ static int mwifiex_sdio_card_to_host_mp_aggr(struct mwifiex_adapter *adapter,
+ 	if (f_aggr_cur) {
+ 		dev_dbg(adapter->dev, "info: current packet aggregation\n");
+ 		/* Curr pkt can be aggregated */
+-		MP_RX_AGGR_SETUP(card, skb, port);
++		mp_rx_aggr_setup(card, skb, port);
+ 
+ 		if (MP_RX_AGGR_PKT_LIMIT_REACHED(card) ||
+-		    MP_RX_AGGR_PORT_LIMIT_REACHED(card)) {
++		    mp_rx_aggr_port_limit_reached(card)) {
+ 			dev_dbg(adapter->dev, "info: %s: aggregated packet "
+ 				"limit reached\n", __func__);
+ 			/* No more pkts allowed in Aggr buf, rx it */
+@@ -1076,11 +1167,28 @@ static int mwifiex_sdio_card_to_host_mp_aggr(struct mwifiex_adapter *adapter,
+ 		dev_dbg(adapter->dev, "info: do_rx_aggr: num of packets: %d\n",
+ 			card->mpa_rx.pkt_cnt);
+ 
++		if (card->supports_sdio_new_mode) {
++			int i;
++			u32 port_count;
++
++			for (i = 0, port_count = 0; i < card->max_ports; i++)
++				if (card->mpa_rx.ports & BIT(i))
++					port_count++;
++
++			/* Reading data from "start_port + 0" to "start_port +
++			 * port_count -1", so decrease the count by 1
++			 */
++			port_count--;
++			mport = (adapter->ioport | SDIO_MPA_ADDR_BASE |
++				 (port_count << 8)) + card->mpa_rx.start_port;
++		} else {
++			mport = (adapter->ioport | SDIO_MPA_ADDR_BASE |
++				 (card->mpa_rx.ports << 4)) +
++				 card->mpa_rx.start_port;
++		}
++
+ 		if (mwifiex_read_data_sync(adapter, card->mpa_rx.buf,
+-					   card->mpa_rx.buf_len,
+-					   (adapter->ioport | 0x1000 |
+-					    (card->mpa_rx.ports << 4)) +
+-					   card->mpa_rx.start_port, 1))
++					   card->mpa_rx.buf_len, mport, 1))
+ 			goto error;
+ 
+ 		curr_ptr = card->mpa_rx.buf;
+@@ -1167,6 +1275,7 @@ error:
+ static int mwifiex_process_int_status(struct mwifiex_adapter *adapter)
+ {
+ 	struct sdio_mmc_card *card = adapter->card;
++	const struct mwifiex_sdio_card_reg *reg = card->reg;
+ 	int ret = 0;
+ 	u8 sdio_ireg;
+ 	struct sk_buff *skb;
+@@ -1175,6 +1284,8 @@ static int mwifiex_process_int_status(struct mwifiex_adapter *adapter)
+ 	u32 rx_blocks;
+ 	u16 rx_len;
+ 	unsigned long flags;
++	u32 bitmap;
++	u8 cr;
+ 
+ 	spin_lock_irqsave(&adapter->int_lock, flags);
+ 	sdio_ireg = adapter->int_status;
+@@ -1184,10 +1295,60 @@ static int mwifiex_process_int_status(struct mwifiex_adapter *adapter)
+ 	if (!sdio_ireg)
+ 		return ret;
+ 
++	/* Following interrupt is only for SDIO new mode */
++	if (sdio_ireg & DN_LD_CMD_PORT_HOST_INT_STATUS && adapter->cmd_sent)
++		adapter->cmd_sent = false;
++
++	/* Following interrupt is only for SDIO new mode */
++	if (sdio_ireg & UP_LD_CMD_PORT_HOST_INT_STATUS) {
++		u32 pkt_type;
++
++		/* read the len of control packet */
++		rx_len = card->mp_regs[CMD_RD_LEN_1] << 8;
++		rx_len |= (u16) card->mp_regs[CMD_RD_LEN_0];
++		rx_blocks = DIV_ROUND_UP(rx_len, MWIFIEX_SDIO_BLOCK_SIZE);
++		if (rx_len <= INTF_HEADER_LEN ||
++		    (rx_blocks * MWIFIEX_SDIO_BLOCK_SIZE) >
++		     MWIFIEX_RX_DATA_BUF_SIZE)
++			return -1;
++		rx_len = (u16) (rx_blocks * MWIFIEX_SDIO_BLOCK_SIZE);
++
++		skb = dev_alloc_skb(rx_len);
++		if (!skb)
++			return -1;
++
++		skb_put(skb, rx_len);
++
++		if (mwifiex_sdio_card_to_host(adapter, &pkt_type, skb->data,
++					      skb->len, adapter->ioport |
++							CMD_PORT_SLCT)) {
++			dev_err(adapter->dev,
++				"%s: failed to card_to_host", __func__);
++			dev_kfree_skb_any(skb);
++			goto term_cmd;
++		}
++
++		if ((pkt_type != MWIFIEX_TYPE_CMD) &&
++		    (pkt_type != MWIFIEX_TYPE_EVENT))
++			dev_err(adapter->dev,
++				"%s:Received wrong packet on cmd port",
++				__func__);
++
++		mwifiex_decode_rx_packet(adapter, skb, pkt_type);
++	}
++
+ 	if (sdio_ireg & DN_LD_HOST_INT_STATUS) {
+-		card->mp_wr_bitmap = ((u16) card->mp_regs[WR_BITMAP_U]) << 8;
+-		card->mp_wr_bitmap |= (u16) card->mp_regs[WR_BITMAP_L];
+-		dev_dbg(adapter->dev, "int: DNLD: wr_bitmap=0x%04x\n",
++		bitmap = (u32) card->mp_regs[reg->wr_bitmap_l];
++		bitmap |= ((u32) card->mp_regs[reg->wr_bitmap_u]) << 8;
++		if (card->supports_sdio_new_mode) {
++			bitmap |=
++				((u32) card->mp_regs[reg->wr_bitmap_1l]) << 16;
++			bitmap |=
++				((u32) card->mp_regs[reg->wr_bitmap_1u]) << 24;
++		}
++		card->mp_wr_bitmap = bitmap;
++
++		dev_dbg(adapter->dev, "int: DNLD: wr_bitmap=0x%x\n",
+ 			card->mp_wr_bitmap);
+ 		if (adapter->data_sent &&
+ 		    (card->mp_wr_bitmap & card->mp_data_port_mask)) {
+@@ -1200,11 +1361,11 @@ static int mwifiex_process_int_status(struct mwifiex_adapter *adapter)
+ 	/* As firmware will not generate download ready interrupt if the port
+ 	   updated is command port only, cmd_sent should be done for any SDIO
+ 	   interrupt. */
+-	if (adapter->cmd_sent) {
++	if (card->has_control_mask && adapter->cmd_sent) {
+ 		/* Check if firmware has attach buffer at command port and
+ 		   update just that in wr_bit_map. */
+ 		card->mp_wr_bitmap |=
+-			(u16) card->mp_regs[WR_BITMAP_L] & CTRL_PORT_MASK;
++			(u32) card->mp_regs[reg->wr_bitmap_l] & CTRL_PORT_MASK;
+ 		if (card->mp_wr_bitmap & CTRL_PORT_MASK)
+ 			adapter->cmd_sent = false;
+ 	}
+@@ -1212,9 +1373,16 @@ static int mwifiex_process_int_status(struct mwifiex_adapter *adapter)
+ 	dev_dbg(adapter->dev, "info: cmd_sent=%d data_sent=%d\n",
+ 		adapter->cmd_sent, adapter->data_sent);
+ 	if (sdio_ireg & UP_LD_HOST_INT_STATUS) {
+-		card->mp_rd_bitmap = ((u16) card->mp_regs[RD_BITMAP_U]) << 8;
+-		card->mp_rd_bitmap |= (u16) card->mp_regs[RD_BITMAP_L];
+-		dev_dbg(adapter->dev, "int: UPLD: rd_bitmap=0x%04x\n",
++		bitmap = (u32) card->mp_regs[reg->rd_bitmap_l];
++		bitmap |= ((u32) card->mp_regs[reg->rd_bitmap_u]) << 8;
++		if (card->supports_sdio_new_mode) {
++			bitmap |=
++				((u32) card->mp_regs[reg->rd_bitmap_1l]) << 16;
++			bitmap |=
++				((u32) card->mp_regs[reg->rd_bitmap_1u]) << 24;
++		}
++		card->mp_rd_bitmap = bitmap;
++		dev_dbg(adapter->dev, "int: UPLD: rd_bitmap=0x%x\n",
+ 			card->mp_rd_bitmap);
+ 
+ 		while (true) {
+@@ -1224,8 +1392,8 @@ static int mwifiex_process_int_status(struct mwifiex_adapter *adapter)
+ 					"info: no more rd_port available\n");
+ 				break;
+ 			}
+-			len_reg_l = RD_LEN_P0_L + (port << 1);
+-			len_reg_u = RD_LEN_P0_U + (port << 1);
++			len_reg_l = reg->rd_len_p0_l + (port << 1);
++			len_reg_u = reg->rd_len_p0_u + (port << 1);
+ 			rx_len = ((u16) card->mp_regs[len_reg_u]) << 8;
+ 			rx_len |= (u16) card->mp_regs[len_reg_l];
+ 			dev_dbg(adapter->dev, "info: RX: port=%d rx_len=%u\n",
+@@ -1257,37 +1425,33 @@ static int mwifiex_process_int_status(struct mwifiex_adapter *adapter)
+ 
+ 			if (mwifiex_sdio_card_to_host_mp_aggr(adapter, skb,
+ 							      port)) {
+-				u32 cr = 0;
+-
+ 				dev_err(adapter->dev, "card_to_host_mpa failed:"
+ 					" int status=%#x\n", sdio_ireg);
+-				if (mwifiex_read_reg(adapter,
+-						     CONFIGURATION_REG, &cr))
+-					dev_err(adapter->dev,
+-						"read CFG reg failed\n");
+-
+-				dev_dbg(adapter->dev,
+-					"info: CFG reg val = %d\n", cr);
+-				if (mwifiex_write_reg(adapter,
+-						      CONFIGURATION_REG,
+-						      (cr | 0x04)))
+-					dev_err(adapter->dev,
+-						"write CFG reg failed\n");
+-
+-				dev_dbg(adapter->dev, "info: write success\n");
+-				if (mwifiex_read_reg(adapter,
+-						     CONFIGURATION_REG, &cr))
+-					dev_err(adapter->dev,
+-						"read CFG reg failed\n");
+-
+-				dev_dbg(adapter->dev,
+-					"info: CFG reg val =%x\n", cr);
+-				return -1;
++				goto term_cmd;
+ 			}
+ 		}
+ 	}
+ 
+ 	return 0;
++
++term_cmd:
++	/* terminate cmd */
++	if (mwifiex_read_reg(adapter, CONFIGURATION_REG, &cr))
++		dev_err(adapter->dev, "read CFG reg failed\n");
++	else
++		dev_dbg(adapter->dev, "info: CFG reg val = %d\n", cr);
++
++	if (mwifiex_write_reg(adapter, CONFIGURATION_REG, (cr | 0x04)))
++		dev_err(adapter->dev, "write CFG reg failed\n");
++	else
++		dev_dbg(adapter->dev, "info: write success\n");
++
++	if (mwifiex_read_reg(adapter, CONFIGURATION_REG, &cr))
++		dev_err(adapter->dev, "read CFG reg failed\n");
++	else
++		dev_dbg(adapter->dev, "info: CFG reg val =%x\n", cr);
++
++	return -1;
+ }
+ 
+ /*
+@@ -1305,7 +1469,7 @@ static int mwifiex_process_int_status(struct mwifiex_adapter *adapter)
+  * and return.
+  */
+ static int mwifiex_host_to_card_mp_aggr(struct mwifiex_adapter *adapter,
+-					u8 *payload, u32 pkt_len, u8 port,
++					u8 *payload, u32 pkt_len, u32 port,
+ 					u32 next_pkt_len)
+ {
+ 	struct sdio_mmc_card *card = adapter->card;
+@@ -1314,8 +1478,11 @@ static int mwifiex_host_to_card_mp_aggr(struct mwifiex_adapter *adapter,
+ 	s32 f_send_cur_buf = 0;
+ 	s32 f_precopy_cur_buf = 0;
+ 	s32 f_postcopy_cur_buf = 0;
++	u32 mport;
+ 
+-	if ((!card->mpa_tx.enabled) || (port == CTRL_PORT)) {
++	if (!card->mpa_tx.enabled ||
++	    (card->has_control_mask && (port == CTRL_PORT)) ||
++	    (card->supports_sdio_new_mode && (port == CMD_PORT_SLCT))) {
+ 		dev_dbg(adapter->dev, "info: %s: tx aggregation disabled\n",
+ 			__func__);
+ 
+@@ -1329,7 +1496,7 @@ static int mwifiex_host_to_card_mp_aggr(struct mwifiex_adapter *adapter,
+ 			__func__);
+ 
+ 		if (MP_TX_AGGR_IN_PROGRESS(card)) {
+-			if (!MP_TX_AGGR_PORT_LIMIT_REACHED(card) &&
++			if (!mp_tx_aggr_port_limit_reached(card) &&
+ 			    MP_TX_AGGR_BUF_HAS_ROOM(card, pkt_len)) {
+ 				f_precopy_cur_buf = 1;
+ 
+@@ -1342,7 +1509,7 @@ static int mwifiex_host_to_card_mp_aggr(struct mwifiex_adapter *adapter,
+ 				/* No room in Aggr buf, send it */
+ 				f_send_aggr_buf = 1;
+ 
+-				if (MP_TX_AGGR_PORT_LIMIT_REACHED(card) ||
++				if (mp_tx_aggr_port_limit_reached(card) ||
+ 				    !(card->mp_wr_bitmap &
+ 				      (1 << card->curr_wr_port)))
+ 					f_send_cur_buf = 1;
+@@ -1381,7 +1548,7 @@ static int mwifiex_host_to_card_mp_aggr(struct mwifiex_adapter *adapter,
+ 		MP_TX_AGGR_BUF_PUT(card, payload, pkt_len, port);
+ 
+ 		if (MP_TX_AGGR_PKT_LIMIT_REACHED(card) ||
+-		    MP_TX_AGGR_PORT_LIMIT_REACHED(card))
++		    mp_tx_aggr_port_limit_reached(card))
+ 			/* No more pkts allowed in Aggr buf, send it */
+ 			f_send_aggr_buf = 1;
+ 	}
+@@ -1390,11 +1557,28 @@ static int mwifiex_host_to_card_mp_aggr(struct mwifiex_adapter *adapter,
+ 		dev_dbg(adapter->dev, "data: %s: send aggr buffer: %d %d\n",
+ 			__func__,
+ 				card->mpa_tx.start_port, card->mpa_tx.ports);
++		if (card->supports_sdio_new_mode) {
++			u32 port_count;
++			int i;
++
++			for (i = 0, port_count = 0; i < card->max_ports; i++)
++				if (card->mpa_tx.ports & BIT(i))
++					port_count++;
++
++			/* Writing data from "start_port + 0" to "start_port +
++			 * port_count -1", so decrease the count by 1
++			 */
++			port_count--;
++			mport = (adapter->ioport | SDIO_MPA_ADDR_BASE |
++				 (port_count << 8)) + card->mpa_tx.start_port;
++		} else {
++			mport = (adapter->ioport | SDIO_MPA_ADDR_BASE |
++				 (card->mpa_tx.ports << 4)) +
++				 card->mpa_tx.start_port;
++		}
++
+ 		ret = mwifiex_write_data_to_card(adapter, card->mpa_tx.buf,
+-						 card->mpa_tx.buf_len,
+-						 (adapter->ioport | 0x1000 |
+-						 (card->mpa_tx.ports << 4)) +
+-						  card->mpa_tx.start_port);
++						 card->mpa_tx.buf_len, mport);
+ 
+ 		MP_TX_AGGR_BUF_RESET(card);
+ 	}
+@@ -1434,7 +1618,7 @@ static int mwifiex_sdio_host_to_card(struct mwifiex_adapter *adapter,
+ 	int ret;
+ 	u32 buf_block_len;
+ 	u32 blk_size;
+-	u8 port = CTRL_PORT;
++	u32 port = CTRL_PORT;
+ 	u8 *payload = (u8 *)skb->data;
+ 	u32 pkt_len = skb->len;
+ 
+@@ -1465,6 +1649,9 @@ static int mwifiex_sdio_host_to_card(struct mwifiex_adapter *adapter,
+ 		    pkt_len > MWIFIEX_UPLD_SIZE)
+ 			dev_err(adapter->dev, "%s: payload=%p, nb=%d\n",
+ 				__func__, payload, pkt_len);
++
++		if (card->supports_sdio_new_mode)
++			port = CMD_PORT_SLCT;
+ 	}
+ 
+ 	/* Transfer data to card */
+@@ -1586,18 +1773,7 @@ static int mwifiex_register_dev(struct mwifiex_adapter *adapter)
+ 
+ 	adapter->dev = &func->dev;
+ 
+-	switch (func->device) {
+-	case SDIO_DEVICE_ID_MARVELL_8786:
+-		strcpy(adapter->fw_name, SD8786_DEFAULT_FW_NAME);
+-		break;
+-	case SDIO_DEVICE_ID_MARVELL_8797:
+-		strcpy(adapter->fw_name, SD8797_DEFAULT_FW_NAME);
+-		break;
+-	case SDIO_DEVICE_ID_MARVELL_8787:
+-	default:
+-		strcpy(adapter->fw_name, SD8787_DEFAULT_FW_NAME);
+-		break;
+-	}
++	strcpy(adapter->fw_name, card->firmware);
+ 
+ 	return 0;
+ 
+@@ -1626,8 +1802,9 @@ disable_func:
+ static int mwifiex_init_sdio(struct mwifiex_adapter *adapter)
+ {
+ 	struct sdio_mmc_card *card = adapter->card;
++	const struct mwifiex_sdio_card_reg *reg = card->reg;
+ 	int ret;
+-	u32 sdio_ireg;
++	u8 sdio_ireg;
+ 
+ 	/*
+ 	 * Read the HOST_INT_STATUS_REG for ACK the first interrupt got
+@@ -1645,30 +1822,35 @@ static int mwifiex_init_sdio(struct mwifiex_adapter *adapter)
+ 	/* Initialize SDIO variables in card */
+ 	card->mp_rd_bitmap = 0;
+ 	card->mp_wr_bitmap = 0;
+-	card->curr_rd_port = 1;
+-	card->curr_wr_port = 1;
++	card->curr_rd_port = reg->start_rd_port;
++	card->curr_wr_port = reg->start_wr_port;
+ 
+-	card->mp_data_port_mask = DATA_PORT_MASK;
++	card->mp_data_port_mask = reg->data_port_mask;
+ 
+ 	card->mpa_tx.buf_len = 0;
+ 	card->mpa_tx.pkt_cnt = 0;
+ 	card->mpa_tx.start_port = 0;
+ 
+ 	card->mpa_tx.enabled = 1;
+-	card->mpa_tx.pkt_aggr_limit = SDIO_MP_AGGR_DEF_PKT_LIMIT;
++	card->mpa_tx.pkt_aggr_limit = card->mp_agg_pkt_limit;
+ 
+ 	card->mpa_rx.buf_len = 0;
+ 	card->mpa_rx.pkt_cnt = 0;
+ 	card->mpa_rx.start_port = 0;
+ 
+ 	card->mpa_rx.enabled = 1;
+-	card->mpa_rx.pkt_aggr_limit = SDIO_MP_AGGR_DEF_PKT_LIMIT;
++	card->mpa_rx.pkt_aggr_limit = card->mp_agg_pkt_limit;
+ 
+ 	/* Allocate buffers for SDIO MP-A */
+-	card->mp_regs = kzalloc(MAX_MP_REGS, GFP_KERNEL);
++	card->mp_regs = kzalloc(reg->max_mp_regs, GFP_KERNEL);
+ 	if (!card->mp_regs)
+ 		return -ENOMEM;
+ 
++	/* Allocate skb pointer buffers */
++	card->mpa_rx.skb_arr = kzalloc((sizeof(void *)) *
++				       card->mp_agg_pkt_limit, GFP_KERNEL);
++	card->mpa_rx.len_arr = kzalloc(sizeof(*card->mpa_rx.len_arr) *
++				       card->mp_agg_pkt_limit, GFP_KERNEL);
+ 	ret = mwifiex_alloc_sdio_mpa_buffers(adapter,
+ 					     SDIO_MP_TX_AGGR_DEF_BUF_SIZE,
+ 					     SDIO_MP_RX_AGGR_DEF_BUF_SIZE);
+@@ -1705,6 +1887,8 @@ static void mwifiex_cleanup_sdio(struct mwifiex_adapter *adapter)
+ 	struct sdio_mmc_card *card = adapter->card;
+ 
+ 	kfree(card->mp_regs);
++	kfree(card->mpa_rx.skb_arr);
++	kfree(card->mpa_rx.len_arr);
+ 	kfree(card->mpa_tx.buf);
+ 	kfree(card->mpa_rx.buf);
+ }
+@@ -1716,16 +1900,20 @@ static void
+ mwifiex_update_mp_end_port(struct mwifiex_adapter *adapter, u16 port)
+ {
+ 	struct sdio_mmc_card *card = adapter->card;
++	const struct mwifiex_sdio_card_reg *reg = card->reg;
+ 	int i;
+ 
+ 	card->mp_end_port = port;
+ 
+-	card->mp_data_port_mask = DATA_PORT_MASK;
++	card->mp_data_port_mask = reg->data_port_mask;
+ 
+-	for (i = 1; i <= MAX_PORT - card->mp_end_port; i++)
+-		card->mp_data_port_mask &= ~(1 << (MAX_PORT - i));
++	if (reg->start_wr_port) {
++		for (i = 1; i <= card->max_ports - card->mp_end_port; i++)
++			card->mp_data_port_mask &=
++					~(1 << (card->max_ports - i));
++	}
+ 
+-	card->curr_wr_port = 1;
++	card->curr_wr_port = reg->start_wr_port;
+ 
+ 	dev_dbg(adapter->dev, "cmd: mp_end_port %d, data port mask 0x%x\n",
+ 		port, card->mp_data_port_mask);
+@@ -1831,3 +2019,4 @@ MODULE_LICENSE("GPL v2");
+ MODULE_FIRMWARE(SD8786_DEFAULT_FW_NAME);
+ MODULE_FIRMWARE(SD8787_DEFAULT_FW_NAME);
+ MODULE_FIRMWARE(SD8797_DEFAULT_FW_NAME);
++MODULE_FIRMWARE(SD8897_DEFAULT_FW_NAME);
+diff --git a/drivers/net/wireless/mwifiex/sdio.h b/drivers/net/wireless/mwifiex/sdio.h
+index 8cc5468..8e6bf7f 100644
+--- a/drivers/net/wireless/mwifiex/sdio.h
++++ b/drivers/net/wireless/mwifiex/sdio.h
+@@ -32,30 +32,37 @@
+ #define SD8786_DEFAULT_FW_NAME "mrvl/sd8786_uapsta.bin"
+ #define SD8787_DEFAULT_FW_NAME "mrvl/sd8787_uapsta.bin"
+ #define SD8797_DEFAULT_FW_NAME "mrvl/sd8797_uapsta.bin"
++#define SD8897_DEFAULT_FW_NAME "mrvl/sd8897_uapsta.bin"
+ 
+ #define BLOCK_MODE	1
+ #define BYTE_MODE	0
+ 
+ #define REG_PORT			0
+-#define RD_BITMAP_L			0x04
+-#define RD_BITMAP_U			0x05
+-#define WR_BITMAP_L			0x06
+-#define WR_BITMAP_U			0x07
+-#define RD_LEN_P0_L			0x08
+-#define RD_LEN_P0_U			0x09
+ 
+ #define MWIFIEX_SDIO_IO_PORT_MASK		0xfffff
+ 
+ #define MWIFIEX_SDIO_BYTE_MODE_MASK	0x80000000
+ 
++#define SDIO_MPA_ADDR_BASE		0x1000
+ #define CTRL_PORT			0
+ #define CTRL_PORT_MASK			0x0001
+-#define DATA_PORT_MASK			0xfffe
+ 
+-#define MAX_MP_REGS			64
+-#define MAX_PORT			16
+-
+-#define SDIO_MP_AGGR_DEF_PKT_LIMIT	8
++#define CMD_PORT_UPLD_INT_MASK		(0x1U<<6)
++#define CMD_PORT_DNLD_INT_MASK		(0x1U<<7)
++#define HOST_TERM_CMD53			(0x1U << 2)
++#define REG_PORT			0
++#define MEM_PORT			0x10000
++#define CMD_RD_LEN_0			0xB4
++#define CMD_RD_LEN_1			0xB5
++#define CARD_CONFIG_2_1_REG             0xCD
++#define CMD53_NEW_MODE			(0x1U << 0)
++#define CMD_CONFIG_0			0xB8
++#define CMD_PORT_RD_LEN_EN		(0x1U << 2)
++#define CMD_CONFIG_1			0xB9
++#define CMD_PORT_AUTO_EN		(0x1U << 0)
++#define CMD_PORT_SLCT			0x8000
++#define UP_LD_CMD_PORT_HOST_INT_STATUS	(0x40U)
++#define DN_LD_CMD_PORT_HOST_INT_STATUS	(0x80U)
+ 
+ #define SDIO_MP_TX_AGGR_DEF_BUF_SIZE        (8192)	/* 8K */
+ 
+@@ -90,8 +97,7 @@
+ #define UP_LD_HOST_INT_MASK		(0x1U)
+ /* Host Control Registers : Download host interrupt mask */
+ #define DN_LD_HOST_INT_MASK		(0x2U)
+-/* Enable Host interrupt mask */
+-#define HOST_INT_ENABLE	(UP_LD_HOST_INT_MASK | DN_LD_HOST_INT_MASK)
++
+ /* Disable Host interrupt mask */
+ #define	HOST_INT_DISABLE		0xff
+ 
+@@ -106,7 +112,6 @@
+ #define HOST_INT_RSR_REG		0x01
+ /* Host Control Registers : Upload host interrupt RSR */
+ #define UP_LD_HOST_INT_RSR		(0x1U)
+-#define SDIO_INT_MASK			0x3F
+ 
+ /* Host Control Registers : Host interrupt status */
+ #define HOST_INT_STATUS_REG		0x28
+@@ -117,8 +122,6 @@
+ /* Host Control Registers : Download restart */
+ #define DN_LD_RESTART                   (0x1U << 0)
+ 
+-/* Card Control Registers : Card status register */
+-#define CARD_STATUS_REG                 0x30
+ /* Card Control Registers : Card I/O ready */
+ #define CARD_IO_READY                   (0x1U << 3)
+ /* Card Control Registers : CIS card ready */
+@@ -153,20 +156,9 @@
+ /* Card Control Registers : Power down RSR */
+ #define POWER_DOWN_RSR                  (0x1U << 3)
+ 
+-/* Card Control Registers : Miscellaneous Configuration Register */
+-#define CARD_MISC_CFG_REG               0x6C
+-
+-/* Host F1 read base 0 */
+-#define HOST_F1_RD_BASE_0		0x0040
+-/* Host F1 read base 1 */
+-#define HOST_F1_RD_BASE_1		0x0041
+ /* Host F1 card ready */
+ #define HOST_F1_CARD_RDY		0x0020
+ 
+-/* Firmware status 0 register */
+-#define CARD_FW_STATUS0_REG		0x60
+-/* Firmware status 1 register */
+-#define CARD_FW_STATUS1_REG		0x61
+ /* Rx length register */
+ #define CARD_RX_LEN_REG			0x62
+ /* Rx unit register */
+@@ -192,7 +184,8 @@
+ 	if (a->mpa_tx.start_port <= port)				\
+ 		a->mpa_tx.ports |= (1<<(a->mpa_tx.pkt_cnt));		\
+ 	else								\
+-		a->mpa_tx.ports |= (1<<(a->mpa_tx.pkt_cnt+1+(MAX_PORT -	\
++		a->mpa_tx.ports |= (1<<(a->mpa_tx.pkt_cnt+1+		\
++						(a->max_ports -	\
+ 						a->mp_end_port)));	\
+ 	a->mpa_tx.pkt_cnt++;						\
+ } while (0)
+@@ -201,12 +194,6 @@
+ #define MP_TX_AGGR_PKT_LIMIT_REACHED(a)					\
+ 			(a->mpa_tx.pkt_cnt == a->mpa_tx.pkt_aggr_limit)
+ 
+-/* SDIO Tx aggregation port limit ? */
+-#define MP_TX_AGGR_PORT_LIMIT_REACHED(a) ((a->curr_wr_port <		\
+-			a->mpa_tx.start_port) && (((MAX_PORT -		\
+-			a->mpa_tx.start_port) + a->curr_wr_port) >=	\
+-				SDIO_MP_AGGR_DEF_PKT_LIMIT))
+-
+ /* Reset SDIO Tx aggregation buffer parameters */
+ #define MP_TX_AGGR_BUF_RESET(a) do {					\
+ 	a->mpa_tx.pkt_cnt = 0;						\
+@@ -219,12 +206,6 @@
+ #define MP_RX_AGGR_PKT_LIMIT_REACHED(a)					\
+ 			(a->mpa_rx.pkt_cnt == a->mpa_rx.pkt_aggr_limit)
+ 
+-/* SDIO Tx aggregation port limit ? */
+-#define MP_RX_AGGR_PORT_LIMIT_REACHED(a) ((a->curr_rd_port <		\
+-			a->mpa_rx.start_port) && (((MAX_PORT -		\
+-			a->mpa_rx.start_port) + a->curr_rd_port) >=	\
+-			SDIO_MP_AGGR_DEF_PKT_LIMIT))
+-
+ /* SDIO Rx aggregation in progress ? */
+ #define MP_RX_AGGR_IN_PROGRESS(a) (a->mpa_rx.pkt_cnt > 0)
+ 
+@@ -232,20 +213,6 @@
+ #define MP_RX_AGGR_BUF_HAS_ROOM(a, rx_len)				\
+ 			((a->mpa_rx.buf_len+rx_len) <= a->mpa_rx.buf_size)
+ 
+-/* Prepare to copy current packet from card to SDIO Rx aggregation buffer */
+-#define MP_RX_AGGR_SETUP(a, skb, port) do {				\
+-	a->mpa_rx.buf_len += skb->len;					\
+-	if (!a->mpa_rx.pkt_cnt)						\
+-		a->mpa_rx.start_port = port;				\
+-	if (a->mpa_rx.start_port <= port)				\
+-		a->mpa_rx.ports |= (1<<(a->mpa_rx.pkt_cnt));		\
+-	else								\
+-		a->mpa_rx.ports |= (1<<(a->mpa_rx.pkt_cnt+1));		\
+-	a->mpa_rx.skb_arr[a->mpa_rx.pkt_cnt] = skb;			\
+-	a->mpa_rx.len_arr[a->mpa_rx.pkt_cnt] = skb->len;		\
+-	a->mpa_rx.pkt_cnt++;						\
+-} while (0)
+-
+ /* Reset SDIO Rx aggregation buffer parameters */
+ #define MP_RX_AGGR_BUF_RESET(a) do {					\
+ 	a->mpa_rx.pkt_cnt = 0;						\
+@@ -254,14 +221,13 @@
+ 	a->mpa_rx.start_port = 0;					\
+ } while (0)
+ 
+-
+ /* data structure for SDIO MPA TX */
+ struct mwifiex_sdio_mpa_tx {
+ 	/* multiport tx aggregation buffer pointer */
+ 	u8 *buf;
+ 	u32 buf_len;
+ 	u32 pkt_cnt;
+-	u16 ports;
++	u32 ports;
+ 	u16 start_port;
+ 	u8 enabled;
+ 	u32 buf_size;
+@@ -272,11 +238,11 @@ struct mwifiex_sdio_mpa_rx {
+ 	u8 *buf;
+ 	u32 buf_len;
+ 	u32 pkt_cnt;
+-	u16 ports;
++	u32 ports;
+ 	u16 start_port;
+ 
+-	struct sk_buff *skb_arr[SDIO_MP_AGGR_DEF_PKT_LIMIT];
+-	u32 len_arr[SDIO_MP_AGGR_DEF_PKT_LIMIT];
++	struct sk_buff **skb_arr;
++	u32 *len_arr;
+ 
+ 	u8 enabled;
+ 	u32 buf_size;
+@@ -286,15 +252,47 @@ struct mwifiex_sdio_mpa_rx {
+ int mwifiex_bus_register(void);
+ void mwifiex_bus_unregister(void);
+ 
++struct mwifiex_sdio_card_reg {
++	u8 start_rd_port;
++	u8 start_wr_port;
++	u8 base_0_reg;
++	u8 base_1_reg;
++	u8 poll_reg;
++	u8 host_int_enable;
++	u8 status_reg_0;
++	u8 status_reg_1;
++	u8 sdio_int_mask;
++	u32 data_port_mask;
++	u8 max_mp_regs;
++	u8 rd_bitmap_l;
++	u8 rd_bitmap_u;
++	u8 rd_bitmap_1l;
++	u8 rd_bitmap_1u;
++	u8 wr_bitmap_l;
++	u8 wr_bitmap_u;
++	u8 wr_bitmap_1l;
++	u8 wr_bitmap_1u;
++	u8 rd_len_p0_l;
++	u8 rd_len_p0_u;
++	u8 card_misc_cfg_reg;
++};
++
+ struct sdio_mmc_card {
+ 	struct sdio_func *func;
+ 	struct mwifiex_adapter *adapter;
+ 
+-	u16 mp_rd_bitmap;
+-	u16 mp_wr_bitmap;
++	const char *firmware;
++	const struct mwifiex_sdio_card_reg *reg;
++	u8 max_ports;
++	u8 mp_agg_pkt_limit;
++	bool supports_sdio_new_mode;
++	bool has_control_mask;
++
++	u32 mp_rd_bitmap;
++	u32 mp_wr_bitmap;
+ 
+ 	u16 mp_end_port;
+-	u16 mp_data_port_mask;
++	u32 mp_data_port_mask;
+ 
+ 	u8 curr_rd_port;
+ 	u8 curr_wr_port;
+@@ -305,6 +303,98 @@ struct sdio_mmc_card {
+ 	struct mwifiex_sdio_mpa_rx mpa_rx;
+ };
+ 
++struct mwifiex_sdio_device {
++	const char *firmware;
++	const struct mwifiex_sdio_card_reg *reg;
++	u8 max_ports;
++	u8 mp_agg_pkt_limit;
++	bool supports_sdio_new_mode;
++	bool has_control_mask;
++};
++
++static const struct mwifiex_sdio_card_reg mwifiex_reg_sd87xx = {
++	.start_rd_port = 1,
++	.start_wr_port = 1,
++	.base_0_reg = 0x0040,
++	.base_1_reg = 0x0041,
++	.poll_reg = 0x30,
++	.host_int_enable = UP_LD_HOST_INT_MASK | DN_LD_HOST_INT_MASK,
++	.status_reg_0 = 0x60,
++	.status_reg_1 = 0x61,
++	.sdio_int_mask = 0x3f,
++	.data_port_mask = 0x0000fffe,
++	.max_mp_regs = 64,
++	.rd_bitmap_l = 0x04,
++	.rd_bitmap_u = 0x05,
++	.wr_bitmap_l = 0x06,
++	.wr_bitmap_u = 0x07,
++	.rd_len_p0_l = 0x08,
++	.rd_len_p0_u = 0x09,
++	.card_misc_cfg_reg = 0x6c,
++};
++
++static const struct mwifiex_sdio_card_reg mwifiex_reg_sd8897 = {
++	.start_rd_port = 0,
++	.start_wr_port = 0,
++	.base_0_reg = 0x60,
++	.base_1_reg = 0x61,
++	.poll_reg = 0x50,
++	.host_int_enable = UP_LD_HOST_INT_MASK | DN_LD_HOST_INT_MASK |
++			CMD_PORT_UPLD_INT_MASK | CMD_PORT_DNLD_INT_MASK,
++	.status_reg_0 = 0xc0,
++	.status_reg_1 = 0xc1,
++	.sdio_int_mask = 0xff,
++	.data_port_mask = 0xffffffff,
++	.max_mp_regs = 184,
++	.rd_bitmap_l = 0x04,
++	.rd_bitmap_u = 0x05,
++	.rd_bitmap_1l = 0x06,
++	.rd_bitmap_1u = 0x07,
++	.wr_bitmap_l = 0x08,
++	.wr_bitmap_u = 0x09,
++	.wr_bitmap_1l = 0x0a,
++	.wr_bitmap_1u = 0x0b,
++	.rd_len_p0_l = 0x0c,
++	.rd_len_p0_u = 0x0d,
++	.card_misc_cfg_reg = 0xcc,
++};
++
++static const struct mwifiex_sdio_device mwifiex_sdio_sd8786 = {
++	.firmware = SD8786_DEFAULT_FW_NAME,
++	.reg = &mwifiex_reg_sd87xx,
++	.max_ports = 16,
++	.mp_agg_pkt_limit = 8,
++	.supports_sdio_new_mode = false,
++	.has_control_mask = true,
++};
++
++static const struct mwifiex_sdio_device mwifiex_sdio_sd8787 = {
++	.firmware = SD8787_DEFAULT_FW_NAME,
++	.reg = &mwifiex_reg_sd87xx,
++	.max_ports = 16,
++	.mp_agg_pkt_limit = 8,
++	.supports_sdio_new_mode = false,
++	.has_control_mask = true,
++};
++
++static const struct mwifiex_sdio_device mwifiex_sdio_sd8797 = {
++	.firmware = SD8797_DEFAULT_FW_NAME,
++	.reg = &mwifiex_reg_sd87xx,
++	.max_ports = 16,
++	.mp_agg_pkt_limit = 8,
++	.supports_sdio_new_mode = false,
++	.has_control_mask = true,
++};
++
++static const struct mwifiex_sdio_device mwifiex_sdio_sd8897 = {
++	.firmware = SD8897_DEFAULT_FW_NAME,
++	.reg = &mwifiex_reg_sd8897,
++	.max_ports = 32,
++	.mp_agg_pkt_limit = 16,
++	.supports_sdio_new_mode = true,
++	.has_control_mask = false,
++};
++
+ /*
+  * .cmdrsp_complete handler
+  */
+@@ -325,4 +415,77 @@ static inline int mwifiex_sdio_event_complete(struct mwifiex_adapter *adapter,
+ 	return 0;
+ }
+ 
++static inline bool
++mp_rx_aggr_port_limit_reached(struct sdio_mmc_card *card)
++{
++	u8 tmp;
++
++	if (card->curr_rd_port < card->mpa_rx.start_port) {
++		if (card->supports_sdio_new_mode)
++			tmp = card->mp_end_port >> 1;
++		else
++			tmp = card->mp_agg_pkt_limit;
++
++		if (((card->max_ports - card->mpa_rx.start_port) +
++		    card->curr_rd_port) >= tmp)
++			return true;
++	}
++
++	if (!card->supports_sdio_new_mode)
++		return false;
++
++	if ((card->curr_rd_port - card->mpa_rx.start_port) >=
++	    (card->mp_end_port >> 1))
++		return true;
++
++	return false;
++}
++
++static inline bool
++mp_tx_aggr_port_limit_reached(struct sdio_mmc_card *card)
++{
++	u16 tmp;
++
++	if (card->curr_wr_port < card->mpa_tx.start_port) {
++		if (card->supports_sdio_new_mode)
++			tmp = card->mp_end_port >> 1;
++		else
++			tmp = card->mp_agg_pkt_limit;
++
++		if (((card->max_ports - card->mpa_tx.start_port) +
++		    card->curr_wr_port) >= tmp)
++			return true;
++	}
++
++	if (!card->supports_sdio_new_mode)
++		return false;
++
++	if ((card->curr_wr_port - card->mpa_tx.start_port) >=
++	    (card->mp_end_port >> 1))
++		return true;
++
++	return false;
++}
++
++/* Prepare to copy current packet from card to SDIO Rx aggregation buffer */
++static inline void mp_rx_aggr_setup(struct sdio_mmc_card *card,
++				    struct sk_buff *skb, u8 port)
++{
++	card->mpa_rx.buf_len += skb->len;
++
++	if (!card->mpa_rx.pkt_cnt)
++		card->mpa_rx.start_port = port;
++
++	if (card->supports_sdio_new_mode) {
++		card->mpa_rx.ports |= (1 << port);
++	} else {
++		if (card->mpa_rx.start_port <= port)
++			card->mpa_rx.ports |= 1 << (card->mpa_rx.pkt_cnt);
++		else
++			card->mpa_rx.ports |= 1 << (card->mpa_rx.pkt_cnt + 1);
++	}
++	card->mpa_rx.skb_arr[card->mpa_rx.pkt_cnt] = skb;
++	card->mpa_rx.len_arr[card->mpa_rx.pkt_cnt] = skb->len;
++	card->mpa_rx.pkt_cnt++;
++}
+ #endif /* _MWIFIEX_SDIO_H */
+diff --git a/drivers/usb/phy/phy-mxs-usb.c b/drivers/usb/phy/phy-mxs-usb.c
+index 0423d56..1b287dd 100644
+--- a/drivers/usb/phy/phy-mxs-usb.c
++++ b/drivers/usb/phy/phy-mxs-usb.c
+@@ -223,7 +223,7 @@ static void __mxs_phy_disconnect_line(struct mxs_phy *mxs_phy, bool disconnect)
+ 
+ 	if (disconnect)
+ 		writel_relaxed(BM_USBPHY_DEBUG_CLKGATE,
+-			base + HW_USBPHY_DEBUG_CLR);
++			base + HW_USBPHY_DEBUG_SET);
+ 
+ 	if (mxs_phy->port_id == 0) {
+ 		reg = disconnect ? ANADIG_USB1_LOOPBACK_SET
+@@ -241,7 +241,7 @@ static void __mxs_phy_disconnect_line(struct mxs_phy *mxs_phy, bool disconnect)
+ 
+ 	if (!disconnect)
+ 		writel_relaxed(BM_USBPHY_DEBUG_CLKGATE,
+-			base + HW_USBPHY_DEBUG_SET);
++			base + HW_USBPHY_DEBUG_CLR);
+ 
+ 	/* Delay some time, and let Linestate be SE0 for controller */
+ 	if (disconnect)
+diff --git a/drivers/video/mxc/mxc_ipuv3_fb.c b/drivers/video/mxc/mxc_ipuv3_fb.c
+index 3cf386f..ef5b575 100644
+--- a/drivers/video/mxc/mxc_ipuv3_fb.c
++++ b/drivers/video/mxc/mxc_ipuv3_fb.c
+@@ -428,6 +428,28 @@ static bool mxcfb_need_to_set_par(struct fb_info *fbi)
+ 			sizeof(struct fb_var_screeninfo));
+ }
+ 
++static struct fb_videomode *mxc_match_mode(const struct fb_var_screeninfo *var,
++					  struct list_head *head)
++{
++	struct list_head *pos;
++	struct fb_modelist *modelist;
++	struct fb_videomode *m, mode;
++
++	fb_var_to_videomode(&mode, var);
++	list_for_each(pos, head) {
++		modelist = list_entry(pos, struct fb_modelist, list);
++		m = &modelist->mode;
++
++		mode.sync &= ~FB_MXC_SYNC_MASK;
++		mode.sync |= m->sync & FB_MXC_SYNC_MASK;
++
++		if (fb_mode_is_equal(m, &mode))
++			return m;
++	}
++
++	return NULL;
++}
++
+ /*
+  * Set framebuffer parameters and change the operating mode.
+  *
+@@ -583,6 +605,7 @@ static int mxcfb_set_par(struct fb_info *fbi)
+ 
+ 	if (!mxc_fbi->overlay) {
+ 		uint32_t out_pixel_fmt;
++		struct fb_videomode *sync_mode;
+ 
+ 		memset(&sig_cfg, 0, sizeof(sig_cfg));
+ 		if (fbi->var.vmode & FB_VMODE_INTERLACED)
+@@ -596,6 +619,21 @@ static int mxcfb_set_par(struct fb_info *fbi)
+ 			sig_cfg.Hsync_pol = true;
+ 		if (fbi->var.sync & FB_SYNC_VERT_HIGH_ACT)
+ 			sig_cfg.Vsync_pol = true;
++
++		/*
++		 * Try to find  matching all parameters, except
++		 * FB_MXC_SYNC_MASK bits in the .sync field.
++		 */
++		sync_mode = mxc_match_mode(&fbi->var, &fbi->modelist);
++		/*
++		 * If entry exists in the mode list and FB_MXC_SYNC_MASK
++		 * bits are empty in the fbi->var.sync (most probably cleared
++		 * by the user space application) then copy it from the found
++		 * mode list entry.
++		 */
++		if (sync_mode && !(fbi->var.sync & FB_MXC_SYNC_MASK))
++			fbi->var.sync = sync_mode->sync;
++
+ 		if (!(fbi->var.sync & FB_SYNC_CLK_LAT_FALL))
+ 			sig_cfg.clk_pol = true;
+ 		if (fbi->var.sync & FB_SYNC_DATA_INVERT)
+diff --git a/drivers/video/mxc/mxc_lcdif.c b/drivers/video/mxc/mxc_lcdif.c
+index a0cca1c..9c20235 100644
+--- a/drivers/video/mxc/mxc_lcdif.c
++++ b/drivers/video/mxc/mxc_lcdif.c
+@@ -48,6 +48,12 @@ static struct fb_videomode lcdif_modedb[] = {
+ 	FB_SYNC_CLK_LAT_FALL,
+ 	FB_VMODE_NONINTERLACED,
+ 	0,},
++	{
++	/* 800x480 @ 60 Hz , pixel clk @ 32MHz */
++	"KD050C-WVGA", 60, 800, 480, 30000, 40, 40, 13, 29, 48, 3,
++	FB_SYNC_CLK_LAT_FALL,
++	FB_VMODE_NONINTERLACED,
++	0,},
+ };
+ static int lcdif_modedb_sz = ARRAY_SIZE(lcdif_modedb);
+ 
+diff --git a/include/linux/mxcfb.h b/include/linux/mxcfb.h
+index 67db5ee..e63aa2c 100644
+--- a/include/linux/mxcfb.h
++++ b/include/linux/mxcfb.h
+@@ -23,6 +23,17 @@
+ 
+ #include <uapi/linux/mxcfb.h>
+ 
++#define FB_SYNC_OE_LOW_ACT	0x80000000
++#define FB_SYNC_CLK_LAT_FALL	0x40000000
++#define FB_SYNC_DATA_INVERT	0x20000000
++#define FB_SYNC_CLK_IDLE_EN	0x10000000
++#define FB_SYNC_SHARP_MODE	0x08000000
++#define FB_SYNC_SWAP_RGB	0x04000000
++
++#define FB_MXC_SYNC_MASK	(FB_SYNC_OE_LOW_ACT | FB_SYNC_CLK_LAT_FALL | \
++				 FB_SYNC_DATA_INVERT | FB_SYNC_CLK_IDLE_EN | \
++				 FB_SYNC_SHARP_MODE | FB_SYNC_SWAP_RGB)
++
+ extern struct fb_videomode mxcfb_modedb[];
+ extern int mxcfb_modedb_sz;
+ 
+diff --git a/sound/soc/fsl/Kconfig b/sound/soc/fsl/Kconfig
+index 8e8f144..5395581 100644
+--- a/sound/soc/fsl/Kconfig
++++ b/sound/soc/fsl/Kconfig
+@@ -197,6 +197,18 @@ config SND_SOC_IMX_CS42888
+ 	 Say Y if you want to add support for SoC audio on an i.MX board with
+ 	 a cs42888 codec.
+ 
++config SND_SOC_IMX_WM8731
++	tristate "SoC Audio support for i.MX boards with wm8731"
++	depends on OF && I2C
++	select SND_SOC_WM8731
++	select SND_SOC_IMX_PCM_DMA
++	select SND_SOC_IMX_AUDMUX
++	select SND_SOC_FSL_SSI
++	select SND_SOC_FSL_UTILS
++	help
++	  Say Y if you want to add support for SoC audio on an i.MX board with
++	  a wm8731 codec.
++
+ config SND_SOC_IMX_WM8962
+ 	tristate "SoC Audio support for i.MX boards with wm8962"
+ 	depends on OF && I2C
+diff --git a/sound/soc/fsl/Makefile b/sound/soc/fsl/Makefile
+index a04afcf..0d7dfee 100644
+--- a/sound/soc/fsl/Makefile
++++ b/sound/soc/fsl/Makefile
+@@ -54,6 +54,7 @@ snd-soc-mx27vis-aic32x4-objs := mx27vis-aic32x4.o
+ snd-soc-wm1133-ev1-objs := wm1133-ev1.o
+ snd-soc-imx-cs42888-objs := imx-cs42888.o
+ snd-soc-imx-sgtl5000-objs := imx-sgtl5000.o
++snd-soc-imx-wm8731-objs := imx-wm8731.o
+ snd-soc-imx-wm8962-objs := imx-wm8962.o
+ snd-soc-imx-spdif-objs := imx-spdif.o
+ snd-soc-imx-mc13783-objs := imx-mc13783.o
+@@ -67,6 +68,7 @@ obj-$(CONFIG_SND_MXC_SOC_WM1133_EV1) += snd-soc-wm1133-ev1.o
+ obj-$(CONFIG_SND_SOC_IMX_CS42888) += snd-soc-imx-cs42888.o
+ obj-$(CONFIG_SND_SOC_IMX_SGTL5000) += snd-soc-imx-sgtl5000.o
+ obj-$(CONFIG_SND_SOC_IMX_WM8962) += snd-soc-imx-wm8962.o
++obj-$(CONFIG_SND_SOC_IMX_WM8731) += snd-soc-imx-wm8731.o
+ obj-$(CONFIG_SND_SOC_IMX_SPDIF) += snd-soc-imx-spdif.o
+ obj-$(CONFIG_SND_SOC_IMX_MC13783) += snd-soc-imx-mc13783.o
+ obj-$(CONFIG_SND_SOC_IMX_HDMI) += snd-soc-imx-hdmi.o
+diff --git a/sound/soc/fsl/imx-hdmi-dma.c b/sound/soc/fsl/imx-hdmi-dma.c
+index 8f3e798..d8d0715 100644
+--- a/sound/soc/fsl/imx-hdmi-dma.c
++++ b/sound/soc/fsl/imx-hdmi-dma.c
+@@ -286,6 +286,17 @@ static void init_table(int channels)
+ 	}
+ }
+ 
++/*
++ * FIXME: Disable NEON Optimization in hdmi, or it will cause crash of
++ * pulseaudio in the userspace. There is no issue for the Optimization
++ * implemenation, if only use "VPUSH, VPOP" in the function, the pulseaudio
++ * will crash also. So for my assumption, we can't use the NEON in the
++ * interrupt.(tasklet is implemented by softirq.)
++ * Disable SMP, preempt, change the dma buffer to nocached, add protection of
++ * Dn register and fpscr, all these operation have no effect to the result.
++ */
++#define HDMI_DMA_NO_NEON
++
+ #ifdef HDMI_DMA_NO_NEON
+ /* Optimization for IEC head */
+ static void hdmi_dma_copy_16_c_lut(u16 *src, u32 *dst, int samples,
+diff --git a/sound/soc/fsl/imx-wm8731.c b/sound/soc/fsl/imx-wm8731.c
+new file mode 100644
+index 0000000..c0833cf
+--- /dev/null
++++ b/sound/soc/fsl/imx-wm8731.c
+@@ -0,0 +1,682 @@
++/*
++ * Copyright (C) 2014 Freescale Semiconductor, Inc.
++ *
++ * Based on imx-sgtl5000.c
++ * Copyright (C) 2012 Freescale Semiconductor, Inc.
++ * Copyright (C) 2012 Linaro Ltd.
++ *
++ * The code contained herein is licensed under the GNU General Public
++ * License. You may obtain a copy of the GNU General Public License
++ * Version 2 or later at the following locations:
++ *
++ * http://www.opensource.org/licenses/gpl-license.html
++ * http://www.gnu.org/copyleft/gpl.html
++ */
++
++#include <linux/module.h>
++#include <linux/of.h>
++#include <linux/of_platform.h>
++#include <linux/of_i2c.h>
++#include <linux/clk.h>
++#include <sound/soc.h>
++#include <sound/pcm_params.h>
++
++#include "../codecs/wm8731.h"
++#include "imx-audmux.h"
++#include "imx-ssi.h"
++
++#define DAI_NAME_SIZE	32
++#define	WM8731_MCLK_FREQ	(24000000 / 2)
++
++struct imx_wm8731_data {
++	struct snd_soc_dai_link dai;
++	struct snd_soc_card card;
++	char codec_dai_name[DAI_NAME_SIZE];
++	char platform_name[DAI_NAME_SIZE];
++	struct i2c_client *codec_dev;
++	/* audio_clocking_data */
++	struct clk *pll;
++	struct clk *clock_root;
++	long sysclk;
++	long current_rate;
++	/* apis */
++	int (*clock_enable)(int enable,struct imx_wm8731_data *data);
++};
++
++static int imx_wm8731_init(struct snd_soc_pcm_runtime *rtd);
++static int imx_hifi_hw_params_slv_mode(struct snd_pcm_substream *substream,
++                                       struct snd_pcm_hw_params *params);
++static void imx_hifi_shutdown(struct snd_pcm_substream *substream);
++
++struct imx_priv {
++	struct platform_device *pdev;
++	struct imx_wm8731_data *data;
++};
++
++static struct imx_priv card_priv;
++
++static struct snd_soc_ops imx_hifi_ops = {
++	.shutdown	= imx_hifi_shutdown,
++};
++
++/* imx card dapm widgets */
++static const struct snd_soc_dapm_widget imx_dapm_widgets[] = {
++	SND_SOC_DAPM_HP("Headphone Jack",       NULL),
++	SND_SOC_DAPM_SPK("Ext Spk",             NULL),
++	SND_SOC_DAPM_LINE("Line Jack",          NULL),
++	SND_SOC_DAPM_MIC("Mic Jack",            NULL),
++};
++
++/* imx machine connections to the codec pins */
++static const struct snd_soc_dapm_route audio_map[] = {
++	{ "Headphone Jack",     NULL,   "LHPOUT" },
++	{ "Headphone Jack",     NULL,   "RHPOUT" },
++
++	{ "Ext Spk",            NULL,   "LOUT" },
++	{ "Ext Spk",            NULL,   "ROUT" },
++
++	{ "LLINEIN",            NULL,   "Line Jack" },
++	{ "RLINEIN",            NULL,   "Line Jack" },
++
++	{ "MICIN",              NULL,   "Mic Bias" },
++	{ "Mic Bias",           NULL,   "Mic Jack"},
++};
++
++static int wm8731_slv_mode_init(struct imx_wm8731_data *data)
++{
++	struct clk *new_parent;
++	struct clk *ssi_clk;
++	struct i2c_client *codec_dev = data->codec_dev;
++
++	new_parent = devm_clk_get(&codec_dev->dev, "pll4");
++	if (IS_ERR(new_parent)) {
++		pr_err("Could not get \"pll4\" clock \n");
++		return PTR_ERR(new_parent);
++	}
++
++	ssi_clk = devm_clk_get(&codec_dev->dev, "imx-ssi.1");
++	if (IS_ERR(ssi_clk)) {
++		pr_err("Could not get \"imx-ssi.1\" clock \n");
++		return PTR_ERR(ssi_clk);
++	}
++
++	clk_set_parent(ssi_clk, new_parent);
++
++	data->pll = new_parent;
++	data->clock_root = ssi_clk;
++	data->current_rate = 0;
++
++	data->sysclk = 0;
++
++	return 0;
++}
++
++static int wm8731_slv_mode_clock_enable(int enable, struct imx_wm8731_data *data)
++{
++	long pll_rate;
++	long rate_req;
++	long rate_avail;
++
++	if (!enable)
++		return 0;
++
++	if (data->sysclk == data->current_rate)
++		return 0;
++
++	switch (data->sysclk) {
++		case 11289600:
++			pll_rate = 632217600;
++			break;
++
++		case 12288000:
++			pll_rate = 688128000;
++			break;
++
++		default:
++			return -EINVAL;
++	}
++
++	rate_req = pll_rate;
++	rate_avail = clk_round_rate(data->pll, rate_req);
++	clk_set_rate(data->pll, rate_avail);
++
++	rate_req = data->sysclk;
++	rate_avail = clk_round_rate(data->clock_root,
++								rate_req);
++	clk_set_rate(data->clock_root, rate_avail);
++
++	pr_info("%s: \"imx-ssi.1\" rate = %ld (= %ld)\n",
++			__func__, rate_avail, rate_req);
++
++	data->current_rate = data->sysclk;
++
++	return 0;
++}
++
++static int imx_hifi_startup_slv_mode(struct snd_pcm_substream *substream)
++{
++	/*
++	 * As SSI's sys clock rate depends on sampling rate,
++	 * the clock enabling code is moved to imx_hifi_hw_params().
++	 */
++	return 0;
++}
++
++static int wm8731_mst_mode_init(struct imx_wm8731_data *data)
++{
++	long rate;
++	struct clk *new_parent;
++	struct clk *ssi_clk;
++	struct i2c_client *codec_dev = data->codec_dev;
++
++	new_parent = devm_clk_get(&codec_dev->dev, "cko2");
++	if (IS_ERR(new_parent)) {
++		pr_err("Could not get \"cko2\" clock \n");
++		return PTR_ERR(new_parent);
++	}
++
++	ssi_clk = devm_clk_get(&codec_dev->dev, "cko");
++	if (IS_ERR(ssi_clk)) {
++		pr_err("Could not get \"cko\" clock \n");
++		return PTR_ERR(ssi_clk);
++	}
++
++	rate = clk_round_rate(new_parent, WM8731_MCLK_FREQ);
++	clk_set_rate(new_parent, rate);
++
++	clk_set_parent(ssi_clk, new_parent);
++
++	rate = clk_round_rate(ssi_clk, WM8731_MCLK_FREQ);
++	clk_set_rate(ssi_clk, rate);
++
++	pr_info("%s: \"CLKO\" rate = %ld (= %d)\n",
++		__func__, rate, WM8731_MCLK_FREQ);
++
++	data->pll = new_parent;
++	data->clock_root = ssi_clk;
++	data->sysclk = rate;
++
++	return 0;
++}
++
++static int wm8731_mst_mode_clock_enable(int enable, struct imx_wm8731_data *data)
++{
++	struct clk *clko = data->clock_root;
++
++	if (enable)
++		clk_enable(clko);
++	else
++		clk_disable(clko);
++
++	return 0;
++}
++
++static int imx_hifi_startup_mst_mode(struct snd_pcm_substream *substream)
++{
++	struct snd_soc_pcm_runtime *rtd = substream->private_data;
++	struct snd_soc_dai *codec_dai = rtd->codec_dai;
++	struct snd_soc_card *card = codec_dai->codec->card;
++	struct imx_wm8731_data *data = snd_soc_card_get_drvdata(card);
++
++	if (!codec_dai->active)
++		data->clock_enable(1,data);
++
++	return 0;
++}
++
++
++static int imx_hifi_hw_params_slv_mode(struct snd_pcm_substream *substream,
++				       struct snd_pcm_hw_params *params)
++{
++	struct snd_soc_pcm_runtime *rtd = substream->private_data;
++	struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
++	struct snd_soc_dai *codec_dai = rtd->codec_dai;
++	struct snd_soc_card *card = codec_dai->codec->card;
++	struct imx_wm8731_data *data = snd_soc_card_get_drvdata(card);
++	
++	u32 dai_format;
++	snd_pcm_format_t sample_format;
++	unsigned int channels;
++	unsigned int tx_mask, rx_mask;
++	unsigned int sampling_rate;
++	unsigned int div_2, div_psr, div_pm;
++	int ret;
++
++	sampling_rate = params_rate(params);
++	sample_format = params_format(params);
++	
++	channels = params_channels(params);
++	printk("%s:%s  sampling rate = %u  channels = %u \n", __FUNCTION__,
++		   (substream->stream == SNDRV_PCM_STREAM_PLAYBACK ? "Playback" : "Capture"),
++		   sampling_rate, channels);
++
++	/* set CPU DAI configuration */
++	switch (sampling_rate) {
++		case 8000:
++		case 32000:
++		case 48000:
++		case 96000:
++			data->sysclk = 12288000;
++			break;
++
++		case 44100:
++		case 88200:
++			data->sysclk = 11289600;
++			break;
++
++		default:
++			return -EINVAL;
++	}
++
++	wm8731_slv_mode_clock_enable(1,data);
++
++	dai_format = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_IF |
++		SND_SOC_DAIFMT_CBS_CFS;
++
++	ret = snd_soc_dai_set_fmt(cpu_dai, dai_format);
++	if (ret < 0)
++		return ret;
++
++	/* set i.MX active slot mask */
++	/* S[TR]CCR:DC */
++	tx_mask = ~((1 << channels) - 1);
++	rx_mask = tx_mask;
++	snd_soc_dai_set_tdm_slot(cpu_dai, tx_mask, rx_mask, 2, 32);
++
++	/*
++	 * SSI sysclk divider:
++	 * div_2:	/1 or /2
++	 * div_psr:	/1 or /8
++	 * div_pm:	/1 .. /256
++	 */
++	div_2	= 0;
++	div_psr	= 0;
++	switch (sampling_rate) {
++		case 8000:
++			// 1x1x12
++			div_pm	= 11;
++			break;
++		case 32000:
++			// 1x1x3
++			div_pm	= 2;
++			break;
++		case 48000:
++			// 1x1x2
++			div_pm	= 1;
++			break;
++		case 96000:
++			// 1x1x1
++			div_pm	= 0;
++			break;
++		case 44100:
++			// 1x1x2
++			div_pm	= 1;
++			break;
++		case 88200:
++			// 1x1x1
++			div_pm	= 0;
++			break;
++		default:
++			return -EINVAL;
++	}
++
++	/* sync mode: a single clock controls both playback and capture */
++	snd_soc_dai_set_clkdiv(cpu_dai, IMX_SSI_TX_DIV_2, (div_2 ? SSI_STCCR_DIV2 : 0));
++	snd_soc_dai_set_clkdiv(cpu_dai, IMX_SSI_TX_DIV_PSR, (div_psr ? SSI_STCCR_PSR : 0));
++	snd_soc_dai_set_clkdiv(cpu_dai, IMX_SSI_TX_DIV_PM, div_pm);
++
++	/* set codec DAI configuration */
++	dai_format = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF |
++		SND_SOC_DAIFMT_CBS_CFS;
++
++	ret = snd_soc_dai_set_fmt(codec_dai, dai_format);
++	if (ret < 0)
++		return ret;
++
++	ret = snd_soc_dai_set_sysclk(codec_dai,
++				     WM8731_SYSCLK_MCLK,
++				     data->sysclk,
++				     SND_SOC_CLOCK_IN);
++
++	if (ret < 0) {
++		pr_err("Failed to set codec master clock to %lu: %d \n",
++		       data->sysclk, ret);
++		return ret;
++	}
++
++	return 0;
++}
++
++static int imx_hifi_hw_params_mst_mode(struct snd_pcm_substream *substream,
++				       struct snd_pcm_hw_params *params)
++{
++	struct snd_soc_pcm_runtime *rtd = substream->private_data;
++	struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
++	struct snd_soc_dai *codec_dai = rtd->codec_dai;
++	struct snd_soc_card *card = codec_dai->codec->card;
++	struct imx_wm8731_data *data = snd_soc_card_get_drvdata(card);
++	u32 dai_format;
++	unsigned int channels;
++	unsigned int tx_mask, rx_mask;
++	unsigned int sampling_rate;
++	int ret;
++
++
++	sampling_rate = params_rate(params);
++	channels = params_channels(params);
++	pr_debug("%s:%s  sampling rate = %u  channels = %u \n", __FUNCTION__,
++		 (substream->stream == SNDRV_PCM_STREAM_PLAYBACK ? "Playback" : "Capture"),
++		 sampling_rate, channels);
++
++	/* set cpu DAI configuration */
++	dai_format = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_IF |
++		SND_SOC_DAIFMT_CBM_CFM;
++
++	ret = snd_soc_dai_set_fmt(cpu_dai, dai_format);
++	if (ret < 0)
++		return ret;
++
++	/* set i.MX active slot mask */
++	/* S[TR]CCR:DC */
++	tx_mask = ~((1 << channels) - 1);
++	rx_mask = tx_mask;
++	snd_soc_dai_set_tdm_slot(cpu_dai, tx_mask, rx_mask, 2, 32);
++
++	/* set codec DAI configuration */
++	dai_format = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF |
++		SND_SOC_DAIFMT_CBM_CFM;
++
++	ret = snd_soc_dai_set_fmt(codec_dai, dai_format);
++	if (ret < 0)
++		return ret;
++
++	ret = snd_soc_dai_set_sysclk(codec_dai,
++				     WM8731_SYSCLK_MCLK,
++				     data->sysclk,
++				     SND_SOC_CLOCK_IN);
++
++	if (ret < 0) {
++		pr_err("Failed to set codec master clock to %lu: %d \n",
++		       data->sysclk, ret);
++		return ret;
++	}
++
++	return 0;
++}
++
++static void imx_hifi_shutdown(struct snd_pcm_substream *substream)
++{
++	struct snd_soc_pcm_runtime *rtd = substream->private_data;
++	struct snd_soc_dai *codec_dai = rtd->codec_dai;
++	struct snd_soc_card *card = codec_dai->codec->card;
++	struct imx_wm8731_data *data = snd_soc_card_get_drvdata(card);
++	
++	if (!codec_dai->active)
++		data->clock_enable(0,data);
++	
++	return;
++}
++
++static int imx_wm8731_init(struct snd_soc_pcm_runtime *rtd)
++{
++	int ret = 0;
++	struct snd_soc_codec *codec = rtd->codec;
++
++	/* Add imx specific widgets */
++	ret = snd_soc_dapm_new_controls(&codec->dapm, imx_dapm_widgets,
++									ARRAY_SIZE(imx_dapm_widgets));
++	if (ret)
++			goto out_retcode;
++
++	/* Set up imx specific audio path audio_map */
++	ret = snd_soc_dapm_add_routes(&codec->dapm, audio_map, ARRAY_SIZE(audio_map));
++	if (ret)
++			goto out_retcode;
++
++	ret = snd_soc_dapm_enable_pin(&codec->dapm, "Headphone Jack");
++	if (ret)
++			goto out_retcode;
++
++	ret = snd_soc_dapm_nc_pin(&codec->dapm, "Ext Spk");
++	if (ret)
++			goto out_retcode;
++
++out_retcode:
++
++	if (ret)
++			pr_err("%s: failed with error code: %d \n", __FUNCTION__, ret);
++	else
++			pr_info("%s: success \n", __FUNCTION__);
++
++	return ret;
++}
++
++/**
++ * Configure AUDMUX interconnection between
++ * _slave (CPU side) and _master (codec size)
++ *
++ * When SSI operates in master mode, 5-wire interconnect with
++ * audio codec is required:
++ * TXC  - BCLK
++ * TXD  - DAC data
++ * RXD  - ADC data
++ * TXFS - {DAC|ADC}LRC, i.e. word clock
++ * RXC  - MCLK, i.e. oversampling clock
++ * Audmux is operated in asynchronous mode to enable 6-wire
++ * interface (as opposed to 4-wire interface in sync mode).
++ */
++static int imx_audmux_config_slv_mode(int _slave, int _master)
++{
++	unsigned int ptcr, pdcr;
++	int slave = _slave - 1;
++	int master = _master - 1;
++
++	ptcr = IMX_AUDMUX_V2_PTCR_SYN |
++		IMX_AUDMUX_V2_PTCR_TFSDIR |
++		IMX_AUDMUX_V2_PTCR_TFSEL(slave) |
++		IMX_AUDMUX_V2_PTCR_RCLKDIR |
++		IMX_AUDMUX_V2_PTCR_RCSEL(slave | 0x8) |
++		IMX_AUDMUX_V2_PTCR_TCLKDIR |
++		IMX_AUDMUX_V2_PTCR_TCSEL(slave);
++
++	pdcr = IMX_AUDMUX_V2_PDCR_RXDSEL(slave);
++	imx_audmux_v2_configure_port(master, ptcr, pdcr);
++	ptcr = ptcr & ~IMX_AUDMUX_V2_PTCR_SYN;
++	imx_audmux_v2_configure_port(master, ptcr, pdcr);
++
++	ptcr = IMX_AUDMUX_V2_PTCR_SYN |
++		IMX_AUDMUX_V2_PTCR_RCLKDIR |
++		IMX_AUDMUX_V2_PTCR_RCSEL(master | 0x8) |
++		IMX_AUDMUX_V2_PTCR_TCLKDIR |
++		IMX_AUDMUX_V2_PTCR_TCSEL(master);
++
++	pdcr = IMX_AUDMUX_V2_PDCR_RXDSEL(master);
++	imx_audmux_v2_configure_port(slave, ptcr, pdcr);
++	ptcr = ptcr & ~IMX_AUDMUX_V2_PTCR_SYN;
++	imx_audmux_v2_configure_port(slave, ptcr, pdcr);
++
++	return 0;
++}
++
++static int imx_audmux_config_mst_mode(int _slave, int _master)
++{
++	unsigned int ptcr, pdcr;
++	int slave = _slave - 1;
++	int master = _master - 1;
++
++	ptcr = IMX_AUDMUX_V2_PTCR_SYN;
++	ptcr |= IMX_AUDMUX_V2_PTCR_TFSDIR |
++		IMX_AUDMUX_V2_PTCR_TFSEL(master) |
++		IMX_AUDMUX_V2_PTCR_TCLKDIR |
++		IMX_AUDMUX_V2_PTCR_TCSEL(master);
++	pdcr = IMX_AUDMUX_V2_PDCR_RXDSEL(master);
++	imx_audmux_v2_configure_port(slave, ptcr, pdcr);
++
++	ptcr = IMX_AUDMUX_V2_PTCR_SYN;
++	pdcr = IMX_AUDMUX_V2_PDCR_RXDSEL(slave);
++	imx_audmux_v2_configure_port(master, ptcr, pdcr);
++
++	return 0;
++}
++
++static int imx_wm8731_probe(struct platform_device *pdev)
++{
++	struct device_node *ssi_np, *codec_np;
++	struct platform_device *ssi_pdev;
++	struct imx_priv *priv = &card_priv;
++	struct i2c_client *codec_dev;
++	struct imx_wm8731_data *data;
++	unsigned int src_port, ext_port;
++	unsigned int ssi_mode;
++	const char *ssi_mode_str;
++
++	int ret;
++
++	priv->pdev = pdev;
++	
++	ssi_np = of_parse_phandle(pdev->dev.of_node, "ssi-controller", 0);
++	codec_np = of_parse_phandle(pdev->dev.of_node, "audio-codec", 0);
++	if (!ssi_np || !codec_np) {
++		dev_err(&pdev->dev, "phandle missing or invalid\n");
++		ret = -EINVAL;
++		goto fail;
++	}
++
++	ssi_pdev = of_find_device_by_node(ssi_np);
++	if (!ssi_pdev) {
++		dev_err(&pdev->dev, "failed to find SSI platform device\n");
++		ret = -EINVAL;
++		goto fail;
++	}
++        
++	codec_dev = of_find_i2c_device_by_node(codec_np);
++	if (!codec_dev) {
++		dev_err(&pdev->dev, "failed to find codec platform device\n");
++		ret = -EINVAL;
++		goto fail;
++	}
++
++	data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
++	if (!data) {
++		ret = -ENOMEM;
++		goto fail;
++	}
++
++	card_priv.data = data;
++
++	data->codec_dev = codec_dev;
++	
++	data->dai.name = "HiFi";
++	data->dai.stream_name = "HiFi";
++	data->dai.codec_dai_name = "wm8731-hifi";
++	data->dai.codec_of_node = codec_np;
++	data->dai.cpu_dai_name = dev_name(&ssi_pdev->dev);
++	data->dai.platform_of_node = ssi_np;
++	data->dai.ops = &imx_hifi_ops;
++	data->dai.init = &imx_wm8731_init;
++	
++	ret = of_property_read_u32(pdev->dev.of_node, "src-port", &src_port);
++	if (ret) {
++		dev_err(&pdev->dev, "failed to get \"src-port\" value\n");
++		ret = -EINVAL;
++		goto fail;
++	}
++
++	ret = of_property_read_u32(pdev->dev.of_node, "ext-port", &ext_port);
++	if (ret) {
++		dev_err(&pdev->dev, "failed to get \"ext-port\" value\n");
++		ret = -EINVAL;
++		goto fail;
++	}
++
++	ret = of_property_read_string(ssi_np, "fsl,mode", &ssi_mode_str);
++	if (ret) {
++		dev_err(&pdev->dev, "failed to get \"fsl,mode\" value\n");
++		ret = -EINVAL;
++		goto fail;
++	}
++
++	ssi_mode = strcmp(ssi_mode_str, "i2s-master");
++
++	if (ssi_mode) {
++		/* Master Mode */
++		imx_audmux_config_mst_mode(src_port, ext_port);
++		wm8731_mst_mode_init(data);
++		data->clock_enable = wm8731_mst_mode_clock_enable;
++		imx_hifi_ops.hw_params = imx_hifi_hw_params_mst_mode;
++		imx_hifi_ops.startup = imx_hifi_startup_mst_mode;
++	} else {
++		/* Slave Mode */
++		imx_audmux_config_slv_mode(src_port, ext_port);
++		wm8731_slv_mode_init(data);
++		data->clock_enable = wm8731_slv_mode_clock_enable;
++		imx_hifi_ops.hw_params = imx_hifi_hw_params_slv_mode;
++		imx_hifi_ops.startup = imx_hifi_startup_slv_mode;
++	}
++	
++	data->card.dev = &pdev->dev;
++	ret = snd_soc_of_parse_card_name(&data->card, "model");
++	if (ret)
++		goto fail;
++	
++	ret = snd_soc_of_parse_audio_routing(&data->card, "audio-routing");
++	if (ret)
++		goto fail;
++
++	data->card.num_links = 1;
++	data->card.dai_link = &data->dai;
++
++	data->card.dapm_widgets = imx_dapm_widgets;
++	data->card.num_dapm_widgets = ARRAY_SIZE(imx_dapm_widgets);
++
++	platform_set_drvdata(pdev, &data->card);
++	snd_soc_card_set_drvdata(&data->card, data);
++
++	ret = snd_soc_register_card(&data->card);
++	if (ret) {
++		dev_err(&pdev->dev, "snd_soc_register_card failed (%d)\n", ret);
++		goto fail;
++	}
++	
++	return 0;
++
++fail:
++
++	if (ssi_np)
++		of_node_put(ssi_np);
++
++	if (codec_np)
++		of_node_put(codec_np);
++
++	return ret;
++}
++
++static int imx_wm8731_remove(struct platform_device *pdev)
++{
++	struct snd_soc_card *card = platform_get_drvdata(pdev);
++	snd_soc_unregister_card(card);
++
++	return 0;
++}
++
++static const struct of_device_id imx_wm8731_dt_ids[] = {
++	{ .compatible = "fsl,imx-audio-wm8731", },
++	{ /* sentinel */ }
++};
++MODULE_DEVICE_TABLE(of, imx_wm8731_dt_ids);
++
++static struct platform_driver imx_wm8731_driver = {
++	.driver = {
++		.name = "imx-wm8731",
++		.owner = THIS_MODULE,
++		.of_match_table = imx_wm8731_dt_ids,
++	},
++	.probe = imx_wm8731_probe,
++	.remove = imx_wm8731_remove,
++};
++module_platform_driver(imx_wm8731_driver);
++
++MODULE_AUTHOR("Freescale Semiconductor, Inc.");
++MODULE_DESCRIPTION("Freescale i.MX WM8731 ASoC machine driver");
++MODULE_LICENSE("GPL v2");
++MODULE_ALIAS("platform:imx-wm8731");
diff --git a/recipes-kernel/linux/linux-cm-fx6-3.10.17/defconfig b/recipes-kernel/linux/linux-cm-fx6-3.10.17/defconfig
new file mode 120000
index 0000000..5f3af20
--- /dev/null
+++ b/recipes-kernel/linux/linux-cm-fx6-3.10.17/defconfig
@@ -0,0 +1 @@
+cm_fx6_defconfig
\ No newline at end of file
diff --git a/recipes-kernel/linux/linux-cm-fx6_3.10.17.bb b/recipes-kernel/linux/linux-cm-fx6_3.10.17.bb
new file mode 100644
index 0000000..2b96b94
--- /dev/null
+++ b/recipes-kernel/linux/linux-cm-fx6_3.10.17.bb
@@ -0,0 +1,20 @@
+require recipes-kernel/linux/linux-imx.inc
+require recipes-kernel/linux/linux-dtb.inc
+
+SUMMARY = "CompuLab 3.10.17 kernel"
+DESCRIPTION = "Linux kernel for CompuLab cm-fx6 boards \
+	with full support for the i.MX6 features."
+
+DEPENDS += "lzop-native bc-native"
+
+# back to -1.0.0_ga branch for all patch release
+SRCBRANCH = "imx_3.10.17_1.0.0_ga"
+SRCREV = "33597e348b2d60dd5c71890ef7b7d3d3fd6e4e97"
+LOCALVERSION = "-1.0.2_ga_cl"
+
+SRC_URI += "file://cm_fx6_kernel.patch \
+            file://cm_fx6_defconfig \
+"
+
+COMPATIBLE_MACHINE = "(mx6)"
+COMPATIBLE_MACHINE = "(cm-fx6|sbc-fx6|sbc-fx6m)"
-- 
1.7.9.5