[linux-yocto] [PATCH 14/22] valleyisland-io: i2c: preset values for HCNT, LCNT and SDA

[boon.leong.ong at intel.com]

From: Ong Boon Leong <boon.leong.ong at intel.com>

Instead of always depending on formula to calculate the HCNT and LCNT set
the HCNT, LCNT and SDA if the target values are known beforehand.

Signed-off-by: Ong Boon Leong <boon.leong.ong at intel.com>
---
 ...are-pcidrv-Option-to-set-custom-HCNT-LCNT.patch |  139 ++++++++++++++++++++
 1 file changed, 139 insertions(+)
 create mode 100644 meta/cfg/kernel-cache/features/valleyisland-io/0012-i2c-designware-pcidrv-Option-to-set-custom-HCNT-LCNT.patch

diff --git a/meta/cfg/kernel-cache/features/valleyisland-io/0012-i2c-designware-pcidrv-Option-to-set-custom-HCNT-LCNT.patch b/meta/cfg/kernel-cache/features/valleyisland-io/0012-i2c-designware-pcidrv-Option-to-set-custom-HCNT-LCNT.patch
new file mode 100644
index 0000000..0f23a9a
--- /dev/null
+++ b/meta/cfg/kernel-cache/features/valleyisland-io/0012-i2c-designware-pcidrv-Option-to-set-custom-HCNT-LCNT.patch
@@ -0,0 +1,139 @@
+From b5dc166a782c9dae8425a9b4c74531abcfe01165 Mon Sep 17 00:00:00 2001
+From: Ong Boon Leong <boon.leong.ong at intel.com>
+Date: Thu, 23 Jan 2014 00:27:12 +0800
+Subject: [PATCH] i2c: designware-pcidrv: Option to set custom HCNT, LCNT and
+ SDA value
+
+Provide option to set the HCNT, LCNT and SDA if the target values are known
+ahead. Instead of depends on formula to calculate the HCNT and LCNT.
+
+Signed-off-by: Ong Boon Leong <boon.leong.ong at intel.com>
+---
+ drivers/i2c/busses/i2c-designware-pcidrv.c |   54 ++++++++++++++++++++++++++++
+ 1 file changed, 54 insertions(+)
+
+diff --git a/drivers/i2c/busses/i2c-designware-pcidrv.c b/drivers/i2c/busses/i2c-designware-pcidrv.c
+index ca89927..754deb9 100644
+--- a/drivers/i2c/busses/i2c-designware-pcidrv.c
++++ b/drivers/i2c/busses/i2c-designware-pcidrv.c
+@@ -71,6 +71,12 @@ struct dw_pci_controller {
+ 	u32 rx_fifo_depth;
+ 	u32 clk_khz;
+ 	u32 functionality;
++	u32 ss_hcnt;
++	u32 ss_lcnt;
++	u32 fs_hcnt;
++	u32 fs_lcnt;
++	u32 ss_sda;
++	u32 fs_sda;
+ };
+ 
+ #define INTEL_MID_STD_CFG  (DW_IC_CON_MASTER |			\
+@@ -159,6 +165,12 @@ static struct  dw_pci_controller  dw_pci_controllers[] = {
+ 		.rx_fifo_depth = 32,
+ 		.clk_khz      = 100000,
+ 		.functionality = I2C_FUNC_10BIT_ADDR,
++		.ss_hcnt        = 0x200,
++		.ss_lcnt        = 0x200,
++		.fs_hcnt        = 0x55,
++		.fs_lcnt        = 0x99,
++		.ss_sda         = 0x6,
++		.fs_sda         = 0x6,
+ 	},
+ 	[byt_1] = {
+ 		.bus_num     = 1,
+@@ -167,6 +179,12 @@ static struct  dw_pci_controller  dw_pci_controllers[] = {
+ 		.rx_fifo_depth = 32,
+ 		.clk_khz      = 100000,
+ 		.functionality = I2C_FUNC_10BIT_ADDR,
++		.ss_hcnt        = 0x200,
++		.ss_lcnt        = 0x200,
++		.fs_hcnt        = 0x55,
++		.fs_lcnt        = 0x99,
++		.ss_sda         = 0x6,
++		.fs_sda         = 0x6,
+ 	},
+ 	[byt_2] = {
+ 		.bus_num     = 2,
+@@ -175,6 +193,12 @@ static struct  dw_pci_controller  dw_pci_controllers[] = {
+ 		.rx_fifo_depth = 32,
+ 		.clk_khz      = 100000,
+ 		.functionality = I2C_FUNC_10BIT_ADDR,
++		.ss_hcnt        = 0x200,
++		.ss_lcnt        = 0x200,
++		.fs_hcnt        = 0x55,
++		.fs_lcnt        = 0x99,
++		.ss_sda         = 0x6,
++		.fs_sda         = 0x6,
+ 	},
+ 	[byt_3] = {
+ 		.bus_num     = 3,
+@@ -183,6 +207,12 @@ static struct  dw_pci_controller  dw_pci_controllers[] = {
+ 		.rx_fifo_depth = 32,
+ 		.clk_khz      = 100000,
+ 		.functionality = I2C_FUNC_10BIT_ADDR,
++		.ss_hcnt        = 0x200,
++		.ss_lcnt        = 0x200,
++		.fs_hcnt        = 0x55,
++		.fs_lcnt        = 0x99,
++		.ss_sda         = 0x6,
++		.fs_sda         = 0x6,
+ 	},
+ 	[byt_4] = {
+ 		.bus_num     = 4,
+@@ -191,6 +221,12 @@ static struct  dw_pci_controller  dw_pci_controllers[] = {
+ 		.rx_fifo_depth = 32,
+ 		.clk_khz      = 100000,
+ 		.functionality = I2C_FUNC_10BIT_ADDR,
++		.ss_hcnt        = 0x200,
++		.ss_lcnt        = 0x200,
++		.fs_hcnt        = 0x55,
++		.fs_lcnt        = 0x99,
++		.ss_sda         = 0x6,
++		.fs_sda         = 0x6,
+ 	},
+ 	[byt_5] = {
+ 		.bus_num     = 5,
+@@ -199,6 +235,12 @@ static struct  dw_pci_controller  dw_pci_controllers[] = {
+ 		.rx_fifo_depth = 32,
+ 		.clk_khz      = 100000,
+ 		.functionality = I2C_FUNC_10BIT_ADDR,
++		.ss_hcnt        = 0x200,
++		.ss_lcnt        = 0x200,
++		.fs_hcnt        = 0x55,
++		.fs_lcnt        = 0x99,
++		.ss_sda         = 0x6,
++		.fs_sda         = 0x6,
+ 	},
+ 	[byt_6] = {
+ 		.bus_num     = 6,
+@@ -207,6 +249,12 @@ static struct  dw_pci_controller  dw_pci_controllers[] = {
+ 		.rx_fifo_depth = 32,
+ 		.clk_khz      = 100000,
+ 		.functionality = I2C_FUNC_10BIT_ADDR,
++		.ss_hcnt        = 0x200,
++		.ss_lcnt        = 0x200,
++		.fs_hcnt        = 0x55,
++		.fs_lcnt        = 0x99,
++		.ss_sda         = 0x6,
++		.fs_sda         = 0x6,
+ 	},
+ };
+ static struct i2c_algorithm i2c_dw_algo = {
+@@ -325,7 +373,13 @@ static int i2c_dw_pci_probe(struct pci_dev *pdev,
+ 	dev->dev = &pdev->dev;
+ 	dev->functionality = controller->functionality |
+ 				INTEL_DW_DEFAULT_FUNCTIONALITY;
++	dev->ss_hcnt = controller->ss_hcnt;
++	dev->ss_lcnt = controller->ss_lcnt;
++	dev->fs_hcnt = controller->fs_hcnt;
++	dev->fs_lcnt = controller->fs_lcnt;
+ 	dev->master_cfg =  controller->bus_cfg;
++	dev->sda_hold_time = (dev->master_cfg & DW_IC_CON_SPEED_FAST) ?
++				controller->fs_sda : controller->ss_sda;
+ 	pci_set_drvdata(pdev, dev);
+ 
+ 	dev->tx_fifo_depth = controller->tx_fifo_depth;
+-- 
+1.7.10.4
+
-- 
1.7.10.4