[linux-yocto] [PATCH 13/22] valleyisland-io: declare the 10-bit address support in I2C

boon.leong.ong at intel.com boon.leong.ong at intel.com
Wed Jan 29 10:41:38 PST 2014


From: Ong Boon Leong <boon.leong.ong at intel.com>

For Intel BayTrail, enable i2c-designware-pci host controller
to support 10-bit addressing mode functionality.

Signed-off-by: Ong Boon Leong <boon.leong.ong at intel.com>
---
 ...are-pcidrv-Add-10-bit-addressing-mode-fun.patch |  114 ++++++++++++++++++++
 1 file changed, 114 insertions(+)
 create mode 100644 meta/cfg/kernel-cache/features/valleyisland-io/0011-i2c-designware-pcidrv-Add-10-bit-addressing-mode-fun.patch

diff --git a/meta/cfg/kernel-cache/features/valleyisland-io/0011-i2c-designware-pcidrv-Add-10-bit-addressing-mode-fun.patch b/meta/cfg/kernel-cache/features/valleyisland-io/0011-i2c-designware-pcidrv-Add-10-bit-addressing-mode-fun.patch
new file mode 100644
index 0000000..57407b6
--- /dev/null
+++ b/meta/cfg/kernel-cache/features/valleyisland-io/0011-i2c-designware-pcidrv-Add-10-bit-addressing-mode-fun.patch
@@ -0,0 +1,114 @@
+From cf1b2ff82fe0bcd3350d8af68f0a670404d4060a Mon Sep 17 00:00:00 2001
+From: Ong Boon Leong <boon.leong.ong at intel.com>
+Date: Wed, 22 Jan 2014 23:04:31 +0800
+Subject: [PATCH] i2c: designware-pcidrv: Add 10-bit addressing mode
+ functionality
+
+For Intel BayTrail, enable I2C host controller to support 10-bit
+addressing mode functionality.
+
+Signed-off-by: Ong Boon Leong <boon.leong.ong at intel.com>
+---
+ drivers/i2c/busses/i2c-designware-pcidrv.c |   23 +++++++++++++++++------
+ 1 file changed, 17 insertions(+), 6 deletions(-)
+
+diff --git a/drivers/i2c/busses/i2c-designware-pcidrv.c b/drivers/i2c/busses/i2c-designware-pcidrv.c
+index afd8ae0..ca89927 100644
+--- a/drivers/i2c/busses/i2c-designware-pcidrv.c
++++ b/drivers/i2c/busses/i2c-designware-pcidrv.c
+@@ -70,6 +70,7 @@ struct dw_pci_controller {
+ 	u32 tx_fifo_depth;
+ 	u32 rx_fifo_depth;
+ 	u32 clk_khz;
++	u32 functionality;
+ };
+ 
+ #define INTEL_MID_STD_CFG  (DW_IC_CON_MASTER |			\
+@@ -80,6 +81,13 @@ struct dw_pci_controller {
+ 				DW_IC_CON_SLAVE_DISABLE |	\
+ 				DW_IC_CON_RESTART_EN)
+ 
++#define INTEL_DW_DEFAULT_FUNCTIONALITY (I2C_FUNC_I2C |			\
++					    I2C_FUNC_SMBUS_BYTE |	\
++					    I2C_FUNC_SMBUS_BYTE_DATA |	\
++					    I2C_FUNC_SMBUS_WORD_DATA |	\
++					    I2C_FUNC_SMBUS_I2C_BLOCK)
++
++
+ static struct  dw_pci_controller  dw_pci_controllers[] = {
+ 	[moorestown_0] = {
+ 		.bus_num     = 0,
+@@ -150,6 +158,7 @@ static struct  dw_pci_controller  dw_pci_controllers[] = {
+ 		.tx_fifo_depth = 32,
+ 		.rx_fifo_depth = 32,
+ 		.clk_khz      = 100000,
++		.functionality = I2C_FUNC_10BIT_ADDR,
+ 	},
+ 	[byt_1] = {
+ 		.bus_num     = 1,
+@@ -157,6 +166,7 @@ static struct  dw_pci_controller  dw_pci_controllers[] = {
+ 		.tx_fifo_depth = 32,
+ 		.rx_fifo_depth = 32,
+ 		.clk_khz      = 100000,
++		.functionality = I2C_FUNC_10BIT_ADDR,
+ 	},
+ 	[byt_2] = {
+ 		.bus_num     = 2,
+@@ -164,6 +174,7 @@ static struct  dw_pci_controller  dw_pci_controllers[] = {
+ 		.tx_fifo_depth = 32,
+ 		.rx_fifo_depth = 32,
+ 		.clk_khz      = 100000,
++		.functionality = I2C_FUNC_10BIT_ADDR,
+ 	},
+ 	[byt_3] = {
+ 		.bus_num     = 3,
+@@ -171,6 +182,7 @@ static struct  dw_pci_controller  dw_pci_controllers[] = {
+ 		.tx_fifo_depth = 32,
+ 		.rx_fifo_depth = 32,
+ 		.clk_khz      = 100000,
++		.functionality = I2C_FUNC_10BIT_ADDR,
+ 	},
+ 	[byt_4] = {
+ 		.bus_num     = 4,
+@@ -178,6 +190,7 @@ static struct  dw_pci_controller  dw_pci_controllers[] = {
+ 		.tx_fifo_depth = 32,
+ 		.rx_fifo_depth = 32,
+ 		.clk_khz      = 100000,
++		.functionality = I2C_FUNC_10BIT_ADDR,
+ 	},
+ 	[byt_5] = {
+ 		.bus_num     = 5,
+@@ -185,6 +198,7 @@ static struct  dw_pci_controller  dw_pci_controllers[] = {
+ 		.tx_fifo_depth = 32,
+ 		.rx_fifo_depth = 32,
+ 		.clk_khz      = 100000,
++		.functionality = I2C_FUNC_10BIT_ADDR,
+ 	},
+ 	[byt_6] = {
+ 		.bus_num     = 6,
+@@ -192,6 +206,7 @@ static struct  dw_pci_controller  dw_pci_controllers[] = {
+ 		.tx_fifo_depth = 32,
+ 		.rx_fifo_depth = 32,
+ 		.clk_khz      = 100000,
++		.functionality = I2C_FUNC_10BIT_ADDR,
+ 	},
+ };
+ static struct i2c_algorithm i2c_dw_algo = {
+@@ -308,12 +323,8 @@ static int i2c_dw_pci_probe(struct pci_dev *pdev,
+ 	dev->get_clk_rate_khz = i2c_dw_get_clk_rate_khz;
+ 	dev->base = pcim_iomap_table(pdev)[0];
+ 	dev->dev = &pdev->dev;
+-	dev->functionality =
+-		I2C_FUNC_I2C |
+-		I2C_FUNC_SMBUS_BYTE |
+-		I2C_FUNC_SMBUS_BYTE_DATA |
+-		I2C_FUNC_SMBUS_WORD_DATA |
+-		I2C_FUNC_SMBUS_I2C_BLOCK;
++	dev->functionality = controller->functionality |
++				INTEL_DW_DEFAULT_FUNCTIONALITY;
+ 	dev->master_cfg =  controller->bus_cfg;
+ 	pci_set_drvdata(pdev, dev);
+ 
+-- 
+1.7.10.4
+
-- 
1.7.10.4



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