[yocto-ab] YP Advisory Board VOTE: Javier Garcia-Lasheras, YP Participant

[akuster]

Yes on behalf of MontaVista.

Armin

What happened to the on-line voting?

On 11/10/2014 05:01 PM, Jeffrey Osier-Mixon wrote:
> Javier Garcia-Lasheras is restructuring his consulting business around
> YP, but more than that, he is also issuing a YP layer supporting the
> open hardware repo at CERN called White Rabbit that provides ultra-high
> accuracy and precision in distributed systems. This system is used in
> CERN's Large Hadron Collider as well as at several other major
> scientific labs.
>
> Personally I think that spells AWESOME.
>
> Please vote yes/no for Javier as YP Participant.
>
> Javier himself: http://www.garcialasheras.com/
>
> White Rabbit layer: http://www.ohwr.org/projects/white-rabbit/wiki
>
> More info from Javi:
>
> Here you have the "meta-spec" layer, hosted on CERN's OHR repository:
> http://www.ohwr.org/projects/meta-spec/wiki
> <http://www.ohwr.org/projects/meta-spec/wiki>
>
> NOTE: I've requested to OpenEmbedded.org the inclusion of "meta-spec"
> into the public layer index. It's under revision right now.
>
> The meta-spec layer provides Simple PCIe FMC Carrier (SPEC) support to
> x86 and x86-64 machines. If you are curious about the work we are doing
> on Open Hardware at CERN, take a look to the included links -- White
> Rabbit & SPEC are important concepts ;-)
>
> The White Rabbit and the SPEC board are being used to synchronize the
> biggest experimental physics deployments, such as LHC, FAIR... so this
> layer is aimed to bring Yocto Project to the experimental physics
> community. Here you have the WhiteRabbit and SPEC user list:
> http://www.ohwr.org/projects/white-rabbit/wiki/WRUsers
> <http://www.ohwr.org/projects/white-rabbit/wiki/WRUsers>
>
> In addition, the SPEC carrier includes a reprogrammable FPGA. In this
> version, the bitstream binaries are handled as an already synthesized
> binary file. I'm currently working as the project manager for the CERN's
> HDLMake toolchain.
>
> HDLMake is a Python tool that CERN uses to perform automated synthesis
> and simulation from command line. Something similar to Yocto Project,
> but this case in the "gateware" reign (VHDL, Verilog...).
> http://www.ohwr.org/projects/hdl-make/wiki
> <http://www.ohwr.org/projects/hdl-make/wiki>
>
> I would like to include FPGA bitstream synthesis support in the
> meta-spec layer by using HDLMake. In this way, I believe this would be a
> nice experimental experience with the potential of providing new
> reconfigurable-hardware features to Yocto Project.
>
> The reason I believe the "Yocto Project Participant" consideration would
> be nice, It's because this would give more confidence to my Yocto
> Project usage proposal inside the OHR community... but let's see what
> happens!
>
> Best regards and thank you very much!
>
>
> ---------- Forwarded message ----------
> From:*Yocto Project*<webmaster at yoctoproject.org>
> Date: Tue, Nov 4, 2014 at 8:09 AM
> Subject: Advisory Board Ballot: Yocto Project Participant Registration
> To: jefro at jefro.net
>
>
> Submitted on Tuesday, November 4, 2014 - 08:09
> Submitted by anonymous user: [82.213.183.239]
> Submitted values are:
>
>     --Contact information--
>       Organization / project name: Garcia-Lasheras
>       Contact name: Javier D. Garcia Lasheras
>       Contact email address:javier at garcialasheras.com
> <mailto:javier at garcialasheras.com>
>       URL to organization or product link:
> http://www.garcialasheras.com <http://www.garcialasheras.com/>
>       Registration date: 2014-11-04
>       Compliance Agreement revision: 1.0
>
>
> Criteria:
>    - Visibly participating in the Yocto Project community. Please
> describeyour
> participation in the comments section below.: Yes
>    - Working towards and supporting the aims and objectives of the Yocto
> Project. These include decreasing the fragmentation of embedded
> ecosystem and
> focusing around a common shared set of tools, formats and best practices. We
> want to avoid multiple groups of people repeating the same work and have one
> set of great tools rather than multiple tools with drawbacks.: Yes
>    - Committed to promoting the OpenEmbedded architecture, layer model,
> andBSP
> format.: Yes
>    - Are all your publicly accessible layers listed in the OpenEmbedded
> Layers
> index (http://layers.openembedded.org
> <http://layers.openembedded.org/>)?: Yes
>    - Committed to sending to the open source community any patches to
> OpenEmbedded-Core, BitBake and other Yocto Project layers.: Yes
>    - Aiming for compatibility and interoperability among different metadata
> layers.: Yes
>    - Are a non-profit, small business (up to 80 employees), or existing
> Yocto
> Project member organization, or if the project's parent organization is an
> open-source project.: Yes
> Explanation:
> I'm an independent consultant focused on embedded systems and a passionate
> Open Science advocate. My skills and services mostly involve embedded
> linux +
> FPGA enabled coprocessor.
> I've pushed Yocto in the local market by spreading the word and providing
> support services.
> In addition, I'm currently working on a set of Yocto layers targeted to
> support White Rabbit protocol enabled platforms inside the CERN's Open
> Hardware Repository initiative.
> http://www.ohwr.org/projects/white-rabbit/wiki
> <http://www.ohwr.org/projects/white-rabbit/wiki>
> Now, I would like to take the next step by officially becoming a Yocto
> Project participant and centering my services portfolio around the Yocto
> ecosystem.
>
>
>
> --
> Jeff Osier-Mixon @Intel
> Yocto Project Community Managerhttp://yoctoproject.org
> <http://yoctoproject.org/>
>
>