[meta-xilinx] 2nd ethernet port not detected

[Mike Looijmans]

On 18-05-15 20:41, Edward Wingate wrote:
> Linux detects eth1, but I get an error "unable to generate target
> frequency: 2500000 Hz" when trying to use eth1:
> [    1.802333] libphy: MACB_mii_bus: probed
> [    1.809374] macb e000b000.ps7-ethernet eth0: Cadence GEM at
> 0xe000b000 irq 54 (00:0a:35:00:01:22)
> [    1.818257] macb e000b000.ps7-ethernet eth0: attached PHY driver
> [Marvell 88E1510] (mii_bus:phy_addr=e000b000.ps7-eth:00, irq=-1)
> [    1.831091] libphy: MACB_mii_bus: probed
> [    1.914646] macb e000c000.ps7-ethernet eth1: Cadence GEM at
> 0xe000c000 irq 77 (00:0a:35:00:00:01)
> [    1.923443] macb e000c000.ps7-ethernet eth1: attached PHY driver
> [Generic PHY] (mii_bus:phy_addr=e000c000.ps7-eth:08, irq=-1)
> [    5.914664] macb e000c000.ps7-ethernet eth1: unable to generate
> target frequency: 2500000 Hz
> [    8.804755] macb e000b000.ps7-ethernet eth0: link up (1000/Full)
>
> This is the device tree for the ethernet ports (It is a combination of
> the zedboard's device tree and the device tree Mike pointed me to):
>
> ps7_ethernet_0: ps7-ethernet at e000b000 {
>      phy-handle = <&phy0>;
>      phy-mode = "rgmii-id";
>      phy0: phy at 0 {
>          compatible = "marvell,88e1518";
>          device_type = "ethernet-phy";
>          reg = <0>;
>      } ;
> } ;
> ps7_ethernet_1: ps7-ethernet at e000c000 {
>      status = "okay";
>      phy-mode = "gmii";  /* I also tried "rgmii-id" here, but didn't
> work either */

It should be "gmii" or "gmii-id", since it's the MII bus you're connecting to 
from PL.

>      phy-handle = <&phy1>;
>      gmii2rgmii-phy-handle = <&phy_fpga>;
>      phy1: phy at 3 {
>          compatible = "marvell,88e1518";
>          device_type = "ethernet-phy";
>          reg = <0x3>;
>      } ;
>      phy_fpga: phy at 8 {
>          /* Internal GMII to RGMII adapter PHY */
>          reg = <0x8>;
>      } ;
> } ;
>
> I understand the PHY address of 0 is for broadcast, but from what I
> understand of the custom Zynq board I am using, each PHY is on its own
> bus, so it shouldn't matter in this case that I'm using the broadcast
> address (at least for my purposes at the moment).

The internal PL PHY is on the same MDIO bus as the external one.
The eth0 and eth1 phys are on different busses.

> For ethernet_1, the Internal GMII to RGMII adapter (phy_fpga) does
> have a PHY address of 8.  But for phy1 (arbitrarily set to 3), does it
> need to match a hardware value?  Or is it set here just for Linux to
> use?

It has to be unique and has to match the hardware setting. Most PHYs have 
pull-up resistors that set the address during power-on-reset.

> Mike, the config you provided has these lines for phy1:
>      interrupt-parent = <&gpio>;
>      interrupts = <65 0x8>; /* GPIO 65 (EMIO 11), IRQ_TYPE_LEVEL_LOW */
>
> I left these out because I wasn't sure if these specific to your
> hardware, or if they're generally used with the GMII to RGMII adapter.

The interrupt line allows the PHY to signal the system that e.g. the cable has 
been removed, so that the driver doesn't have to poll the hardware. A nice to 
have thingy, but it's optional. So if there's no IRQ attached, don't specify this.

> The only gpio related entry in the device tree is this (unchanged from
> the Zedboard device tree):
>      ps7_gpio_0: ps7-gpio at e000a000 {
>          gpio-mask-high = <0xc0000>;
>          gpio-mask-low = <0xfe81>;
>      } ;
>
> Is the "unable to generate target frequency" error because of a
> misconfiguration in my device tree?

That I don't know...

It suggests that the GEM input clock isn't properly sourced, but a.f.a.i.k. 
both GEMs get the same input clock, so they should either both work or not.



Kind regards,

Mike Looijmans
System Expert

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