[meta-intel] GPIO functionality for Intel E3845 CPU (valley-island, bay-trail)

Wed Oct 24 01:36:38 PDT 2018

Please follow below procedure to customize DSDT into the kernel.

1.       cat /sys/firmware/acpi/tables/DSDT > DSDT.dat

2.       iasl DSDT.dat (DSDT.dsl is being generated)

3.       Make your changes by editing DSDT.dsl file.

4.       Build it with the command: iasl -tc DSDT.dsl

5.       Put it where the kernel build can include it with the command: cp DSDT.hex $SRC/include/

6.       Add this to the kernel .config

·         CONFIG_STANDALONE=n

·         CONFIG_ACPI_CUSTOM_DSDT=y

·         CONFIG_ACPI_CUSTOM_DSDT_FILE="DSDT.hex"

7.       Make the kernel.

Thanks,
Juinee

From: Henrik Haugaard Jensen [mailto:hhj at trackman.com]
Sent: Friday, October 19, 2018 3:14 PM
To: Tan, Jui Nee <jui.nee.tan at intel.com>; meta-intel at yoctoproject.org
Subject: RE: [meta-intel] GPIO functionality for Intel E3845 CPU (valley-island, bay-trail)

Yes, I did however only build the linux-intel kernel, using:
BBLAYERS ?= " \
  ${TOPDIR}/../poky-rocko-18.0.3/meta \
  ${TOPDIR}/../poky-rocko-18.0.3/meta-poky \
  ${TOPDIR}/../poky-rocko-18.0.3/meta-yocto-bsp \
  ${TOPDIR}/../openembedded-core-rocko/meta \
  ${TOPDIR}/../meta-intel-8.1-rocko-2.4.2 \
  "
PREFERRED_PROVIDER_virtual/kernel = “linux-intel”
PREFERRED_VERSION_linux-intel = “4.14%”

Where exactly in meta-intel-8.1-rocko-2.4.2 does the Baytrail “customization” happen?
I assume that “ROCKO 2.4 – BAY TRAIL BSP” also relies on INT33B2 and INT33FC being present in ACPI DSDT table?

Can you suggest how to override the DSDT table with required ACPI entries?

Regards,
Henrik
From: Tan, Jui Nee <jui.nee.tan at intel.com<mailto:jui.nee.tan at intel.com>>
Sent: Friday, 19 October 2018 08.16
To: Henrik Haugaard Jensen <hhj at trackman.com<mailto:hhj at trackman.com>>; meta-intel at yoctoproject.org<mailto:meta-intel at yoctoproject.org>
Subject: RE: [meta-intel] GPIO functionality for Intel E3845 CPU (valley-island, bay-trail)

Yes, you might need to override the DSDT table with required ACPI entries.
When you mentioned that you have tried using “ROCKO 2.4 – BAY TRAIL BSP”, did you follow the build steps in the release note: https://www.yoctoproject.org/software-overview/layers/bsps/rocko-24-bay-trail-valley-island/?

Thanks,
Juinee

From: Henrik Haugaard Jensen [mailto:hhj at trackman.com]
Sent: Thursday, October 18, 2018 7:10 PM
To: Tan, Jui Nee <jui.nee.tan at intel.com<mailto:jui.nee.tan at intel.com>>; meta-intel at yoctoproject.org<mailto:meta-intel at yoctoproject.org>
Subject: RE: [meta-intel] GPIO functionality for Intel E3845 CPU (valley-island, bay-trail)

I did:
acpidump > acpi.dat
acpixtract.pmtools -sDSDT acpi.dat
cat DSDT | grep INT33
and got:
INT33BDHID
INT33BD

..so I guess the BIOS is to blame - we use a LEC-BT SMARC module from ADLINK.
I tried to look around in the BIOS but could not find any “pinctrl” options. We did not have this problem using the Jethro branch with this BIOS.

Can I “fake” the required ACPI ID’s by patching the ACPI/pinctrl drivers?

Regards,
Henrik

From: Tan, Jui Nee <jui.nee.tan at intel.com<mailto:jui.nee.tan at intel.com>>
Sent: Thursday, 18 October 2018 11.41
To: Henrik Haugaard Jensen <hhj at trackman.com<mailto:hhj at trackman.com>>; meta-intel at yoctoproject.org<mailto:meta-intel at yoctoproject.org>
Subject: RE: [meta-intel] GPIO functionality for Intel E3845 CPU (valley-island, bay-trail)

Could you please try to dump ACPI DSDT table and check if the following strings exist:
-          INT33B2
-          INT33FC

These are the ACPI ID required to load BYT pinctrl driver.

Thanks,
Juinee

From: Henrik Haugaard Jensen [mailto:hhj at trackman.com]
Sent: Wednesday, October 17, 2018 7:04 PM
To: Tan, Jui Nee <jui.nee.tan at intel.com<mailto:jui.nee.tan at intel.com>>; meta-intel at yoctoproject.org<mailto:meta-intel at yoctoproject.org>
Subject: RE: [meta-intel] GPIO functionality for Intel E3845 CPU (valley-island, bay-trail)

Thanks,
I tried the PINCTRL configs, but /sys/class/gpio/ and /sys/kernel/debug/gpio does still not get populated.

A bit of printk debugging show that ”byt_gpio_init” is called but “byt_pinctrl_probe” is not.

Any ideas?

Regards,
Henrik

From: Tan, Jui Nee <jui.nee.tan at intel.com<mailto:jui.nee.tan at intel.com>>
Sent: Wednesday, 17 October 2018 03.11
To: Henrik Haugaard Jensen <hhj at trackman.com<mailto:hhj at trackman.com>>; meta-intel at yoctoproject.org<mailto:meta-intel at yoctoproject.org>
Subject: RE: [meta-intel] GPIO functionality for Intel E3845 CPU (valley-island, bay-trail)

You should be able to see the gpiochips available in /sys/class/gpio/gpiochip* and “byt_gpio_init” is also being called with the following kernel configurations enabled:

CONFIG_PINCTRL=y
CONFIG_PINCTRL_BAYTRAIL=y
CONFIG_PINCTRL_INTEL=y

Thanks,
Juinee

From: meta-intel-bounces at yoctoproject.org<mailto:meta-intel-bounces at yoctoproject.org> [mailto:meta-intel-bounces at yoctoproject.org] On Behalf Of Henrik Haugaard Jensen
Sent: Wednesday, October 10, 2018 10:28 PM
To: meta-intel at yoctoproject.org<mailto:meta-intel at yoctoproject.org>
Subject: [meta-intel] GPIO functionality for Intel E3845 CPU (valley-island, bay-trail)

We have successfully used meta-intel jethro branch for our device based on an intel E3845 CPU.

Now we need to upgrade to a newer Linux kernel to get full camera/video/media support. But when building new BSP with sumo or rocko branches it turn out that pinctrl/GPIO system is not working neither with linux-intel 4.9 or 4.14.

Baytrail pin-controller support and GPIO support seems to be configured for the kernel out of the box, but after booting “/sys/kernel/debug/gpio” is empty and the pin-controller gpio-chip’s is not showing in “/sys/class/gpio”.

Doing initcall debugging shows that “bxt_pinctrl_init” (Broxton ) is called and not “byt_gpio_init” (Baytrail) - I have tried, but not been able, to find out why.

I have tried both vanilla meta-intel sumo BSP and  “ROCKO 2.4 – BAY TRAIL BSP” (meta-intel branch 8.1-rocko-2.4.2) – what is going wrong?

Also I have the impression that since linux 4.8 the “/sys/class/gpio” user interface is obsolete and apparently replaced by /dev/gpioxxx pin devices and a new gpiolib userspace tool for this has been provided. Has this new GPIO interface made its way into meta-intel?

Regards,
Henrik Haugaard Jensen
TrackMan

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