[meta-freescale] [PATCH 04/10] p2041rdb: add machine config

[Chunrong Guo]

Signed-off-by: Chunrong Guo <chunrong.guo at nxp.com>
---
 conf/machine/p2041rdb.conf | 28 ++++++++++++++++++++++++++++
 1 file changed, 28 insertions(+)
 create mode 100644 conf/machine/p2041rdb.conf

diff --git a/conf/machine/p2041rdb.conf b/conf/machine/p2041rdb.conf
new file mode 100644
index 0000000..9a795fe
--- /dev/null
+++ b/conf/machine/p2041rdb.conf
@@ -0,0 +1,28 @@
+#@TYPE: Machine
+#@NAME: NXP P2041RDB
+#@SOC: p2041
+#@DESCRIPTION: Machine configuration for NXP QorIQ P2041 Reference
+#              Design Board, rev2 silicon with ppce500mc core
+#@MAINTAINER: Chunrong Guo <chunrong.guo at nxp.com>
+
+require conf/machine/include/e500mc.inc
+
+SOC_FAMILY = "p2041"
+
+UBOOT_CONFIG ??= "nand secure-boot sdcard spi nor"
+UBOOT_CONFIG[nor] = "P2041RDB_config"
+UBOOT_CONFIG[nand] = "P2041RDB_NAND_config,,u-boot.pbl"
+UBOOT_CONFIG[secure-boot] = "P2041RDB_SECURE_BOOT_config"
+UBOOT_CONFIG[sdcard] = "P2041RDB_SDCARD_config,,u-boot.pbl"
+UBOOT_CONFIG[spi] = "P2041RDB_SPIFLASH_config,,u-boot.pbl"
+
+HV_CFG_M = "p2041rdb"
+
+KERNEL_DEVICETREE ?= "p2041rdb.dtb"
+KERNEL_DEFCONFIG ?= "corenet32_smp_defconfig"
+
+JFFS2_ERASEBLOCK = "0x10000"
+
+EXTRA_IMAGEDEPENDS += "fm-ucode rcw"
+
+USE_VT ?= "0"
-- 
1.9.0