[meta-freescale] [3rdparty][PATCH] linux-advantech: Bump kernel version to 4.9.x
Ken Lin
yungching0725 at gmail.com
Sun Jun 3 21:33:33 PDT 2018
Add support for DMS-BA16 board
Signed-off-by: Ken Lin <yungching0725 at gmail.com>
---
...-support-for-the-Advantech-DMS-BA16-Board.patch | 836 +++++++++++++++++++++
...0002-mfd-da9063-Add-wakeup-source-support.patch | 28 +
...a-PMIC-qurk-to-support-system-suspend-res.patch | 223 ++++++
recipes-kernel/linux/linux-advantech-4.9/defconfig | 398 ++++++++++
recipes-kernel/linux/linux-advantech_4.9.bb | 20 +
5 files changed, 1505 insertions(+)
create mode 100644 recipes-kernel/linux/linux-advantech-4.9/0001-Add-support-for-the-Advantech-DMS-BA16-Board.patch
create mode 100644 recipes-kernel/linux/linux-advantech-4.9/0002-mfd-da9063-Add-wakeup-source-support.patch
create mode 100644 recipes-kernel/linux/linux-advantech-4.9/0003-da9063-Add-a-PMIC-qurk-to-support-system-suspend-res.patch
create mode 100644 recipes-kernel/linux/linux-advantech-4.9/defconfig
create mode 100644 recipes-kernel/linux/linux-advantech_4.9.bb
diff --git a/recipes-kernel/linux/linux-advantech-4.9/0001-Add-support-for-the-Advantech-DMS-BA16-Board.patch b/recipes-kernel/linux/linux-advantech-4.9/0001-Add-support-for-the-Advantech-DMS-BA16-Board.patch
new file mode 100644
index 0000000..fb850c3
--- /dev/null
+++ b/recipes-kernel/linux/linux-advantech-4.9/0001-Add-support-for-the-Advantech-DMS-BA16-Board.patch
@@ -0,0 +1,836 @@
+From 715d21106a8a633095c09a8b1d888d9f5b4c58da Mon Sep 17 00:00:00 2001
+From: Ken Lin <yungching0725 at gmail.com>
+Date: Sat, 26 May 2018 07:46:01 +0800
+Subject: [PATCH] Add support for the Advantech DMS-BA16 Board
+
+Signed-off-by: Ken Lin <yungching0725 at gmail.com>
+---
+ arch/arm/boot/dts/imx6q-dms-ba16.dts | 816 +++++++++++++++++++++++++++++++++++
+ 1 file changed, 816 insertions(+)
+ create mode 100755 arch/arm/boot/dts/imx6q-dms-ba16.dts
+
+diff --git a/arch/arm/boot/dts/imx6q-dms-ba16.dts b/arch/arm/boot/dts/imx6q-dms-ba16.dts
+new file mode 100755
+index 000000000000..0b0350ba8011
+--- /dev/null
++++ b/arch/arm/boot/dts/imx6q-dms-ba16.dts
+@@ -0,0 +1,816 @@
++/*
++ * Copyright 2017 Timesys Corporation
++ * Copyright 2017 Advantech Corporation
++ *
++ * The code contained herein is licensed under the GNU General Public
++ * License. You may obtain a copy of the GNU General Public License
++ * Version 2 or later at the following locations:
++ *
++ * http://www.opensource.org/licenses/gpl-license.html
++ * http://www.gnu.org/copyleft/gpl.html
++ */
++
++/dts-v1/;
++
++#include <dt-bindings/gpio/gpio.h>
++#include "imx6q.dtsi"
++
++/ {
++ model = "Advantech DMS-BA16";
++ compatible = "fsl,imx6q-dms-ba16", "fsl,imx6q";
++
++ aliases {
++ mxcfb0 = &mxcfb1;
++ mxcfb1 = &mxcfb2;
++ mmc0 = &usdhc2;
++ mmc1 = &usdhc3;
++ mmc2 = &usdhc4;
++ };
++
++ memory {
++ reg = <0x10000000 0x40000000>;
++ };
++
++ clocks {
++ clk24m: clk24m {
++ compatible = "fixed-clock";
++ #clock-cells = <0>;
++ clock-frequency = <24000000>;
++ };
++ };
++
++ regulators {
++ compatible = "simple-bus";
++
++ reg_usb_otg_vbus: usb_otg_vbus {
++ compatible = "regulator-fixed";
++ regulator-name = "usb_otg_vbus";
++ regulator-min-microvolt = <5000000>;
++ regulator-max-microvolt = <5000000>;
++ };
++
++ reg_usb_h1_vbus: usb_h1_vbus {
++ compatible = "regulator-fixed";
++ regulator-name = "usb_h1_vbus";
++ regulator-min-microvolt = <5000000>;
++ regulator-max-microvolt = <5000000>;
++ };
++
++ reg_1p8v: 1p8v {
++ compatible = "regulator-fixed";
++ regulator-name = "1P8V";
++ regulator-min-microvolt = <1800000>;
++ regulator-max-microvolt = <1800000>;
++ regulator-always-on;
++ };
++
++ reg_3p3v: 3p3v {
++ compatible = "regulator-fixed";
++ regulator-name = "3P3V";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ regulator-always-on;
++ };
++
++ reg_lvds: regulator-lvds {
++ compatible = "regulator-fixed";
++ regulator-name = "lvds_ppen";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ regulator-boot-on;
++ gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
++ enable-active-high;
++ };
++ };
++
++ sound {
++ compatible = "fsl,imx6q-ba16-sgtl5000",
++ "fsl,imx-audio-sgtl5000";
++ model = "imx6q-ba16-sgtl5000";
++ ssi-controller = <&ssi1>;
++ audio-codec = <&codec>;
++ audio-routing =
++ "MIC_IN", "Mic Jack",
++ "Mic Jack", "Mic Bias",
++ "Headphone Jack", "HP_OUT";
++ mux-int-port = <1>;
++ mux-ext-port = <4>;
++ };
++
++ sound-hdmi {
++ compatible = "fsl,imx6q-audio-hdmi",
++ "fsl,imx-audio-hdmi"; model = "imx-audio-hdmi";
++ hdmi-controller = <&hdmi_audio>;
++ };
++
++ mxcfb1: fb at 0 {
++ compatible = "fsl,mxc_sdc_fb";
++ disp_dev = "ldb";
++ interface_pix_fmt = "RGB24";
++ default_bpp = <32>;
++ int_clk = <0>;
++ late_init = <0>;
++ status = "okay";
++ };
++
++ mxcfb2: fb at 1 {
++ compatible = "fsl,mxc_sdc_fb";
++ disp_dev = "hdmi";
++ interface_pix_fmt = "RGB24";
++ mode_str ="1920x1080M at 60";
++ default_bpp = <24>;
++ int_clk = <0>;
++ late_init = <0>;
++ status = "okay";
++ };
++
++ backlight {
++ compatible = "pwm-backlight";
++ pwms = <&pwm1 0 5000000>;
++ brightness-levels = < 0 1 2 3 4 5 6 7 8 9
++ 10 11 12 13 14 15 16 17 18 19
++ 20 21 22 23 24 25 26 27 28 29
++ 30 31 32 33 34 35 36 37 38 39
++ 40 41 42 43 44 45 46 47 48 49
++ 50 51 52 53 54 55 56 57 58 59
++ 60 61 62 63 64 65 66 67 68 69
++ 70 71 72 73 74 75 76 77 78 79
++ 80 81 82 83 84 85 86 87 88 89
++ 90 91 92 93 94 95 96 97 98 99
++ 100 101 102 103 104 105 106 107 108 109
++ 110 111 112 113 114 115 116 117 118 119
++ 120 121 122 123 124 125 126 127 128 129
++ 130 131 132 133 134 135 136 137 138 139
++ 140 141 142 143 144 145 146 147 148 149
++ 150 151 152 153 154 155 156 157 158 159
++ 160 161 162 163 164 165 166 167 168 169
++ 170 171 172 173 174 175 176 177 178 179
++ 180 181 182 183 184 185 186 187 188 189
++ 190 191 192 193 194 195 196 197 198 199
++ 200 201 202 203 204 205 206 207 208 209
++ 210 211 212 213 214 215 216 217 218 219
++ 220 221 222 223 224 225 226 227 228 229
++ 230 231 232 233 234 235 236 237 238 239
++ 240 241 242 243 244 245 246 247 248 249
++ 250 251 252 253 254 255>;
++ default-brightness-level = <255>;
++ power-supply = <®_lvds>;
++ enable-gpios = <&gpio1 0 GPIO_ACTIVE_HIGH>;
++ };
++
++ v4l2_out {
++ compatible = "fsl,mxc_v4l2_output";
++ status = "okay";
++ };
++};
++
++&audmux {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_audmux>;
++ status = "okay";
++};
++
++&clks {
++ fsl,ldb-di0-parent = <&clks IMX6QDL_CLK_PLL2_PFD0_352M>;
++ fsl,ldb-di1-parent = <&clks IMX6QDL_CLK_PLL2_PFD0_352M>;
++};
++
++&ecspi1 {
++ fsl,spi-num-chipselects = <1>;
++ cs-gpios = <&gpio2 30 0>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_ecspi1>;
++ status = "okay";
++
++ flash: n25q032 at 0 {
++ #address-cells = <1>;
++ #size-cells = <1>;
++ compatible = "st,n25q032";
++ spi-max-frequency = <20000000>;
++ reg = <0>;
++ partition at 0 {
++ label = "U-Boot";
++ reg = <0x0 0xC0000>;
++ };
++ partition at C0000 {
++ label = "env";
++ reg = <0xC0000 0x10000>;
++ };
++ partition at D0000 {
++ label = "spare";
++ reg = <0xD0000 0x130000>;
++ };
++ };
++};
++
++&ecspi5 {
++ fsl,spi-num-chipselects = <1>;
++ cs-gpios = <&gpio1 17 0>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_ecspi5>;
++ status = "okay";
++
++ m25_eeprom: m25p80 at 0 {
++ compatible = "atmel,at25";
++ spi-max-frequency = <20000000>;
++ size = <0x8000>;
++ pagesize = <64>;
++ reg = <0>;
++ address-width = <16>;
++ };
++};
++
++&fec {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_enet>;
++ phy-mode = "rgmii";
++ status = "okay";
++};
++
++&cpu0 {
++ arm-supply = <®_arm>;
++ soc-supply = <®_soc>;
++ pu-supply = <®_pu>;
++};
++
++&dcic1 {
++ dcic_id = <0>;
++ dcic_mux = "dcic-hdmi";
++ status = "okay";
++};
++
++&dcic2 {
++ dcic_id = <1>;
++ dcic_mux = "dcic-lvds1";
++ status = "okay";
++};
++
++
++&gpc {
++ fsl,cpu_pupscr_sw2iso = <0xf>;
++ fsl,cpu_pupscr_sw = <0xf>;
++ fsl,cpu_pdnscr_iso2sw = <0x1>;
++ fsl,cpu_pdnscr_iso = <0x1>;
++ fsl,ldo-bypass = <0>;
++ fsl,wdog-reset = <1>; /* watchdog select of reset source */
++ pu-supply = <®_pu>;
++};
++
++&hdmi_audio {
++ status = "okay";
++};
++
++
++&hdmi_cec {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_hdmi_cec>;
++ status = "disabled";
++};
++
++
++&hdmi_core {
++ ipu_id = <1>;
++ disp_id = <0>;
++ status = "okay";
++};
++
++&hdmi_video {
++ fsl,phy_reg_vlev = <0x01ad>;
++ fsl,phy_reg_cksymtx = <0x800d>;
++ status = "okay";
++};
++
++&i2c1 {
++ clock-frequency = <100000>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_i2c1>;
++ status = "okay";
++
++ codec: sgtl5000 at 0a {
++ compatible = "fsl,sgtl5000";
++ reg = <0x0a>;
++ clocks = <&clks 201>;
++ VDDA-supply = <®_1p8v>;
++ VDDIO-supply = <®_3p3v>;
++ };
++};
++
++&i2c2 {
++ clock-frequency = <100000>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_i2c2>;
++ status = "okay";
++
++
++ hdmi_edid: edid at 50 {
++ compatible = "fsl,imx6-hdmi-i2c";
++ reg = <0x50>;
++ };
++
++};
++
++&i2c3 {
++ clock-frequency = <100000>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_i2c3>;
++ status = "okay";
++
++ pmic at 58 {
++ compatible = "dialog,da9063";
++ reg = <0x58>;
++ interrupt-parent = <&gpio7>;
++ interrupts = <13 IRQ_TYPE_LEVEL_LOW>; /* active-low GPIO7_13 */
++
++ onkey {
++ compatible = "dlg,da9063-onkey";
++ };
++
++ regulators {
++ bcore1 {
++ regulator-min-microvolt = <1420000>;
++ regulator-max-microvolt = <1420000>;
++ regulator-always-on;
++ regulator-boot-on;
++ };
++
++ bcore2 {
++ regulator-min-microvolt = <1420000>;
++ regulator-max-microvolt = <1420000>;
++ regulator-always-on;
++ regulator-boot-on;
++ };
++
++ bpro {
++ regulator-min-microvolt = <1500000>;
++ regulator-max-microvolt = <1500000>;
++ regulator-always-on;
++ regulator-boot-on;
++ };
++
++ bmem {
++ regulator-min-microvolt = <1800000>;
++ regulator-max-microvolt = <1800000>;
++ regulator-always-on;
++ regulator-boot-on;
++ };
++
++ bio: bio {
++ regulator-min-microvolt = <1800000>;
++ regulator-max-microvolt = <1800000>;
++ regulator-always-on;
++ regulator-boot-on;
++ };
++
++ bperi: bperi {
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ regulator-always-on;
++ regulator-boot-on;
++ };
++
++ ldo1 {
++ regulator-min-microvolt = <600000>;
++ regulator-max-microvolt = <1860000>;
++ };
++
++ ldo2 {
++ regulator-min-microvolt = <600000>;
++ regulator-max-microvolt = <1860000>;
++ };
++
++ ldo3 {
++ regulator-min-microvolt = <900000>;
++ regulator-max-microvolt = <3440000>;
++ };
++
++ ldo4 {
++ regulator-min-microvolt = <900000>;
++ regulator-max-microvolt = <3440000>;
++ };
++
++ ldo5 {
++ regulator-min-microvolt = <900000>;
++ regulator-max-microvolt = <3600000>;
++ regulator-always-on;
++ regulator-boot-on;
++ };
++
++ ldo6 {
++ regulator-min-microvolt = <900000>;
++ regulator-max-microvolt = <3600000>;
++ regulator-always-on;
++ regulator-boot-on;
++ };
++
++ ldo7 {
++ regulator-min-microvolt = <900000>;
++ regulator-max-microvolt = <3600000>;
++ regulator-always-on;
++ regulator-boot-on;
++ };
++
++ ldo8 {
++ regulator-min-microvolt = <900000>;
++ regulator-max-microvolt = <3600000>;
++ regulator-always-on;
++ regulator-boot-on;
++ };
++
++ ldo9 {
++ regulator-min-microvolt = <950000>;
++ regulator-max-microvolt = <3600000>;
++ regulator-always-on;
++ regulator-boot-on;
++ };
++
++ ldo10 {
++ regulator-min-microvolt = <900000>;
++ regulator-max-microvolt = <3600000>;
++ regulator-always-on;
++ regulator-boot-on;
++ };
++
++ ldo11 {
++ regulator-min-microvolt = <900000>;
++ regulator-max-microvolt = <3600000>;
++ regulator-always-on;
++ regulator-boot-on;
++ };
++ };
++ };
++
++ rtc at 32 {
++ compatible = "epson,rx8010";
++ reg = <0x32>;
++ interrupt-parent = <&gpio4>;
++ interrupts = <10>;
++ rx8010-irq_1 = <&gpio4 10 0>;
++ };
++};
++
++&iomuxc {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_hog>;
++
++ hog {
++ pinctrl_hog: hoggrp-1 {
++ fsl,pins = <
++ MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x80000000 /* uSDHC2 CD */
++ MX6QDL_PAD_NANDF_CS0__GPIO6_IO11 0x80000000 /* uSDHC4 CD */
++ MX6QDL_PAD_NANDF_CS1__GPIO6_IO14 0x80000000 /* uSDHC4 SDIO PWR */
++ MX6QDL_PAD_NANDF_CS2__GPIO6_IO15 0x80000000 /* uSDHC4 SDIO WP */
++ MX6QDL_PAD_NANDF_CS3__GPIO6_IO16 0x80000000 /* uSDHC4 SDIO LED */
++ MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x80000000 /* SPI1 CS */
++ MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x80000000 /* FEC Reset */
++ MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x80000000 /* GPIO0 */
++ MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x80000000 /* GPIO1 */
++ MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x80000000 /* GPIO2 */
++ MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x80000000 /* GPIO3 */
++ MX6QDL_PAD_NANDF_D4__GPIO2_IO04 0x80000000 /* GPIO4 */
++ MX6QDL_PAD_NANDF_D5__GPIO2_IO05 0x80000000 /* GPIO5 */
++ MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x80000000 /* GPIO6 */
++ MX6QDL_PAD_NANDF_D7__GPIO2_IO07 0x80000000 /* GPIO7 */
++ MX6QDL_PAD_NANDF_CLE__GPIO6_IO07 0x80000000 /* CAM_PWDN */
++ MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x80000000 /* CAM_RST */
++ MX6QDL_PAD_GPIO_16__GPIO7_IO11 0x80000000 /* HUB_RESET */
++ MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x80000000 /* PMIC Interrupt */
++ MX6QDL_PAD_GPIO_19__GPIO4_IO05 0x80000000 /* AR8033 Interrupt */
++ MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x80000000 /* BLEN_OUT */
++ MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000 /* LVDS_PPEN_OUT */
++ MX6QDL_PAD_KEY_COL2__GPIO4_IO10 0x80000000 /* RTC_INT */
++ MX6QDL_PAD_KEY_ROW2__GPIO4_IO11 0x1b0b0 /*SUS_S3_OUT*/
++
++ >;
++ };
++ };
++
++ usdhc3 {
++ pinctrl_usdhc3_reset: usdhc3grp-reset {
++ fsl,pins = <
++ MX6QDL_PAD_SD3_RST__SD3_RESET 0x170F9
++ >;
++ };
++ };
++
++ audmux {
++ pinctrl_audmux: audmuxgrp {
++ fsl,pins = <
++ MX6QDL_PAD_DISP0_DAT20__AUD4_TXC 0x130b0
++ MX6QDL_PAD_DISP0_DAT21__AUD4_TXD 0x130b0
++ MX6QDL_PAD_DISP0_DAT22__AUD4_TXFS 0x130b0
++ MX6QDL_PAD_DISP0_DAT23__AUD4_RXD 0x130b0
++ >;
++ };
++ };
++
++ ecspi1 {
++ pinctrl_ecspi1: ecspi1grp {
++ fsl,pins = <
++ MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1
++ MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1
++ MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1
++ >;
++ };
++ };
++
++ ecspi5 {
++ pinctrl_ecspi5: ecspi5grp {
++ fsl,pins = <
++ MX6QDL_PAD_SD1_DAT0__ECSPI5_MISO 0x1b0b0
++ MX6QDL_PAD_SD1_CMD__ECSPI5_MOSI 0x1b0b0
++ MX6QDL_PAD_SD1_CLK__ECSPI5_SCLK 0x1b0b0
++ MX6QDL_PAD_SD1_DAT1__GPIO1_IO17 0x1b0b0
++ >;
++ };
++ };
++
++ hdmi_cec {
++ pinctrl_hdmi_cec: hdmicecgrp {
++ fsl,pins = <
++ MX6QDL_PAD_KEY_ROW2__HDMI_TX_CEC_LINE 0x1f8b0
++ >;
++ };
++ };
++
++ usbotg {
++ pinctrl_usbotg: usbotggrp {
++ fsl,pins = <
++ MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
++ >;
++ };
++ };
++
++ usdhc2 {
++ pinctrl_usdhc2: usdhc2grp {
++ fsl,pins = <
++ MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
++ MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059
++ MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
++ MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
++ MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
++ MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059
++ >;
++ };
++ };
++
++ usdhc3 {
++ pinctrl_usdhc3: usdhc3grp {
++ fsl,pins = <
++ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
++ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
++ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
++ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
++ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
++ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
++ MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059
++ MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059
++ MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059
++ MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059
++ >;
++ };
++ };
++
++ usdhc4 {
++ pinctrl_usdhc4: usdhc4grp {
++ fsl,pins = <
++ MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059
++ MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059
++ MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059
++ MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059
++ MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059
++ MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059
++ MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17059
++ MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17059
++ MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17059
++ MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17059
++ >;
++ };
++ };
++
++ i2c1 {
++ pinctrl_i2c1: i2c1grp {
++ fsl,pins = <
++ MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1
++ MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1
++ >;
++ };
++ };
++
++ i2c2 {
++ pinctrl_i2c2: i2c2grp {
++ fsl,pins = <
++ MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
++ MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
++ >;
++ };
++ };
++
++ i2c3 {
++ pinctrl_i2c3: i2c3grp {
++ fsl,pins = <
++ MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
++ MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
++ >;
++ };
++ };
++
++ pwm1 {
++ pinctrl_pwm1: pwm1grp {
++ fsl,pins = <
++ MX6QDL_PAD_SD1_DAT3__PWM1_OUT 0x1b0b1
++ >;
++ };
++ };
++
++ pwm2 {
++ pinctrl_pwm2: pwm2grp {
++ fsl,pins = <
++ MX6QDL_PAD_GPIO_1__PWM2_OUT 0x1b0b1
++ >;
++ };
++ };
++
++ enet {
++ pinctrl_enet: enetgrp {
++ fsl,pins = <
++ MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x100b0
++ MX6QDL_PAD_ENET_MDC__ENET_MDC 0x100b0
++ MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x100b0
++ MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x100b0
++ MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x100b0
++ MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x100b0
++ MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x100b0
++ MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x100b0
++ MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x100b0
++ MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
++ MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
++ MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
++ MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
++ MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
++ MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
++ >;
++ };
++ };
++
++ uart3 {
++ pinctrl_uart3: uart3grp {
++ fsl,pins = <
++ MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
++ MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
++ MX6QDL_PAD_EIM_D23__UART3_CTS_B 0x1b0b1
++ MX6QDL_PAD_EIM_D31__UART3_RTS_B 0x1b0b1
++ >;
++ };
++ };
++
++ uart4 {
++ pinctrl_uart4: uart4grp {
++ fsl,pins = <
++ MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
++ MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
++ >;
++ };
++ };
++ wdog {
++ pinctrl_wdog: wdoggrp {
++ fsl,pins = <
++ MX6QDL_PAD_GPIO_9__WDOG1_B 0x1b0b0 /* Watchdog out */
++ >;
++ };
++ };
++};
++
++&ldb {
++ split-mode;
++ status = "okay";
++
++ lvds-channel at 0 {
++ fsl,data-mapping = "spwg";
++ fsl,data-width = <24>;
++ crtc = "ipu1-di0";
++ status = "okay";
++
++ display-timings {
++ native-mode = <&timing0>;
++ timing0: SHARP-LQ156M1LG21 {
++ clock-frequency = <65000000>;
++ hactive = <1920>;
++ vactive = <1080>;
++ hback-porch = <100>;
++ hfront-porch = <40>;
++ vback-porch = <30>;
++ vfront-porch = <3>;
++ hsync-len = <10>;
++ vsync-len = <2>;
++ };
++ };
++ };
++
++ lvds-channel at 1 {
++ status = "disabled";
++ };
++};
++
++&pcie {
++ reset-gpio = <&gpio7 12 0>;
++ fsl,tx-deemph-gen1 = <0>;
++ fsl,tx-deemph-gen2-3p5db = <0>;
++ fsl,tx-deemph-gen2-6db = <20>;
++ fsl,tx-swing-full = <103>;
++ fsl,tx-swing-low = <103>;
++ status = "okay";
++};
++
++
++&pwm1 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_pwm1>;
++ status = "okay";
++};
++
++&pwm2 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_pwm2>;
++ status = "okay";
++};
++
++&ssi1 {
++ status = "okay";
++};
++
++&uart3 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_uart3>;
++ fsl,uart-has-rtscts;
++ status = "okay";
++};
++
++&uart4 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_uart4>;
++ status = "okay";
++};
++
++&usbh1 {
++ vbus-supply = <®_usb_h1_vbus>;
++ reset-gpios = <&gpio7 11 0>;
++ status = "okay";
++};
++
++&usbotg {
++ vbus-supply = <®_usb_otg_vbus>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_usbotg>;
++ disable-over-current;
++ status = "okay";
++};
++
++&usdhc2 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_usdhc2>;
++ cd-gpios = <&gpio1 4 1>;
++ no-1-8-v;
++ keep-power-in-suspend;
++ enable-sdio-wakeup;
++ status = "okay";
++};
++
++&usdhc3 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_usdhc3 &pinctrl_usdhc3_reset>;
++ bus-width = <8>;
++ vmmc-supply = <&bperi>;
++ no-1-8-v;
++ non-removable;
++ keep-power-in-suspend;
++ status = "okay";
++};
++
++&usdhc4 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_usdhc4>;
++ bus-width = <8>;
++ cd-gpios = <&gpio6 11 1>;
++ no-1-8-v;
++ keep-power-in-suspend;
++ enable-sdio-wakeup;
++ status = "okay";
++};
++
++&vpu {
++ pu-supply = <®_pu>;
++};
++
++&sata {
++ fsl,no-spread-spectrum;
++ fsl,transmit-atten-16ths = <12>;
++ fsl,transmit-boost-mdB = <3330>;
++ fsl,transmit-level-mV = <1133>;
++ fsl,receive-dpll-mode = <1>;
++ status = "okay";
++};
++&wdog1 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_wdog>;
++ fsl,wdog_b;
++};
+--
+2.11.0
+
diff --git a/recipes-kernel/linux/linux-advantech-4.9/0002-mfd-da9063-Add-wakeup-source-support.patch b/recipes-kernel/linux/linux-advantech-4.9/0002-mfd-da9063-Add-wakeup-source-support.patch
new file mode 100644
index 0000000..d911273
--- /dev/null
+++ b/recipes-kernel/linux/linux-advantech-4.9/0002-mfd-da9063-Add-wakeup-source-support.patch
@@ -0,0 +1,28 @@
+From e330be67b1dd357fdc9676c72315eb0b8a9fd911 Mon Sep 17 00:00:00 2001
+From: Ken Lin <ken.lin at advantech.com.tw>
+Date: Tue, 26 Jul 2016 11:36:19 +0800
+Subject: [PATCH 3/4] mfd: da9063: Add wakeup source support
+
+Configure da9063 IRQ as a iMx6 wakeup source
+---
+ drivers/mfd/da9063-core.c | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+diff --git a/drivers/mfd/da9063-core.c b/drivers/mfd/da9063-core.c
+index 6c2870d4e754..72c303be2568 100644
+--- a/drivers/mfd/da9063-core.c
++++ b/drivers/mfd/da9063-core.c
+@@ -232,6 +232,10 @@ int da9063_device_init(struct da9063 *da9063, unsigned int irq)
+ if (ret)
+ dev_err(da9063->dev, "Cannot add MFD cells\n");
+
++
++ enable_irq_wake(da9063->chip_irq);
++
++
+ return ret;
+ }
+
+--
+2.11.0
+
diff --git a/recipes-kernel/linux/linux-advantech-4.9/0003-da9063-Add-a-PMIC-qurk-to-support-system-suspend-res.patch b/recipes-kernel/linux/linux-advantech-4.9/0003-da9063-Add-a-PMIC-qurk-to-support-system-suspend-res.patch
new file mode 100644
index 0000000..411aa73
--- /dev/null
+++ b/recipes-kernel/linux/linux-advantech-4.9/0003-da9063-Add-a-PMIC-qurk-to-support-system-suspend-res.patch
@@ -0,0 +1,223 @@
+From f4d37d3abc522e72bebc2310d478cb5ebed24a4a Mon Sep 17 00:00:00 2001
+From: Ken Lin <yungching0725 at gmail.com>
+Date: Thu, 1 Mar 2018 08:16:47 +0800
+Subject: [PATCH 4/4] da9063: Add a PMIC qurk to support system suspend/resume
+ and shutdown
+
+Add a platfrom specific qurik to adjust PMIC power rails during suspend/resume and shutdown
+---
+ arch/arm/mach-imx/Makefile | 2 +-
+ arch/arm/mach-imx/mach-dms-ba16.c | 188 ++++++++++++++++++++++++++++++++++++++
+ 2 files changed, 189 insertions(+), 1 deletion(-)
+ create mode 100644 arch/arm/mach-imx/mach-dms-ba16.c
+
+diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile
+index 5d43296bdbe4..6bae5db72870 100644
+--- a/arch/arm/mach-imx/Makefile
++++ b/arch/arm/mach-imx/Makefile
+@@ -93,7 +93,7 @@ AFLAGS_ddr3_freq_imx6.o :=-Wa,-march=armv7-a
+ AFLAGS_smp_wfe_imx6.o :=-Wa,-march=armv7-a
+ AFLAGS_lpddr2_freq_imx6q.o :=-Wa,-march=armv7-a
+ obj-$(CONFIG_SOC_IMX6Q) += mach-imx6q.o ddr3_freq_imx6.o smp_wfe_imx6.o \
+- lpddr2_freq_imx6q.o
++ lpddr2_freq_imx6q.o mach-dms-ba16.o
+ AFLAGS_lpddr2_freq_imx6.o :=-Wa,-march=armv7-a
+ obj-$(CONFIG_SOC_IMX6SL) += mach-imx6sl.o lpddr2_freq_imx6.o
+ AFLAGS_lpddr2_freq_imx6sll.o :=-Wa,-march=armv7-a
+diff --git a/arch/arm/mach-imx/mach-dms-ba16.c b/arch/arm/mach-imx/mach-dms-ba16.c
+new file mode 100644
+index 000000000000..ac6e6a0ca7a0
+--- /dev/null
++++ b/arch/arm/mach-imx/mach-dms-ba16.c
+@@ -0,0 +1,188 @@
++/*
++ * Platform suspend/resume/poweroff quirk example
++ *
++ * Copyright (C) 2015 Dialog Semiconductor Ltd
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; version 2 of the License.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ */
++
++#include <linux/device.h>
++#include <linux/i2c.h>
++#include <linux/init.h>
++#include <linux/io.h>
++#include <linux/notifier.h>
++#include <linux/of.h>
++#include <linux/mfd/da9063/registers.h>
++#include <linux/pm.h>
++#include <linux/suspend.h>
++#include <linux/reboot.h>
++#include <linux/delay.h>
++#include <linux/regulator/machine.h>
++#include <linux/gpio.h>
++#include "hardware.h"
++
++#define SUS_S3_OUT IMX_GPIO_NR(4, 11)
++static struct i2c_client *da9063_client;
++
++static int dms_ba16_suspend_pm_cb(struct notifier_block *nb,
++ unsigned long action, void *ptr)
++{
++ switch (action) {
++ case PM_SUSPEND_PREPARE:
++ case PM_HIBERNATION_PREPARE:
++ /*
++ * E.G. ADJUST PMIC SEQUENCER FOR SUSPEND
++ * E.G. MANIPULATE CONTROL LINE USAGE
++ * i2c_smbus_write_byte_data(dms_ba16_client, <REGISTER>, <VALUE>);
++ */
++
++ gpio_direction_output(SUS_S3_OUT, 0); /*Set SUS_S3 low during suspend*/
++
++ break;
++ case PM_POST_SUSPEND:
++ case PM_POST_HIBERNATION:
++ /*
++ * RESTORE PMIC SEQUENCER / CONTROL LINES
++ * i2c_smbus_write_byte_data(dms_ba16_client, <REGISTER>, <VALUE>);
++ */
++ i2c_smbus_write_byte_data(da9063_client,0xA4,0x70); // VBCORE1_A(1.42V)
++ i2c_smbus_write_byte_data(da9063_client,0xA3,0x70); // VBCORE2_A(1.42V)
++ i2c_smbus_write_byte_data(da9063_client,0xA5,0x61); // VBPRO_A(1.5V)
++ i2c_smbus_write_byte_data(da9063_client,0xA6,0x32); // VBMEM_A(1.8V)
++ i2c_smbus_write_byte_data(da9063_client,0xA7,0x32); // VBIO_A(1.8V)
++ i2c_smbus_write_byte_data(da9063_client,0xA8,0x7d); // VBPERI_A(3.3V)
++
++
++ gpio_direction_output(SUS_S3_OUT, 1); /*Set SUS_S3 high during resume*/
++
++ break;
++ default:
++ return NOTIFY_DONE;
++ }
++ return NOTIFY_OK;
++}
++
++static void dms_ba16_poweroff_quirk(void)
++{
++ /*
++ * Do nothing - this must be assigned as pm_power_off callback, or
++ * otherwise /kernel/reboot.c : SYSCALL_DEFINE4(reboot, ... reduces
++ * LINUX_REBOOT_CMD_POWER_OFF to LINUX_REBOOT_CMD_HALT
++ * and so the pm_power_off_prepare callback would never be used!
++ *
++ * This callback is now apparently too late in the power off process
++ * for dms_ba16 I2C work, as it caused a stack dump with the message:
++ * WARNING: CPU: 0 PID: 50 at kernel/workqueue.c:1958
++ * process_one_work+0x3bc/0x424()
++ */
++}
++static void da9063_poweroff_prepare_quirk(void)
++{
++ /* E.G. SET PMIC MODE AND POWER OFF */
++ u8 val = 0;
++
++
++ printk(KERN_ALERT "Poweroff DA9063\n");
++
++
++ i2c_smbus_write_byte_data(da9063_client, DA9063_REG_CONTROL_F,DA9063_SHUTDOWN);
++
++
++ while (1);
++
++ return;
++}
++
++static int dms_ba16_reboot_notify(struct notifier_block *nb,
++ unsigned long action, void *data)
++{
++ switch (action) {
++ case SYS_POWER_OFF:
++ break;
++ case SYS_HALT:
++ case SYS_RESTART:
++ /*
++ * E.G. RESTORE PMIC SEQUENCER
++ * E.G. MODIFY GPIO TO RESET SLAVE DEVICE
++ * i2c_smbus_write_byte_data(dms_ba16_client, <REGISTER>, <VALUE>);
++ */
++ break;
++ default:
++ break;
++ }
++ return 0;
++}
++
++static struct notifier_block dms_ba16_reboot_nb = {
++ .notifier_call = dms_ba16_reboot_notify
++};
++
++static int platform_i2c_bus_notify(struct notifier_block *nb,
++ unsigned long action, void *data)
++{
++ struct device *dev = data;
++ struct i2c_client *client;
++
++ if ((action != BUS_NOTIFY_ADD_DEVICE) ||
++ (dev->type == &i2c_adapter_type))
++ return 0;
++
++ client = to_i2c_client(dev);
++
++ if ((client->addr == 0x58 && !strcmp(client->name, "da9063"))) {
++ da9063_client = client;
++
++ /*
++ * E.G. SET IRQ MASKS
++ * i2c_smbus_write_byte_data(dms_ba16_client, <REGISTER>, <VALUE>);
++ */
++
++ /*
++ * Register PM notifier for suspend/resume switchovers
++ * of control
++ */
++
++ i2c_smbus_write_byte_data(da9063_client,0x0B,0xF7); /*IRQ_MASK_B*/
++ i2c_smbus_write_byte_data(da9063_client,0x25,0x9); /*BPERI_CONT keep BPERI_B voltage when supsend*/
++ i2c_smbus_write_byte_data(da9063_client,0x24,0x1); /*BIO_CONT let BIO_B off when supsend*/
++
++
++ gpio_direction_output(SUS_S3_OUT, 1); /*Set SUS_S3 high when power on*/
++
++ pm_notifier(dms_ba16_suspend_pm_cb, 0);
++
++ /* Register reboot notifier */
++ register_reboot_notifier(&dms_ba16_reboot_nb);
++
++ /* Establish poweroff callback */
++ printk(KERN_INFO "Installing DA9063 poweroff control\n");
++ pm_power_off_prepare = da9063_poweroff_prepare_quirk;
++ pm_power_off = dms_ba16_poweroff_quirk;
++
++ /* Get rid of this notification */
++ bus_unregister_notifier(&i2c_bus_type, nb);
++ }
++
++ return 0;
++}
++
++static struct notifier_block platform_i2c_bus_nb = {
++ .notifier_call = platform_i2c_bus_notify
++};
++
++static int __init platform_quirk(void)
++{
++ da9063_client = NULL;
++ bus_register_notifier(&i2c_bus_type, &platform_i2c_bus_nb);
++ return 0;
++}
++
++arch_initcall(platform_quirk);
++
+--
+2.11.0
+
diff --git a/recipes-kernel/linux/linux-advantech-4.9/defconfig b/recipes-kernel/linux/linux-advantech-4.9/defconfig
new file mode 100644
index 0000000..a648981
--- /dev/null
+++ b/recipes-kernel/linux/linux-advantech-4.9/defconfig
@@ -0,0 +1,398 @@
+CONFIG_KERNEL_LZO=y
+CONFIG_SYSVIPC=y
+CONFIG_NO_HZ=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_LOG_BUF_SHIFT=18
+CONFIG_CGROUPS=y
+CONFIG_RELAY=y
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_EXPERT=y
+CONFIG_PERF_EVENTS=y
+# CONFIG_SLUB_DEBUG is not set
+# CONFIG_COMPAT_BRK is not set
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+CONFIG_MODVERSIONS=y
+CONFIG_MODULE_SRCVERSION_ALL=y
+# CONFIG_BLK_DEV_BSG is not set
+CONFIG_ARCH_MULTI_V6=y
+CONFIG_ARCH_MXC=y
+CONFIG_MACH_MX31LILLY=y
+CONFIG_MACH_MX31LITE=y
+CONFIG_MACH_PCM037=y
+CONFIG_MACH_PCM037_EET=y
+CONFIG_MACH_MX31_3DS=y
+CONFIG_MACH_MX31MOBOARD=y
+CONFIG_MACH_QONG=y
+CONFIG_MACH_ARMADILLO5X0=y
+CONFIG_MACH_KZM_ARM11_01=y
+CONFIG_MACH_IMX31_DT=y
+CONFIG_MACH_IMX35_DT=y
+CONFIG_MACH_PCM043=y
+CONFIG_MACH_MX35_3DS=y
+CONFIG_MACH_VPR200=y
+CONFIG_SOC_IMX50=y
+CONFIG_SOC_IMX51=y
+CONFIG_SOC_IMX53=y
+CONFIG_SOC_IMX6Q=y
+# CONFIG_SOC_IMX6SL=y
+# CONFIG_SOC_IMX6SX=y
+# CONFIG_SOC_IMX6UL=y
+# CONFIG_SOC_IMX7D=y
+CONFIG_SOC_VF610=y
+CONFIG_PCI=y
+CONFIG_PCI_MSI=y
+CONFIG_PCI_IMX6=y
+CONFIG_SMP=y
+CONFIG_ARM_PSCI=y
+CONFIG_PREEMPT_VOLUNTARY=y
+CONFIG_AEABI=y
+CONFIG_HIGHMEM=y
+CONFIG_CMA=y
+CONFIG_CMDLINE="noinitrd console=ttymxc0,115200"
+CONFIG_KEXEC=y
+CONFIG_CPU_FREQ=y
+CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
+CONFIG_ARM_IMX6Q_CPUFREQ=y
+CONFIG_CPU_IDLE=y
+CONFIG_VFP=y
+CONFIG_NEON=y
+CONFIG_BINFMT_MISC=m
+CONFIG_PM_DEBUG=y
+CONFIG_PM_TEST_SUSPEND=y
+CONFIG_NET=y
+CONFIG_PACKET=y
+CONFIG_UNIX=y
+CONFIG_INET=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_BEET is not set
+CONFIG_NETFILTER=y
+CONFIG_CAN=y
+CONFIG_CAN_FLEXCAN=y
+CONFIG_BT=y
+CONFIG_BT_HCIUART=y
+CONFIG_BT_HCIUART_H4=y
+CONFIG_BT_HCIUART_LL=y
+CONFIG_CFG80211=y
+CONFIG_MAC80211=y
+CONFIG_RFKILL=y
+CONFIG_RFKILL_INPUT=y
+CONFIG_DEVTMPFS=y
+CONFIG_DEVTMPFS_MOUNT=y
+# CONFIG_STANDALONE is not set
+CONFIG_DMA_CMA=y
+CONFIG_IMX_WEIM=y
+CONFIG_CONNECTOR=y
+CONFIG_MTD=y
+CONFIG_MTD_CMDLINE_PARTS=y
+CONFIG_MTD_BLOCK=y
+CONFIG_MTD_CFI=y
+CONFIG_MTD_JEDECPROBE=y
+CONFIG_MTD_CFI_INTELEXT=y
+CONFIG_MTD_CFI_AMDSTD=y
+CONFIG_MTD_CFI_STAA=y
+CONFIG_MTD_PHYSMAP_OF=y
+CONFIG_MTD_DATAFLASH=y
+CONFIG_MTD_M25P80=y
+CONFIG_MTD_SST25L=y
+CONFIG_MTD_NAND=y
+CONFIG_MTD_NAND_GPMI_NAND=y
+CONFIG_MTD_NAND_VF610_NFC=y
+CONFIG_MTD_NAND_MXC=y
+CONFIG_MTD_SPI_NOR=y
+CONFIG_SPI_FSL_QUADSPI=y
+CONFIG_MTD_UBI=y
+CONFIG_MTD_UBI_FASTMAP=y
+CONFIG_MTD_UBI_BLOCK=y
+CONFIG_BLK_DEV_LOOP=y
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_SIZE=65536
+CONFIG_EEPROM_AT24=y
+CONFIG_EEPROM_AT25=y
+# CONFIG_SCSI_PROC_FS is not set
+CONFIG_BLK_DEV_SD=y
+CONFIG_SCSI_CONSTANTS=y
+CONFIG_SCSI_LOGGING=y
+CONFIG_SCSI_SCAN_ASYNC=y
+# CONFIG_SCSI_LOWLEVEL is not set
+CONFIG_ATA=y
+CONFIG_SATA_AHCI_PLATFORM=y
+CONFIG_AHCI_IMX=y
+CONFIG_PATA_IMX=y
+CONFIG_NETDEVICES=y
+# CONFIG_NET_VENDOR_BROADCOM is not set
+CONFIG_CS89x0=y
+CONFIG_CS89x0_PLATFORM=y
+# CONFIG_NET_VENDOR_FARADAY is not set
+# CONFIG_NET_VENDOR_INTEL is not set
+# CONFIG_NET_VENDOR_MARVELL is not set
+# CONFIG_NET_VENDOR_MICREL is not set
+# CONFIG_NET_VENDOR_MICROCHIP is not set
+# CONFIG_NET_VENDOR_NATSEMI is not set
+# CONFIG_NET_VENDOR_SEEQ is not set
+CONFIG_SMC91X=y
+CONFIG_SMC911X=y
+CONFIG_SMSC911X=y
+# CONFIG_NET_VENDOR_STMICRO is not set
+CONFIG_AT803X_PHY=y
+CONFIG_MICREL_PHY=y
+CONFIG_USB_PEGASUS=m
+CONFIG_USB_RTL8150=m
+CONFIG_USB_RTL8152=m
+CONFIG_USB_USBNET=y
+CONFIG_USB_NET_CDC_EEM=m
+CONFIG_BRCMFMAC=m
+CONFIG_WL12XX=m
+CONFIG_WLCORE_SDIO=m
+# CONFIG_WILINK_PLATFORM_DATA is not set
+# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
+CONFIG_INPUT_EVDEV=y
+CONFIG_INPUT_EVBUG=m
+CONFIG_KEYBOARD_GPIO=y
+CONFIG_KEYBOARD_IMX=y
+CONFIG_MOUSE_PS2=m
+CONFIG_MOUSE_PS2_ELANTECH=y
+CONFIG_INPUT_TOUCHSCREEN=y
+CONFIG_TOUCHSCREEN_ADS7846=y
+CONFIG_TOUCHSCREEN_EGALAX=y
+CONFIG_TOUCHSCREEN_IMX6UL_TSC=y
+CONFIG_TOUCHSCREEN_EDT_FT5X06=y
+CONFIG_TOUCHSCREEN_MC13783=y
+CONFIG_TOUCHSCREEN_TSC2004=y
+CONFIG_TOUCHSCREEN_TSC2007=y
+CONFIG_TOUCHSCREEN_STMPE=y
+CONFIG_TOUCHSCREEN_SX8654=y
+CONFIG_TOUCHSCREEN_COLIBRI_VF50=y
+CONFIG_INPUT_MISC=y
+CONFIG_INPUT_MMA8450=y
+CONFIG_INPUT_DA9063_ONKEY=y
+CONFIG_SERIO_SERPORT=m
+# CONFIG_LEGACY_PTYS is not set
+# CONFIG_DEVKMEM is not set
+CONFIG_SERIAL_IMX=y
+CONFIG_SERIAL_IMX_CONSOLE=y
+CONFIG_SERIAL_FSL_LPUART=y
+CONFIG_SERIAL_FSL_LPUART_CONSOLE=y
+# CONFIG_I2C_COMPAT is not set
+CONFIG_I2C_CHARDEV=y
+CONFIG_I2C_MUX_GPIO=y
+# CONFIG_I2C_HELPER_AUTO is not set
+CONFIG_I2C_ALGOPCF=m
+CONFIG_I2C_ALGOPCA=m
+CONFIG_I2C_GPIO=y
+CONFIG_I2C_IMX=y
+CONFIG_SPI=y
+CONFIG_SPI_IMX=y
+CONFIG_SPI_FSL_DSPI=y
+CONFIG_GPIO_SYSFS=y
+CONFIG_GPIO_MC9S08DZ60=y
+CONFIG_GPIO_PCA953X=y
+CONFIG_GPIO_STMPE=y
+CONFIG_POWER_RESET=y
+CONFIG_POWER_RESET_GPIO=y
+CONFIG_POWER_RESET_IMX=y
+CONFIG_POWER_RESET_SYSCON=y
+CONFIG_POWER_RESET_SYSCON_POWEROFF=y
+CONFIG_POWER_SUPPLY=y
+CONFIG_SENSORS_GPIO_FAN=y
+CONFIG_SENSORS_IIO_HWMON=y
+CONFIG_THERMAL=y
+CONFIG_CPU_THERMAL=y
+CONFIG_IMX_THERMAL=y
+CONFIG_WATCHDOG=y
+CONFIG_IMX2_WDT=y
+CONFIG_MFD_DA9052_I2C=y
+CONFIG_MFD_DA9063=y
+CONFIG_MFD_MC13XXX_SPI=y
+CONFIG_MFD_MC13XXX_I2C=y
+CONFIG_MFD_STMPE=y
+CONFIG_REGULATOR=y
+CONFIG_REGULATOR_FIXED_VOLTAGE=y
+CONFIG_REGULATOR_ANATOP=y
+CONFIG_REGULATOR_DA9052=y
+CONFIG_REGULATOR_DA9063=y
+CONFIG_REGULATOR_GPIO=y
+CONFIG_REGULATOR_MC13783=y
+CONFIG_REGULATOR_MC13892=y
+CONFIG_REGULATOR_PFUZE100=y
+CONFIG_MEDIA_SUPPORT=y
+CONFIG_MEDIA_CAMERA_SUPPORT=y
+CONFIG_MEDIA_RC_SUPPORT=y
+CONFIG_RC_DEVICES=y
+CONFIG_IR_GPIO_CIR=y
+CONFIG_MEDIA_USB_SUPPORT=y
+CONFIG_USB_VIDEO_CLASS=m
+CONFIG_V4L_PLATFORM_DRIVERS=y
+CONFIG_SOC_CAMERA=y
+CONFIG_V4L_MEM2MEM_DRIVERS=y
+CONFIG_VIDEO_CODA=y
+CONFIG_SOC_CAMERA_OV2640=y
+CONFIG_IMX_IPUV3_CORE=y
+CONFIG_DRM=y
+CONFIG_DRM_PANEL_SIMPLE=y
+CONFIG_DRM_DW_HDMI_AHB_AUDIO=m
+CONFIG_DRM_IMX=y
+CONFIG_DRM_IMX_PARALLEL_DISPLAY=y
+CONFIG_DRM_IMX_TVE=y
+CONFIG_DRM_IMX_LDB=y
+CONFIG_DRM_IMX_HDMI=y
+CONFIG_DRM_ETNAVIV=y
+CONFIG_FB_MXS=y
+CONFIG_LCD_CLASS_DEVICE=y
+CONFIG_LCD_L4F00242T03=y
+CONFIG_LCD_PLATFORM=y
+CONFIG_BACKLIGHT_PWM=y
+CONFIG_BACKLIGHT_GPIO=y
+CONFIG_FRAMEBUFFER_CONSOLE=y
+CONFIG_LOGO=y
+CONFIG_SOUND=y
+CONFIG_SND=y
+CONFIG_SND_USB_AUDIO=m
+CONFIG_SND_SOC=y
+CONFIG_SND_SOC_FSL_ASRC=y
+CONFIG_SND_IMX_SOC=y
+CONFIG_SND_SOC_PHYCORE_AC97=y
+CONFIG_SND_SOC_EUKREA_TLV320=y
+CONFIG_SND_SOC_IMX_WM8962=y
+CONFIG_SND_SOC_IMX_SGTL5000=y
+CONFIG_SND_SOC_IMX_SPDIF=y
+CONFIG_SND_SOC_IMX_MC13783=y
+CONFIG_SND_SOC_FSL_ASOC_CARD=y
+CONFIG_SND_SOC_CS42XX8_I2C=y
+CONFIG_SND_SOC_TLV320AIC3X=y
+CONFIG_SND_SOC_WM8960=y
+CONFIG_SND_SIMPLE_CARD=y
+CONFIG_USB=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_MXC=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_CHIPIDEA=y
+CONFIG_USB_CHIPIDEA_UDC=y
+CONFIG_USB_CHIPIDEA_HOST=y
+CONFIG_USB_SERIAL=m
+CONFIG_USB_SERIAL_GENERIC=y
+CONFIG_USB_SERIAL_FTDI_SIO=m
+CONFIG_USB_SERIAL_OPTION=m
+CONFIG_USB_TEST=m
+CONFIG_USB_EHSET_TEST_FIXTURE=m
+CONFIG_NOP_USB_XCEIV=y
+CONFIG_USB_MXS_PHY=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_FSL_USB2=y
+CONFIG_USB_CONFIGFS=m
+CONFIG_USB_CONFIGFS_SERIAL=y
+CONFIG_USB_CONFIGFS_ACM=y
+CONFIG_USB_CONFIGFS_OBEX=y
+CONFIG_USB_CONFIGFS_NCM=y
+CONFIG_USB_CONFIGFS_ECM=y
+CONFIG_USB_CONFIGFS_ECM_SUBSET=y
+CONFIG_USB_CONFIGFS_RNDIS=y
+CONFIG_USB_CONFIGFS_EEM=y
+CONFIG_USB_CONFIGFS_MASS_STORAGE=y
+CONFIG_USB_CONFIGFS_F_LB_SS=y
+CONFIG_USB_CONFIGFS_F_FS=y
+CONFIG_USB_CONFIGFS_F_UAC1=y
+CONFIG_USB_CONFIGFS_F_UAC2=y
+CONFIG_USB_CONFIGFS_F_MIDI=y
+CONFIG_USB_CONFIGFS_F_HID=y
+CONFIG_USB_CONFIGFS_F_UVC=y
+CONFIG_USB_CONFIGFS_F_PRINTER=y
+CONFIG_USB_ZERO=m
+CONFIG_USB_AUDIO=m
+CONFIG_USB_ETH=m
+CONFIG_USB_G_NCM=m
+CONFIG_USB_GADGETFS=m
+CONFIG_USB_FUNCTIONFS=m
+CONFIG_USB_MASS_STORAGE=m
+CONFIG_USB_G_SERIAL=m
+CONFIG_MMC=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_PLTFM=y
+CONFIG_MMC_SDHCI_ESDHC_IMX=y
+CONFIG_NEW_LEDS=y
+CONFIG_LEDS_CLASS=y
+CONFIG_LEDS_GPIO=y
+CONFIG_LEDS_PWM=y
+CONFIG_LEDS_TRIGGERS=y
+CONFIG_LEDS_TRIGGER_TIMER=y
+CONFIG_LEDS_TRIGGER_ONESHOT=y
+CONFIG_LEDS_TRIGGER_HEARTBEAT=y
+CONFIG_LEDS_TRIGGER_BACKLIGHT=y
+CONFIG_LEDS_TRIGGER_GPIO=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_INTF_DEV_UIE_EMUL=y
+CONFIG_RTC_DRV_DS1307=y
+CONFIG_RTC_DRV_ISL1208=y
+CONFIG_RTC_DRV_PCF8523=y
+CONFIG_RTC_DRV_PCF8563=y
+CONFIG_RTC_DRV_M41T80=y
+CONFIG_RTC_DRV_RX8010=y
+CONFIG_RTC_DRV_MC13XXX=y
+CONFIG_RTC_DRV_MXC=y
+CONFIG_RTC_DRV_SNVS=y
+CONFIG_DMADEVICES=y
+CONFIG_FSL_EDMA=y
+CONFIG_IMX_SDMA=y
+CONFIG_MXS_DMA=y
+CONFIG_STAGING=y
+CONFIG_IIO=y
+CONFIG_VF610_ADC=y
+CONFIG_MPL3115=y
+CONFIG_PWM=y
+CONFIG_PWM_FSL_FTM=y
+CONFIG_PWM_IMX=y
+CONFIG_NVMEM_IMX_OCOTP=y
+CONFIG_EXT2_FS=y
+CONFIG_EXT2_FS_XATTR=y
+CONFIG_EXT2_FS_POSIX_ACL=y
+CONFIG_EXT2_FS_SECURITY=y
+CONFIG_EXT3_FS=y
+CONFIG_EXT3_FS_POSIX_ACL=y
+CONFIG_EXT3_FS_SECURITY=y
+CONFIG_QUOTA=y
+CONFIG_QUOTA_NETLINK_INTERFACE=y
+# CONFIG_PRINT_QUOTA_WARNING is not set
+CONFIG_AUTOFS4_FS=y
+CONFIG_FUSE_FS=y
+CONFIG_ISO9660_FS=m
+CONFIG_JOLIET=y
+CONFIG_ZISOFS=y
+CONFIG_UDF_FS=m
+CONFIG_MSDOS_FS=m
+CONFIG_VFAT_FS=y
+CONFIG_JFFS2_FS=y
+CONFIG_UBIFS_FS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3_ACL=y
+CONFIG_NFS_V4=y
+CONFIG_ROOT_NFS=y
+CONFIG_NLS_DEFAULT="cp437"
+CONFIG_NLS_CODEPAGE_437=y
+CONFIG_NLS_ASCII=y
+CONFIG_NLS_ISO8859_1=y
+CONFIG_NLS_ISO8859_15=m
+CONFIG_NLS_UTF8=y
+CONFIG_PRINTK_TIME=y
+CONFIG_DEBUG_FS=y
+CONFIG_MAGIC_SYSRQ=y
+CONFIG_PANIC_TIMEOUT=3
+# CONFIG_SCHED_DEBUG is not set
+CONFIG_PROVE_LOCKING=y
+# CONFIG_DEBUG_BUGVERBOSE is not set
+# CONFIG_FTRACE is not set
+# CONFIG_ARM_UNWIND is not set
+CONFIG_SECURITYFS=y
+CONFIG_CRYPTO_DEV_FSL_CAAM=y
+CONFIG_CRYPTO_DEV_SAHARA=y
+CONFIG_CRC_CCITT=m
+CONFIG_CRC_T10DIF=y
+CONFIG_CRC7=m
+CONFIG_LIBCRC32C=m
+CONFIG_FONTS=y
+CONFIG_FONT_8x8=y
+CONFIG_FONT_8x16=y
diff --git a/recipes-kernel/linux/linux-advantech_4.9.bb b/recipes-kernel/linux/linux-advantech_4.9.bb
new file mode 100644
index 0000000..6f08d9b
--- /dev/null
+++ b/recipes-kernel/linux/linux-advantech_4.9.bb
@@ -0,0 +1,20 @@
+# Copyright (C) 2017 Timesys Corporation
+# Copyright (C) 2017 Advantech Corporation
+# Released under the MIT license (see COPYING.MIT for the terms)
+
+include recipes-kernel/linux/linux-imx.inc
+DEPENDS += "lzop-native bc-native"
+DO_CONFIG_V7_COPY_mx6 = "no"
+
+SRCBRANCH = "4.9-1.0.x-imx"
+SRCREV = "0e674a64b86e2bb00ab43f56104d3ea85dda0066"
+LOCALVERSION = "-${SRCBRANCH}-dms-ba16"
+
+SRC_URI = "git://github.com/Freescale/linux-fslc.git;branch=${SRCBRANCH} \
+ file://0001-Add-support-for-the-Advantech-DMS-BA16-Board.patch \
+ file://0002-mfd-da9063-Add-wakeup-source-support.patch \
+ file://0003-da9063-Add-a-PMIC-qurk-to-support-system-suspend-res.patch \
+ file://defconfig \
+ "
+
+COMPATIBLE_MACHINE = "(imx6q-dms-ba16)"
--
2.11.0
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