[meta-freescale] Setting VDD_SOC in i.MX6Q

[Teemu K]

On Mon, Aug 27, 2018 at 11:00 AM Teemu K <maillinglists18 at gmail.com> wrote:
>
> Hi,
>
> This is somewhat simple thing that turned out not to be so simple.
>
> We have custom i.MX6Q based HW running Yocto 2.4 and Linux 4.1-2.0...
> and VDDARM_IN is set to 1.425V. Also VDDSOC_IN is set to 1.425V. They
> both come from external PMIC as usually do.
>
> Now the VDD_SOC_CAP should be set to 1.375V without changing the
> VDDARM_IN. I think this should be possible by setting the LDO_DIG(SOC)
> to 1.375V.
>
> That's the part that I couldn't figure out.  I have following in device tree:
> --
>                         fsl,soc-operating-points = <
>                                 /* ARM kHz  SOC-PU uV */
>                                 1200000 1375000
>                                 996000  1375000
>                                 852000  1375000
>                                 792000  1375000
>                                 396000  1375000
>                         >;
> --
>
> But that controls the PMIC and LDO. I just want to change the LDO
> output (VDD_SOC_CAP). I only seem to be able to same both values not
> just one.
>
Okay, so it seems I misunderstood the problem so replying to my own message.

I need to set PMIC voltages, not LDO so VDD_SOC_IN should be set to
1.375V, but leave the VDD_ARM_IN to 1.425V. The setup above changes
them both which is not desired.

Is there a way to configure just VDD_SOC_IN - part without modifying the driver?

-Teemu