[meta-freescale] Marvell Switch mv88e6352 with kernel 4.1.15 on IMX6Q
Pierrick Guitter
pierrick.guitter at external.desouttertools.com
Tue Jul 18 10:42:45 PDT 2017
Hello,
I have been trying to run the mv88e6352 switch work with my custom imx6q board with 4.1.15 linux kernel.
In my kernel configuration, I added CONFIG_NET_DSA and CONFIG_NET_DSA_MV88E6352.
To comply with DSA needs, I complemented my device tree with the entry below:
dsa at 0{
compatible = "marvell,dsa";
#address-cells = <2>;
#size-cells = <0>;
dsa,ethernet = <&fec>;
dsa,mii-bus = <&mdio>;
switch at 0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0 0>;
port at 0 {
reg = <0>;
label = "swp0";
fixed-link = <0 1 100 0 0>;
};
port at 1 {
reg = <1>;
label = "swp1";
fixed-link = <0 1 100 0 0>;
};
port at 2 {
reg = <2>;
label = "swp2";
fixed-link = <0 1 100 0 0>;
};
port at 3 {
reg = <3>;
label = "swp3";
fixed-link = <0 1 100 0 0>;
};
port at 5 {
reg = <5>;
label = "cpu";
fixed-link = <0 1 100 0 0>;
};
};
};
and I modified my fec entry:
&fec {
compatible = "fsl,imx6q-fec";
pinctrl-names = "default";
pinctrl-0 = <>;
phy-mode = "rgmii";
phy-reset-gpios = <>;/*phy-reset-gpios = <&gpio1 25 0>;*/
fixed-link = <0 1 100 0 0>;
status = "okay";
mdio: mdio at 0 {
status = "okay";
};
}
However, I always obtain DSA errors ( "[0]: could not detect attached switch"), meaning that the switch was not properly registered by the mv88e6352 driver, due to the PHY itself not being ready ("ethernet supply phy not found, using dummy regulator"). The PHY in question only becomes ready at the end of my initialisation.
Thus, I built the mentionned above kernel drivers (dsa_core and mv88e6xxx_drv) dynamically, and I inserted them way after the PHY being ready. However, it won't work in module mode, as there is an inter-dependency between the 2 drivers. By a horrible modification in dsa_core, I finally obtained the instanciation of the switch (and I can trigger all my ports defined in the device tree through "ip" or "ifconfig" commands in user space), but I have a kernel Deadlock.
So I think I have got something wrong about my PHY, that's why I am wondering if there is any reason why it is ready so late during my board's initialization.
Pierrick GUITTER
Embedded Systems Engineer - Research & Development
Desoutter Industrial Tools
E-Mail: pierrick.guitter at external.desouttertools.com
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