[meta-freescale] Operating points mismatch on imx6sx SabreSD DTS?

[Mauro Salvini]

Hi,
I'm using krogoth branch of meta-fsl-arm and I'm doing some
modifications on imx6sx-sdb.dts to tailor it on my custom board based on
SabreSD rev. B.
I'm facing with a thing that seems a mismatch between u-boot and linux
domains, I try to explain it.

On cpu0 section of imx6sx.dtsi file I can find these operating points:

operating-points = <
   /* kHz uV */
   996000 1250000
   792000 1175000
   396000 1075000
   198000 975000
>;
fsl,soc-operating-points = <
   /* ARM kHz SOC uV */
   996000 1175000
   792000 1175000
   396000 1175000
   198000 1175000
>;

arm-supply = <&reg_arm>;
soc-supply = <&reg_soc>;

These settings seems to come from table 10 in IMX6SXCEC.pdf, the imx6sx
datasheet.

In imx6sx-sdb.dts file these settings are overwritten with these ones:
 
operating-points = <
   /* kHz uV */
    996000 1250000
    792000 1175000
    396000 1175000
    198000 1175000
>;
fsl,soc-operating-points = <
   /* ARM kHz SOC uV */
    996000 1250000
    792000 1175000
    396000 1175000
    198000 1175000
>;
arm-supply = <&sw1a_reg>;
soc-supply = <&sw1a_reg>;
fsl,arm-soc-shared = <1>;

to use sw1a_reg (SW1AB regulator into PFuze200 that is on SabreSD
board). Furthermore, enables "fsl,ldo-bypass" property to bypass
internal LDOs as we have a pfuze.

These values seems derived from above mentioned table 10 from datasheet,
LDO-disabled section: I can understand that the two tables have same
values because PFuze power source is shared between ARM domain and SOC
domain, and values are the best trade-off to both SOC_IN and ARM_IN
rails.

But here the mismatch: ARM and SOC LDOs are programmed to 1.150V and
1.175V respectively (I read 0x020c8140 register that has 0x004c0012
value, see PMU_REG_CORE into imx6sx reference manual; 1.175V set by
u-boot), so operating points into imx6sx-sdb.dts does not respect
assertion into LDO enabled section from datasheet: 

"VDDARM_IN must be 125mV higher than the LDO Output Set Point
(VDD_ARM_CAP) for correct supply voltage regulation."

I read source code to get an answer, and I found these items:
- u-boot sets SOC LDO only to 1.175V (board_postclk_init() call into
arch/arm/cpu/armv7/mx6/soc.c)
- linux has this comment into arch/arm/mach-imx/gpc.c, when
"fsl,ldo-bypass" property was read:
/* We only bypass pu since arm and soc has been set in u-boot */
in facts, this piece of code bypasses only "pu" regulator (anyway not
present on sabresd), leaving ARM and SOC LDOs untouched
- in imx6sx-sdb-ldo.dts (that disables LDO-bypass and re-enables
internal LDOs), original operating point and regulators are set, and set
to 0 "fsl,ldo-bypass", with comment "use ldo-enable, u-boot will check
it and configure"

It seems that kernel expects that u-boot reads from dtb to find if
internal LDOs must be bypassed or not, but this never happens, instead
u-boot sets SOC LDO to 1.175V and leave ARM LDO untouched (1.150V), so
when linux starts and uses operating points on pfuze it works with
out-of-specs voltages-frequencies applied on ARM and SOC LDOs due to
settings done by u-boot.

Or simply I have miss some point?

Sorry if it is not the right point to post this, but since meta-fsl-arm
layer brings up u-boot and linux into an image, I think it could be the
right one.

Thanks in advance, regards
Mauro