[meta-freescale] [meta-fsl-arm-extra][PATCH v3 1/4] linux-advantech: Add linux kernel recipe for Advantech i.MX6 boards
Akshay Bhat
akshay.bhat at timesys.com
Mon Aug 8 14:22:44 PDT 2016
This recipe is a fork of linux-fslc 4.1-1.0.x-imx kernel with patches for
supporting imx6q-dms-ba16 platform.
Signed-off-by: Akshay Bhat <akshay.bhat at timesys.com>
---
.../0001-rtc-rx8010-Add-driver-to-kernel.patch | 1020 ++++++++++++++++++++
...i_imx-Make-receive-DPLL-mode-configurable.patch | 50 +
...d-DT-bindings-to-configure-PHY-Tx-driver-.patch | 112 +++
.../0004-input-da9063_onkey-Add-driver.patch | 277 ++++++
...5-mfd-da9063-Add-support-for-OnKey-driver.patch | 114 +++
.../0006-add-usb-hub_test-suport.patch | 66 ++
...ts-imx-Add-support-for-Advantech-DMS-BA16.patch | 817 ++++++++++++++++
...a-PMIC-qurk-to-support-system-suspend-res.patch | 218 +++++
...0009-mfd-da9063-Add-wakeup-source-support.patch | 28 +
...-Add-Q7-SUS_S3_OUT-control-support-during.patch | 85 ++
recipes-kernel/linux/linux-advantech-4.1/defconfig | 451 +++++++++
recipes-kernel/linux/linux-advantech_4.1.bb | 27 +
12 files changed, 3265 insertions(+)
create mode 100644 recipes-kernel/linux/linux-advantech-4.1/0001-rtc-rx8010-Add-driver-to-kernel.patch
create mode 100644 recipes-kernel/linux/linux-advantech-4.1/0002-ahci_imx-Make-receive-DPLL-mode-configurable.patch
create mode 100644 recipes-kernel/linux/linux-advantech-4.1/0003-PCI-imx6-Add-DT-bindings-to-configure-PHY-Tx-driver-.patch
create mode 100644 recipes-kernel/linux/linux-advantech-4.1/0004-input-da9063_onkey-Add-driver.patch
create mode 100644 recipes-kernel/linux/linux-advantech-4.1/0005-mfd-da9063-Add-support-for-OnKey-driver.patch
create mode 100644 recipes-kernel/linux/linux-advantech-4.1/0006-add-usb-hub_test-suport.patch
create mode 100644 recipes-kernel/linux/linux-advantech-4.1/0007-ARM-dts-imx-Add-support-for-Advantech-DMS-BA16.patch
create mode 100644 recipes-kernel/linux/linux-advantech-4.1/0008-da9063-Add-a-PMIC-qurk-to-support-system-suspend-res.patch
create mode 100644 recipes-kernel/linux/linux-advantech-4.1/0009-mfd-da9063-Add-wakeup-source-support.patch
create mode 100644 recipes-kernel/linux/linux-advantech-4.1/0010-ARM-dts-imx-Add-Q7-SUS_S3_OUT-control-support-during.patch
create mode 100644 recipes-kernel/linux/linux-advantech-4.1/defconfig
create mode 100644 recipes-kernel/linux/linux-advantech_4.1.bb
diff --git a/recipes-kernel/linux/linux-advantech-4.1/0001-rtc-rx8010-Add-driver-to-kernel.patch b/recipes-kernel/linux/linux-advantech-4.1/0001-rtc-rx8010-Add-driver-to-kernel.patch
new file mode 100644
index 0000000..63b0a33
--- /dev/null
+++ b/recipes-kernel/linux/linux-advantech-4.1/0001-rtc-rx8010-Add-driver-to-kernel.patch
@@ -0,0 +1,1020 @@
+From a7e5438cba40e5b6bada9842ff5533c5823793a7 Mon Sep 17 00:00:00 2001
+From: Justin Waters <justin.waters at timesys.com>
+Date: Mon, 22 Dec 2014 11:35:24 -0500
+Subject: [PATCH 1/7] rtc-rx8010: Add driver to kernel
+
+This is the rx810_k3.8-v1.3 version from the Epson support site:
+
+http://www5.epsondevice.com/en/quartz/tech/linux_for_rtc/software/rx8010_k3.8-v1.3.zip
+---
+ drivers/rtc/Kconfig | 8 +
+ drivers/rtc/Makefile | 1 +
+ drivers/rtc/rtc-rx8010.c | 965 +++++++++++++++++++++++++++++++++++++++++++++++
+ 3 files changed, 974 insertions(+)
+ create mode 100644 drivers/rtc/rtc-rx8010.c
+
+diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig
+index 0fe4ad8..0eaf003 100644
+--- a/drivers/rtc/Kconfig
++++ b/drivers/rtc/Kconfig
+@@ -551,6 +551,14 @@ config RTC_DRV_FM3130
+ This driver can also be built as a module. If so the module
+ will be called rtc-fm3130.
+
++config RTC_DRV_RX8010
++ tristate "Epson RX-8010SJ"
++ help
++ If you say yes here you will get support for the Epson RX-8010SJ.
++
++ This driver can also be built as a module. If so the module
++ will be called rtc-rx8010.
++
+ config RTC_DRV_RX8581
+ tristate "Epson RX-8581"
+ help
+diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile
+index 2b82e2b..1287436 100644
+--- a/drivers/rtc/Makefile
++++ b/drivers/rtc/Makefile
+@@ -123,6 +123,7 @@ obj-$(CONFIG_RTC_DRV_RS5C348) += rtc-rs5c348.o
+ obj-$(CONFIG_RTC_DRV_RS5C372) += rtc-rs5c372.o
+ obj-$(CONFIG_RTC_DRV_RV3029C2) += rtc-rv3029c2.o
+ obj-$(CONFIG_RTC_DRV_RX4581) += rtc-rx4581.o
++obj-$(CONFIG_RTC_DRV_RX8010) += rtc-rx8010.o
+ obj-$(CONFIG_RTC_DRV_RX8025) += rtc-rx8025.o
+ obj-$(CONFIG_RTC_DRV_RX8581) += rtc-rx8581.o
+ obj-$(CONFIG_RTC_DRV_S35390A) += rtc-s35390a.o
+diff --git a/drivers/rtc/rtc-rx8010.c b/drivers/rtc/rtc-rx8010.c
+new file mode 100644
+index 0000000..80f7506
+--- /dev/null
++++ b/drivers/rtc/rtc-rx8010.c
+@@ -0,0 +1,965 @@
++//======================================================================
++// Driver for the Epson RTC module RX-8010 SJ
++//
++// Copyright(C) SEIKO EPSON CORPORATION 2013. All rights reserved.
++//
++// Derived from RX-8025 driver:
++// Copyright (C) 2009 Wolfgang Grandegger <wg at grandegger.com>
++//
++// Copyright (C) 2005 by Digi International Inc.
++// All rights reserved.
++//
++// Modified by fengjh at rising.com.cn
++// <http://lists.lm-sensors.org/mailman/listinfo/lm-sensors>
++// 2006.11
++//
++// Code cleanup by Sergei Poselenov, <sposelenov at emcraft.com>
++// Converted to new style by Wolfgang Grandegger <wg at grandegger.com>
++// Alarm and periodic interrupt added by Dmitry Rakhchev <rda at emcraft.com>
++//
++//
++// This driver software is distributed as is, without any warranty of any kind,
++// either express or implied as further specified in the GNU Public License. This
++// software may be used and distributed according to the terms of the GNU Public
++// License, version 2 as published by the Free Software Foundation.
++// See the file COPYING in the main directory of this archive for more details.
++//
++// You should have received a copy of the GNU General Public License along with
++// this program. If not, see <http://www.gnu.org/licenses/>.
++//======================================================================
++
++#if 0
++#define DEBUG
++#include <linux/device.h>
++#undef DEBUG
++#endif
++
++#include <linux/kernel.h>
++#include <linux/module.h>
++#include <linux/slab.h>
++#include <linux/init.h>
++#include <linux/bcd.h>
++#include <linux/i2c.h>
++#include <linux/list.h>
++#include <linux/rtc.h>
++#include <linux/of_gpio.h>
++
++#include <linux/of.h>
++#include <linux/of_device.h>
++#include <linux/of_irq.h>
++#include <linux/interrupt.h>
++#include <linux/input.h>
++
++
++// RX-8010 Register definitions
++#define RX8010_REG_SEC 0x10
++#define RX8010_REG_MIN 0x11
++#define RX8010_REG_HOUR 0x12
++#define RX8010_REG_WDAY 0x13
++#define RX8010_REG_MDAY 0x14
++#define RX8010_REG_MONTH 0x15
++#define RX8010_REG_YEAR 0x16
++// 0x17 is reserved
++#define RX8010_REG_ALMIN 0x18
++#define RX8010_REG_ALHOUR 0x19
++#define RX8010_REG_ALWDAY 0x1A
++#define RX8010_REG_TCOUNT0 0x1B
++#define RX8010_REG_TCOUNT1 0x1C
++#define RX8010_REG_EXT 0x1D
++#define RX8010_REG_FLAG 0x1E
++#define RX8010_REG_CTRL 0x1F
++#define RX8010_REG_USER0 0x20
++#define RX8010_REG_USER1 0x21
++#define RX8010_REG_USER2 0x22
++#define RX8010_REG_USER3 0x23
++#define RX8010_REG_USER4 0x24
++#define RX8010_REG_USER5 0x25
++#define RX8010_REG_USER6 0x26
++#define RX8010_REG_USER7 0x27
++#define RX8010_REG_USER8 0x28
++#define RX8010_REG_USER9 0x29
++#define RX8010_REG_USERA 0x2A
++#define RX8010_REG_USERB 0x2B
++#define RX8010_REG_USERC 0x2C
++#define RX8010_REG_USERD 0x2D
++#define RX8010_REG_USERE 0x2E
++#define RX8010_REG_USERF 0x2F
++// 0x30 is reserved
++// 0x31 is reserved
++#define RX8010_REG_IRQ 0x32
++
++// Extension Register (1Dh) bit positions
++#define RX8010_BIT_EXT_TSEL (7 << 0)
++#define RX8010_BIT_EXT_WADA (1 << 3)
++#define RX8010_BIT_EXT_TE (1 << 4)
++#define RX8010_BIT_EXT_USEL (1 << 5)
++#define RX8010_BIT_EXT_FSEL (3 << 6)
++
++// Flag Register (1Eh) bit positions
++#define RX8010_BIT_FLAG_VLF (1 << 1)
++#define RX8010_BIT_FLAG_AF (1 << 3)
++#define RX8010_BIT_FLAG_TF (1 << 4)
++#define RX8010_BIT_FLAG_UF (1 << 5)
++
++// Control Register (1Fh) bit positions
++#define RX8010_BIT_CTRL_TSTP (1 << 2)
++#define RX8010_BIT_CTRL_AIE (1 << 3)
++#define RX8010_BIT_CTRL_TIE (1 << 4)
++#define RX8010_BIT_CTRL_UIE (1 << 5)
++#define RX8010_BIT_CTRL_STOP (1 << 6)
++#define RX8010_BIT_CTRL_TEST (1 << 7)
++
++
++static const struct i2c_device_id rx8010_id[] = {
++ { "rx8010", 0 },
++ { }
++};
++MODULE_DEVICE_TABLE(i2c, rx8010_id);
++
++struct rx8010_data {
++ struct i2c_client *client;
++ struct rtc_device *rtc;
++ struct work_struct work_1;
++ struct work_struct work_2;
++ u8 ctrlreg;
++ int irq_1;
++ int irq_2;
++ unsigned exiting:1;
++};
++
++typedef struct {
++ u8 number;
++ u8 value;
++}reg_data;
++
++#define SE_RTC_REG_READ _IOWR('p', 0x20, reg_data)
++#define SE_RTC_REG_WRITE _IOW('p', 0x21, reg_data)
++
++//----------------------------------------------------------------------
++// rx8010_read_reg()
++// reads a rx8010 register (see Register defines)
++// See also rx8010_read_regs() to read multiple registers.
++//
++//----------------------------------------------------------------------
++static int rx8010_read_reg(struct i2c_client *client, int number, u8 *value)
++{
++ int ret = i2c_smbus_read_byte_data(client, number) ;
++
++ //check for error
++ if (ret < 0) {
++ dev_err(&client->dev, "Unable to read register #%d\n", number);
++ return ret;
++ }
++
++ *value = ret;
++ return 0;
++}
++
++//----------------------------------------------------------------------
++// rx8010_read_regs()
++// reads a specified number of rx8010 registers (see Register defines)
++// See also rx8010_read_reg() to read single register.
++//
++//----------------------------------------------------------------------
++static int rx8010_read_regs(struct i2c_client *client, int number, u8 length, u8 *values)
++{
++ int ret = i2c_smbus_read_i2c_block_data(client, number, length, values);
++
++ //check for length error
++ if (ret != length) {
++ dev_err(&client->dev, "Unable to read registers #%d..#%d\n", number, number + length - 1);
++ return ret < 0 ? ret : -EIO;
++ }
++
++ return 0;
++}
++
++//----------------------------------------------------------------------
++// rx8010_write_reg()
++// writes a rx8010 register (see Register defines)
++// See also rx8010_write_regs() to write multiple registers.
++//
++//----------------------------------------------------------------------
++static int rx8010_write_reg(struct i2c_client *client, int number, u8 value)
++{
++ int ret = i2c_smbus_write_byte_data(client, number, value);
++
++ //check for error
++ if (ret)
++ dev_err(&client->dev, "Unable to write register #%d\n", number);
++
++ return ret;
++}
++
++//----------------------------------------------------------------------
++// rx8010_write_regs()
++// writes a specified number of rx8010 registers (see Register defines)
++// See also rx8010_write_reg() to write a single register.
++//
++//----------------------------------------------------------------------
++static int rx8010_write_regs(struct i2c_client *client, int number, u8 length, u8 *values)
++{
++ int ret = i2c_smbus_write_i2c_block_data(client, number, length, values);
++
++ //check for error
++ if (ret)
++ dev_err(&client->dev, "Unable to write registers #%d..#%d\n", number, number + length - 1);
++
++ return ret;
++}
++
++//----------------------------------------------------------------------
++// rx8010_irq_1()
++// irq handler
++//
++//----------------------------------------------------------------------
++static irqreturn_t rx8010_irq_1(int irq, void *dev_id)
++{
++ struct i2c_client *client = dev_id;
++ struct rx8010_data *rx8010 = i2c_get_clientdata(client);
++
++ disable_irq_nosync(irq);
++ schedule_work(&rx8010->work_1);
++
++
++ return IRQ_HANDLED;
++}
++
++//----------------------------------------------------------------------
++// rx8010_work_1()
++//
++//----------------------------------------------------------------------
++static void rx8010_work_1(struct work_struct *work)
++{
++ struct rx8010_data *rx8010 = container_of(work, struct rx8010_data, work_1);
++ struct i2c_client *client = rx8010->client;
++ struct mutex *lock = &rx8010->rtc->ops_lock;
++ u8 status;
++
++ mutex_lock(lock);
++
++ if (rx8010_read_reg(client, RX8010_REG_FLAG, &status))
++ goto out;
++
++ // check VLF
++ if ((status & RX8010_BIT_FLAG_VLF))
++ dev_warn(&client->dev, "Frequency stop was detected, probably due to a supply voltage drop\n");
++
++ dev_dbg(&client->dev, "%s: RX8010_REG_FLAG: %xh\n", __func__, status);
++
++ // periodic "fixed-cycle" timer
++ if (status & RX8010_BIT_FLAG_TF) {
++ status &= ~RX8010_BIT_FLAG_TF;
++ local_irq_disable();
++ rtc_update_irq(rx8010->rtc, 1, RTC_PF | RTC_IRQF);
++ local_irq_enable();
++ }
++
++ // alarm function
++ if (status & RX8010_BIT_FLAG_AF) {
++ status &= ~RX8010_BIT_FLAG_AF;
++ local_irq_disable();
++ rtc_update_irq(rx8010->rtc, 1, RTC_AF | RTC_IRQF);
++ local_irq_enable();
++ }
++
++ // time update function
++ if (status & RX8010_BIT_FLAG_UF) {
++ status &= ~RX8010_BIT_FLAG_UF;
++ local_irq_disable();
++ rtc_update_irq(rx8010->rtc, 1, RTC_UF | RTC_IRQF);
++ local_irq_enable();
++ }
++
++ // acknowledge IRQ (clear flags)
++ rx8010_write_reg(client, RX8010_REG_FLAG, status);
++
++out:
++ if (!rx8010->exiting)
++ {
++ if (rx8010->irq_1 > 0)
++ enable_irq(rx8010->irq_1);
++ else
++ enable_irq(client->irq);
++ }
++
++ mutex_unlock(lock);
++}
++
++//----------------------------------------------------------------------
++// rx8010_irq_2()
++// irq handler
++//
++//----------------------------------------------------------------------
++static irqreturn_t rx8010_irq_2(int irq, void *dev_id)
++{
++ struct i2c_client *client = dev_id;
++ struct rx8010_data *rx8010 = i2c_get_clientdata(client);
++
++ disable_irq_nosync(irq);
++ schedule_work(&rx8010->work_2);
++
++
++ return IRQ_HANDLED;
++}
++
++//----------------------------------------------------------------------
++// rx8010_work_2()
++//
++//----------------------------------------------------------------------
++static void rx8010_work_2(struct work_struct *work)
++{
++ struct rx8010_data *rx8010 = container_of(work, struct rx8010_data, work_2);
++ struct i2c_client *client = rx8010->client;
++ struct mutex *lock = &rx8010->rtc->ops_lock;
++ u8 status;
++
++ mutex_lock(lock);
++
++ if (rx8010_read_reg(client, RX8010_REG_FLAG, &status))
++ goto out;
++
++ // check VLF
++ if ((status & RX8010_BIT_FLAG_VLF))
++ dev_warn(&client->dev, "Frequency stop was detected, \
++ probably due to a supply voltage drop\n");
++
++ dev_dbg(&client->dev, "%s: RX8010_REG_FLAG: %xh\n", __func__, status);
++
++ // periodic "fixed-cycle" timer
++ if (status & RX8010_BIT_FLAG_TF) {
++ status &= ~RX8010_BIT_FLAG_TF;
++ local_irq_disable();
++ rtc_update_irq(rx8010->rtc, 1, RTC_PF | RTC_IRQF);
++ local_irq_enable();
++ }
++
++ // acknowledge IRQ (clear flags)
++ rx8010_write_reg(client, RX8010_REG_FLAG, status);
++
++out:
++ if (!rx8010->exiting)
++ {
++ if (rx8010->irq_2 > 0)
++ enable_irq(rx8010->irq_2);
++ else
++ enable_irq(client->irq);
++ }
++
++ mutex_unlock(lock);
++}
++
++//----------------------------------------------------------------------
++// rx8010_get_time()
++// gets the current time from the rx8010 registers
++//
++//----------------------------------------------------------------------
++static int rx8010_get_time(struct device *dev, struct rtc_time *dt)
++{
++ struct rx8010_data *rx8010 = dev_get_drvdata(dev);
++ u8 date[7];
++ int err;
++
++ err = rx8010_read_regs(rx8010->client, RX8010_REG_SEC, 7, date);
++ if (err)
++ return err;
++
++ dev_dbg(dev, "%s: read 0x%02x 0x%02x "
++ "0x%02x 0x%02x 0x%02x 0x%02x 0x%02x\n", __func__,
++ date[0], date[1], date[2], date[3], date[4], date[5], date[6]);
++
++ //Note: need to subtract 0x10 for index as register offset starts at 0x10
++ dt->tm_sec = bcd2bin(date[RX8010_REG_SEC-0x10] & 0x7f);
++ dt->tm_min = bcd2bin(date[RX8010_REG_MIN-0x10] & 0x7f);
++ dt->tm_hour = bcd2bin(date[RX8010_REG_HOUR-0x10] & 0x3f); //only 24-hour clock
++ dt->tm_mday = bcd2bin(date[RX8010_REG_MDAY-0x10] & 0x3f);
++ dt->tm_mon = bcd2bin(date[RX8010_REG_MONTH-0x10] & 0x1f) - 1;
++ dt->tm_year = bcd2bin(date[RX8010_REG_YEAR-0x10]);
++ dt->tm_wday = bcd2bin(date[RX8010_REG_WDAY-0x10] & 0x7f);
++
++ if (dt->tm_year < 70)
++ dt->tm_year += 100;
++
++ dev_dbg(dev, "%s: date %ds %dm %dh %dmd %dm %dy\n", __func__,
++ dt->tm_sec, dt->tm_min, dt->tm_hour,
++ dt->tm_mday, dt->tm_mon, dt->tm_year);
++
++ return rtc_valid_tm(dt);
++}
++
++//----------------------------------------------------------------------
++// rx8010_set_time()
++// Sets the current time in the rx8010 registers
++//
++// BUG: The HW assumes every year that is a multiple of 4 to be a leap
++// year. Next time this is wrong is 2100, which will not be a leap year
++//
++// Note: If STOP is not set/cleared, the clock will start when the seconds
++// register is written
++//
++//----------------------------------------------------------------------
++static int rx8010_set_time(struct device *dev, struct rtc_time *dt)
++{
++ struct rx8010_data *rx8010 = dev_get_drvdata(dev);
++ u8 date[7];
++ u8 ctrl;
++ int ret;
++
++ //set STOP bit before changing clock/calendar
++ rx8010_read_reg(rx8010->client, RX8010_REG_CTRL, &ctrl);
++ rx8010->ctrlreg = ctrl | RX8010_BIT_CTRL_STOP;
++ rx8010_write_reg(rx8010->client, RX8010_REG_CTRL, rx8010->ctrlreg);
++
++ //Note: need to subtract 0x10 for index as register offset starts at 0x10
++ date[RX8010_REG_SEC-0x10] = bin2bcd(dt->tm_sec);
++ date[RX8010_REG_MIN-0x10] = bin2bcd(dt->tm_min);
++ date[RX8010_REG_HOUR-0x10] = bin2bcd(dt->tm_hour); //only 24hr time
++
++ date[RX8010_REG_MDAY-0x10] = bin2bcd(dt->tm_mday);
++ date[RX8010_REG_MONTH-0x10] = bin2bcd(dt->tm_mon + 1);
++ date[RX8010_REG_YEAR-0x10] = bin2bcd(dt->tm_year % 100);
++ date[RX8010_REG_WDAY-0x10] = bin2bcd(dt->tm_wday);
++
++ dev_dbg(dev, "%s: write 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x\n",
++ __func__, date[0], date[1], date[2], date[3], date[4], date[5], date[6]);
++
++ ret = rx8010_write_regs(rx8010->client, RX8010_REG_SEC, 7, date);
++
++ //clear STOP bit after changing clock/calendar
++ rx8010_read_reg(rx8010->client, RX8010_REG_CTRL, &ctrl);
++ rx8010->ctrlreg = ctrl & ~RX8010_BIT_CTRL_STOP;
++ rx8010_write_reg(rx8010->client, RX8010_REG_CTRL, rx8010->ctrlreg);
++
++ return ret;
++}
++
++//----------------------------------------------------------------------
++// rx8010_init_client()
++// initializes the rx8010
++//
++//----------------------------------------------------------------------
++static int rx8010_init_client(struct i2c_client *client, int *need_reset)
++{
++ struct rx8010_data *rx8010 = i2c_get_clientdata(client);
++ u8 ctrl[3];
++ int need_clear = 0;
++ int err;
++
++ //set reserved register 0x17 with specified value of 0xD8
++ err = rx8010_write_reg(client, 0x17, 0xD8);
++ if (err)
++ goto out;
++
++ //set reserved register 0x30 with specified value of 0x00
++ err = rx8010_write_reg(client, 0x30, 0x00);
++ if (err)
++ goto out;
++
++ //set reserved register 0x31 with specified value of 0x08
++ err = rx8010_write_reg(client, 0x31, 0x08);
++ if (err)
++ goto out;
++
++ //set reserved register 0x32 with default value
++ err = rx8010_write_reg(client, RX8010_REG_IRQ, 0x00);
++ if (err)
++ goto out;
++
++
++ //get current extension, flag, control register values
++ err = rx8010_read_regs(rx8010->client, RX8010_REG_EXT, 3, ctrl);
++ if (err)
++ goto out;
++
++ //check for VLF Flag (set at power-on)
++ if ((ctrl[1] & RX8010_BIT_FLAG_VLF)) {
++ dev_warn(&client->dev, "Frequency stop was detected, probably due to a supply voltage drop\n");
++ *need_reset = 1;
++ }
++
++ //check for Alarm Flag
++ if (ctrl[1] & RX8010_BIT_FLAG_AF) {
++ dev_warn(&client->dev, "Alarm was detected\n");
++ need_clear = 1;
++ }
++
++ //check for Periodic Timer Flag
++ if (ctrl[1] & RX8010_BIT_FLAG_TF) {
++ dev_warn(&client->dev, "Periodic timer was detected\n");
++ need_clear = 1;
++ }
++
++ //check for Update Timer Flag
++ if (ctrl[1] & RX8010_BIT_FLAG_UF) {
++ dev_warn(&client->dev, "Update timer was detected\n");
++ need_clear = 1;
++ }
++
++ //reset or clear needed?
++ if (*need_reset) {
++ //clear 1d, 1e, 1f registers
++ ctrl[0] = ctrl[1] = ctrl[2] = 0;
++ err = rx8010_write_regs(client, RX8010_REG_EXT, 3, ctrl);
++ if (err)
++ goto out;
++ }
++ else if(need_clear){
++ //clear flag register
++ err = rx8010_write_reg(client, RX8010_REG_FLAG, 0x00);
++ if (err)
++ goto out;
++ }
++
++ //set "test bit" and reserved bits of control register zero
++ rx8010->ctrlreg = (ctrl[2] & ~RX8010_BIT_CTRL_TEST);
++out:
++ return err;
++}
++
++//----------------------------------------------------------------------
++// rx8010_read_alarm()
++// reads current Alarm
++//
++// Notes: - currently filters the AE bits (bit 7)
++// - assumes WADA setting is week (week/day)
++//----------------------------------------------------------------------
++static int rx8010_read_alarm(struct device *dev, struct rtc_wkalrm *t)
++{
++ struct rx8010_data *rx8010 = dev_get_drvdata(dev);
++ struct i2c_client *client = rx8010->client;
++ u8 alarmvals[3]; //minute, hour, week/day values
++ u8 ctrl[3]; //extension, flag, control values
++ int err;
++
++ if (client->irq <= 0)
++ return -EINVAL;
++
++ //get current minute, hour, week/day alarm values
++ err = rx8010_read_regs(client, RX8010_REG_ALMIN, 3, alarmvals);
++ if (err)
++ return err;
++ dev_dbg(dev, "%s: minutes:0x%02x hours:0x%02x week/day:0x%02x\n",
++ __func__, alarmvals[0], alarmvals[1], alarmvals[2]);
++
++
++ //get current extension, flag, control register values
++ err = rx8010_read_regs(client, RX8010_REG_EXT, 3, ctrl);
++ if (err)
++ return err;
++ dev_dbg(dev, "%s: extension:0x%02x flag:0x%02x control:0x%02x \n",
++ __func__, ctrl[0], ctrl[1], ctrl[2]);
++
++ // Hardware alarm precision is 1 minute
++ t->time.tm_sec = 0;
++ t->time.tm_min = bcd2bin(alarmvals[0] & 0x7f); //0x7f filters AE bit currently
++ t->time.tm_hour = bcd2bin(alarmvals[1] & 0x3f); //0x3f filters AE bit currently, also 24hr only
++
++ t->time.tm_wday = -1;
++ t->time.tm_mday = -1;
++ t->time.tm_mon = -1;
++ t->time.tm_year = -1;
++
++ dev_dbg(dev, "%s: date: %ds %dm %dh %dmd %dm %dy\n",
++ __func__,
++ t->time.tm_sec, t->time.tm_min, t->time.tm_hour,
++ t->time.tm_mday, t->time.tm_mon, t->time.tm_year);
++
++ t->enabled = !!(rx8010->ctrlreg & RX8010_BIT_CTRL_AIE); //check if interrupt is enabled
++ t->pending = (ctrl[1] & RX8010_BIT_FLAG_AF) && t->enabled; //check if flag is triggered
++
++ return err;
++}
++
++//----------------------------------------------------------------------
++// rx8010_set_alarm()
++// sets Alarm
++//
++// Notes: - currently filters the AE bits (bit 7)
++// - assumes WADA setting is week (week/day)
++//----------------------------------------------------------------------
++static int rx8010_set_alarm(struct device *dev, struct rtc_wkalrm *t)
++{
++ struct i2c_client *client = to_i2c_client(dev);
++ struct rx8010_data *rx8010 = dev_get_drvdata(dev);
++ u8 alarmvals[3]; //minute, hour, day
++ u8 extreg; //extension register
++ u8 flagreg; //flag register
++ int err;
++
++ if (client->irq <= 0)
++ return -EINVAL;
++
++ //get current extension register
++ err = rx8010_read_reg(client, RX8010_REG_EXT, &extreg);
++ if (err <0)
++ return err;
++
++ //get current flag register
++ err = rx8010_read_reg(client, RX8010_REG_FLAG, &flagreg);
++ if (err <0)
++ return err;
++
++ // Hardware alarm precision is 1 minute
++ alarmvals[0] = bin2bcd(t->time.tm_min);
++ alarmvals[1] = bin2bcd(t->time.tm_hour);
++ alarmvals[2] = bin2bcd(t->time.tm_mday);
++ dev_dbg(dev, "%s: write 0x%02x 0x%02x 0x%02x\n", __func__, alarmvals[0], alarmvals[1], alarmvals[2]);
++
++ //check interrupt enable and disable
++ if (rx8010->ctrlreg & RX8010_BIT_CTRL_AIE) {
++ rx8010->ctrlreg &= ~RX8010_BIT_CTRL_AIE;
++ err = rx8010_write_reg(rx8010->client, RX8010_REG_CTRL, rx8010->ctrlreg);
++ if (err)
++ return err;
++ }
++
++ //write the new minute and hour values
++ //Note:assume minute and hour values will be enabled. Bit 7 of each of the
++ // minute, hour, week/day register can be set which will "disable" the
++ // register from triggering an alarm. See the RX8010 spec for more information
++ err = rx8010_write_regs(rx8010->client, RX8010_REG_ALMIN, 2, alarmvals);
++ if (err)
++ return err;
++
++ //set Week/Day bit
++ // Week setting is typically not used, so we will assume "day" setting
++ extreg |= RX8010_BIT_EXT_WADA; //set to "day of month"
++ err = rx8010_write_reg(rx8010->client, RX8010_REG_EXT, extreg);
++ if (err)
++ return err;
++
++ //set Day of Month register
++ if (alarmvals[2] == 0) {
++ alarmvals[2] |= 0x80; //turn on AE bit to ignore day of month (no zero day)
++ err = rx8010_write_reg(rx8010->client, RX8010_REG_ALWDAY, alarmvals[2]);
++ }
++ else {
++ err = rx8010_write_reg(rx8010->client, RX8010_REG_ALWDAY, alarmvals[2]);
++ }
++ if (err)
++ return err;
++
++ //clear Alarm Flag
++ flagreg &= ~RX8010_BIT_FLAG_AF;
++ err = rx8010_write_reg(rx8010->client, RX8010_REG_FLAG, flagreg);
++ if (err)
++ return err;
++
++ //re-enable interrupt if required
++ if (t->enabled) {
++
++ if ( rx8010->rtc->uie_rtctimer.enabled )
++ rx8010->ctrlreg |= RX8010_BIT_CTRL_UIE; //set update interrupt enable
++ if ( rx8010->rtc->aie_timer.enabled )
++ rx8010->ctrlreg |= (RX8010_BIT_CTRL_AIE | RX8010_BIT_CTRL_UIE); //set alarm interrupt enable
++
++ err = rx8010_write_reg(rx8010->client, RX8010_REG_CTRL, rx8010->ctrlreg);
++ if (err)
++ return err;
++ }
++
++ return 0;
++}
++
++//----------------------------------------------------------------------
++// rx8010_alarm_irq_enable()
++// sets enables Alarm IRQ
++//
++// Todo: -
++//
++//----------------------------------------------------------------------
++static int rx8010_alarm_irq_enable(struct device *dev, unsigned int enabled)
++{
++ struct i2c_client *client = to_i2c_client(dev);
++ struct rx8010_data *rx8010 = dev_get_drvdata(dev);
++ u8 flagreg;
++ u8 ctrl;
++ int err;
++
++ //get the current ctrl settings
++ ctrl = rx8010->ctrlreg;
++
++ if (enabled)
++ {
++ if ( rx8010->rtc->uie_rtctimer.enabled )
++ ctrl |= RX8010_BIT_CTRL_UIE; //set update interrupt enable
++ if ( rx8010->rtc->aie_timer.enabled )
++ ctrl |= (RX8010_BIT_CTRL_AIE | RX8010_BIT_CTRL_UIE); //set alarm interrupt enable
++ }
++ else
++ {
++ if ( ! rx8010->rtc->uie_rtctimer.enabled )
++ ctrl &= ~RX8010_BIT_CTRL_UIE; //clear update interrupt enable
++ if ( ! rx8010->rtc->aie_timer.enabled )
++ {
++ if ( rx8010->rtc->uie_rtctimer.enabled )
++ ctrl &= ~RX8010_BIT_CTRL_AIE;
++ else
++ ctrl &= ~(RX8010_BIT_CTRL_AIE | RX8010_BIT_CTRL_UIE); //clear alarm interrupt enable
++ }
++ }
++
++ //clear alarm flag
++ err = rx8010_read_reg(client, RX8010_REG_FLAG, &flagreg);
++ if (err <0)
++ return err;
++ flagreg &= ~RX8010_BIT_FLAG_AF;
++ err = rx8010_write_reg(rx8010->client, RX8010_REG_FLAG, flagreg);
++ if (err)
++ return err;
++
++ //update the Control register if the setting changed
++ if (ctrl != rx8010->ctrlreg) {
++ rx8010->ctrlreg = ctrl;
++ err = rx8010_write_reg(rx8010->client, RX8010_REG_CTRL, rx8010->ctrlreg);
++ if (err)
++ return err;
++ }
++
++ return 0;
++}
++
++//---------------------------------------------------------------------------
++// rx8010_ioctl()
++//
++//---------------------------------------------------------------------------
++static int rx8010_ioctl(struct device *dev, unsigned int cmd, unsigned long arg)
++{
++ struct i2c_client *client = to_i2c_client(dev);
++ //struct rx8010_data *rx8010 = dev_get_drvdata(dev);
++ //struct mutex *lock = &rx8010->rtc->ops_lock;
++ int ret = 0;
++ int tmp;
++ void __user *argp = (void __user *)arg;
++ reg_data reg;
++
++ dev_dbg(dev, "%s: cmd=%x\n", __func__, cmd);
++
++ switch (cmd) {
++ case SE_RTC_REG_READ:
++ if (copy_from_user(®, argp, sizeof(reg)))
++ return -EFAULT;
++ if ( reg.number < RX8010_REG_SEC || reg.number > RX8010_REG_IRQ )
++ return -EFAULT;
++ //mutex_lock(lock);
++ ret = rx8010_read_reg(client, reg.number, ®.value);
++ //mutex_unlock(lock);
++ if (! ret )
++ return copy_to_user(argp, ®, sizeof(reg)) ? -EFAULT : 0;
++ break;
++
++ case SE_RTC_REG_WRITE:
++ if (copy_from_user(®, argp, sizeof(reg)))
++ return -EFAULT;
++ if ( reg.number < RX8010_REG_SEC || reg.number > RX8010_REG_IRQ )
++ return -EFAULT;
++ //mutex_lock(lock);
++ ret = rx8010_write_reg(client, reg.number, reg.value);
++ //mutex_unlock(lock);
++ break;
++
++ case RTC_VL_READ:
++ //mutex_lock(lock);
++ ret = rx8010_read_reg(client, RX8010_REG_FLAG, ®.value);
++ //mutex_unlock(lock);
++ if (! ret)
++ {
++ tmp = !!(reg.value & RX8010_BIT_FLAG_VLF);
++ return copy_to_user(argp, &tmp, sizeof(tmp)) ? -EFAULT : 0;
++ }
++ break;
++
++ case RTC_VL_CLR:
++ //mutex_lock(lock);
++ ret = rx8010_read_reg(client, RX8010_REG_FLAG, ®.value);
++ if (! ret)
++ {
++ reg.value &= ~RX8010_BIT_FLAG_VLF;
++ ret = rx8010_write_reg(client, RX8010_REG_FLAG, reg.value);
++ }
++ //mutex_unlock(lock);
++ break;
++
++ default:
++ return -ENOIOCTLCMD;
++ }
++
++ return ret;
++}
++
++static struct rtc_class_ops rx8010_rtc_ops = {
++ .read_time = rx8010_get_time,
++ .set_time = rx8010_set_time,
++ .read_alarm = rx8010_read_alarm,
++ .set_alarm = rx8010_set_alarm,
++ .alarm_irq_enable = rx8010_alarm_irq_enable,
++ .ioctl = rx8010_ioctl,
++};
++
++//----------------------------------------------------------------------
++// rx8010_probe()
++// probe routine for the rx8010 driver
++//
++//----------------------------------------------------------------------
++static int rx8010_probe(struct i2c_client *client, const struct i2c_device_id *id)
++{
++ struct device_node *np = client->dev.of_node;
++ struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent);
++ struct rx8010_data *rx8010;
++ int err, gpio, i, irqs_success = 0, need_reset = 0;
++ const char * irq_name[2] = {"rx8010-irq_1", "rx8010-irq_2"};
++
++ if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_I2C_BLOCK)) {
++ dev_err(&adapter->dev, "doesn't support required functionality\n");
++ err = -EIO;
++ goto errout;
++ }
++
++ rx8010 = devm_kzalloc(&client->dev, sizeof(struct rx8010_data), GFP_KERNEL);
++ if (!rx8010) {
++ dev_err(&adapter->dev, "failed to alloc memory\n");
++ err = -ENOMEM;
++ goto errout;
++ }
++
++ rx8010->client = client;
++ i2c_set_clientdata(client, rx8010);
++
++ err = rx8010_init_client(client, &need_reset);
++ if (err)
++ goto errout;
++
++
++ if (need_reset) {
++ struct rtc_time tm;
++ rtc_time_to_tm(0, &tm); // set to 1970/1/1
++ rx8010_set_time(&client->dev, &tm);
++ dev_warn(&client->dev, " - time reset to 1970/1/1\n");
++ }
++
++ rx8010->rtc = rtc_device_register(client->name, &client->dev, &rx8010_rtc_ops, THIS_MODULE);
++
++ if (IS_ERR(rx8010->rtc)) {
++ err = PTR_ERR(rx8010->rtc);
++ dev_err(&client->dev, "unable to register the class device\n");
++ goto errout;
++ }
++
++ // get interrupts
++ rx8010->irq_1 = rx8010->irq_2 = -1;
++ for ( i=0; i < 2; i++ )
++ {
++ gpio = of_get_named_gpio(np, irq_name[i], 0);
++ if (gpio_is_valid(gpio)) {
++ int irq;
++ err = devm_gpio_request_one(&client->dev, gpio, GPIOF_DIR_IN,
++ irq_name[i]);
++ if (err) {
++ dev_err(&client->dev, "cannot request %s\n", irq_name[i]);
++ goto errout_reg;
++ }
++ irq = gpio_to_irq(gpio);
++ dev_dbg(&client->dev, "%s %d\n", irq_name[i], irq);
++ if (irq <= 0) {
++ dev_warn(&client->dev, "Failed to "
++ "convert gpio #%d to %s\n",
++ gpio, irq_name[i]);
++ goto errout_reg;
++ }
++ err = devm_request_threaded_irq(&client->dev,irq, NULL,
++ i==0 ? rx8010_irq_1 : rx8010_irq_2,
++ IRQF_TRIGGER_LOW | IRQF_ONESHOT,
++ irq_name[i],
++ client);
++ if (err) {
++ dev_err(&client->dev, "unable to request %s\n", irq_name[i]);
++ goto errout_reg;
++ }
++ if (i == 0)
++ {
++ rx8010->irq_1 = irq;
++ INIT_WORK(&rx8010->work_1, rx8010_work_1);
++ }
++ else
++ {
++ rx8010->irq_2 = irq;
++ INIT_WORK(&rx8010->work_2, rx8010_work_2);
++ }
++ irqs_success++;
++ } else {
++ dev_warn(&client->dev, "%s missing or invalid\n",
++ irq_name[i]);
++ }
++ }
++
++ // another irq request try if one failed above
++ if ( ! irqs_success && client->irq > 0 ){
++ dev_info(&client->dev, "IRQ %d supplied\n", client->irq);
++ err = devm_request_threaded_irq(&client->dev,client->irq, NULL,
++ rx8010_irq_1,
++ IRQF_TRIGGER_LOW | IRQF_ONESHOT,
++ "rx8010", client);
++
++ if (err) {
++ dev_err(&client->dev, "unable to request IRQ\n");
++ goto errout_reg;
++ }
++ INIT_WORK(&rx8010->work_1, rx8010_work_1);
++ }
++
++
++ rx8010->rtc->irq_freq = 1;
++ rx8010->rtc->max_user_freq = 1;
++
++ return 0;
++
++errout_reg:
++ rtc_device_unregister(rx8010->rtc);
++
++errout:
++ dev_err(&adapter->dev, "probing for rx8010 failed\n");
++ return err;
++}
++
++//----------------------------------------------------------------------
++// rx8010_remove()
++// remove routine for the rx8010 driver
++//
++//----------------------------------------------------------------------
++static int rx8010_remove(struct i2c_client *client)
++{
++ struct rx8010_data *rx8010 = i2c_get_clientdata(client);
++ struct mutex *lock = &rx8010->rtc->ops_lock;
++
++ if (client->irq > 0 || rx8010->irq_1 > 0 || rx8010->irq_2 > 0) {
++ mutex_lock(lock);
++ rx8010->exiting = 1;
++ mutex_unlock(lock);
++
++ //cancel_work
++ if (rx8010->irq_1 > 0 || client->irq > 0)
++ cancel_work_sync(&rx8010->work_1);
++ if (rx8010->irq_2 > 0)
++ cancel_work_sync(&rx8010->work_2);
++ }
++
++ rtc_device_unregister(rx8010->rtc);
++
++ return 0;
++}
++
++static struct i2c_driver rx8010_driver = {
++ .driver = {
++ .name = "rtc-rx8010",
++ .owner = THIS_MODULE,
++ },
++ .probe = rx8010_probe,
++ .remove = rx8010_remove,
++ .id_table = rx8010_id,
++};
++
++module_i2c_driver(rx8010_driver);
++
++MODULE_AUTHOR("Dennis Henderson <henderson.dennis at erd.epson.com>");
++MODULE_DESCRIPTION("RX-8010 SJ RTC driver");
++MODULE_LICENSE("GPL");
+--
+2.8.1
+
diff --git a/recipes-kernel/linux/linux-advantech-4.1/0002-ahci_imx-Make-receive-DPLL-mode-configurable.patch b/recipes-kernel/linux/linux-advantech-4.1/0002-ahci_imx-Make-receive-DPLL-mode-configurable.patch
new file mode 100644
index 0000000..1557e68
--- /dev/null
+++ b/recipes-kernel/linux/linux-advantech-4.1/0002-ahci_imx-Make-receive-DPLL-mode-configurable.patch
@@ -0,0 +1,50 @@
+From 6f2dae2ee19cfc972335511053a5b94cc30879f7 Mon Sep 17 00:00:00 2001
+From: Justin Waters <justin.waters at timesys.com>
+Date: Wed, 2 Mar 2016 11:47:13 -0500
+Subject: [PATCH 2/7] ahci_imx: Make receive DPLL mode configurable
+
+---
+ drivers/ata/ahci_imx.c | 13 ++++++++++++-
+ 1 file changed, 12 insertions(+), 1 deletion(-)
+
+diff --git a/drivers/ata/ahci_imx.c b/drivers/ata/ahci_imx.c
+index 3fccbed..4a91fe3 100644
+--- a/drivers/ata/ahci_imx.c
++++ b/drivers/ata/ahci_imx.c
+@@ -472,6 +472,13 @@ static const struct reg_value gpr13_rx_eq[] = {
+ { 4000, IMX6Q_GPR13_SATA_RX_EQ_VAL_4_0_DB },
+ };
+
++static const struct reg_value gpr13_rx_dpll[] = {
++ { 0, IMX6Q_GPR13_SATA_RX_DPLL_MODE_1P_1F },
++ { 1, IMX6Q_GPR13_SATA_RX_DPLL_MODE_2P_2F },
++ { 2, IMX6Q_GPR13_SATA_RX_DPLL_MODE_1P_4F },
++ { 3, IMX6Q_GPR13_SATA_RX_DPLL_MODE_2P_4F },
++};
++
+ static const struct reg_property gpr13_props[] = {
+ {
+ .name = "fsl,transmit-level-mV",
+@@ -497,6 +504,11 @@ static const struct reg_property gpr13_props[] = {
+ .name = "fsl,no-spread-spectrum",
+ .def_value = IMX6Q_GPR13_SATA_MPLL_SS_EN,
+ .set_value = 0,
++ }, {
++ .name = "fsl,receive-dpll-mode",
++ .values = gpr13_rx_dpll,
++ .num_values = ARRAY_SIZE(gpr13_rx_dpll),
++ .def_value = IMX6Q_GPR13_SATA_RX_DPLL_MODE_2P_4F,
+ },
+ };
+
+@@ -604,7 +616,6 @@ static int imx_ahci_probe(struct platform_device *pdev)
+
+ imxpriv->phy_params =
+ IMX6Q_GPR13_SATA_RX_LOS_LVL_SATA2M |
+- IMX6Q_GPR13_SATA_RX_DPLL_MODE_2P_4F |
+ IMX6Q_GPR13_SATA_SPD_MODE_3P0G |
+ reg_value;
+ }
+--
+2.8.1
+
diff --git a/recipes-kernel/linux/linux-advantech-4.1/0003-PCI-imx6-Add-DT-bindings-to-configure-PHY-Tx-driver-.patch b/recipes-kernel/linux/linux-advantech-4.1/0003-PCI-imx6-Add-DT-bindings-to-configure-PHY-Tx-driver-.patch
new file mode 100644
index 0000000..147b736
--- /dev/null
+++ b/recipes-kernel/linux/linux-advantech-4.1/0003-PCI-imx6-Add-DT-bindings-to-configure-PHY-Tx-driver-.patch
@@ -0,0 +1,112 @@
+From 03857322243162663a3b760c92b3fab837ba9820 Mon Sep 17 00:00:00 2001
+From: Justin Waters <justin.waters at timesys.com>
+Date: Fri, 15 Jan 2016 10:24:35 -0500
+Subject: [PATCH 3/7] PCI: imx6: Add DT bindings to configure PHY Tx driver
+ settings
+
+The settings in GPR8 are dependent upon the particular layout of the
+hardware platform. As such, they should be configurable via the device
+tree.
+
+Look up PHY Tx driver settings from the device tree. Fall back to the
+original hard-coded values if they are not specified in the device tree.
+
+Signed-off-by: Justin Waters <justin.waters at timesys.com>
+Signed-off-by: Bjorn Helgaas <bhelgaas at google.com>
+Acked-by: Lucas Stach <l.stach at pengutronix.de>
+---
+ .../devicetree/bindings/pci/fsl,imx6q-pcie.txt | 7 ++++
+ drivers/pci/host/pci-imx6.c | 41 +++++++++++++++++++---
+ 2 files changed, 43 insertions(+), 5 deletions(-)
+
+diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt
+index 6fbba53..97f863e 100644
+--- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt
++++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt
+@@ -13,6 +13,13 @@ Required properties:
+ - clock-names: Must include the following additional entries:
+ - "pcie_phy"
+
++Optional properties:
++- fsl,tx-deemph-gen1: Gen1 De-emphasis value. Default: 20
++- fsl,tx-deemph-gen2-3p5db: Gen2 (3.5db) De-emphasis value. Default: 20
++- fsl,tx-deemph-gen2-6db: Gen2 (6db) De-emphasis value. Default: 20
++- fsl,tx-swing-full: Gen2 TX SWING FULL value. Default: 115
++- fsl,tx-swing-low: TX launch amplitude swing_low value. Default: 115
++
+ Example:
+
+ pcie at 0x01000000 {
+diff --git a/drivers/pci/host/pci-imx6.c b/drivers/pci/host/pci-imx6.c
+index 75f15ce..3bec59a 100644
+--- a/drivers/pci/host/pci-imx6.c
++++ b/drivers/pci/host/pci-imx6.c
+@@ -59,6 +59,11 @@ struct imx6_pcie {
+ struct regmap *reg_src;
+ void __iomem *mem_base;
+ struct regulator *pcie_phy_regulator;
++ u32 tx_deemph_gen1;
++ u32 tx_deemph_gen2_3p5db;
++ u32 tx_deemph_gen2_6db;
++ u32 tx_swing_full;
++ u32 tx_swing_low;
+ };
+
+ /* PCIe Root Complex registers (memory-mapped) */
+@@ -477,15 +482,20 @@ static void imx6_pcie_init_phy(struct pcie_port *pp)
+ IMX6Q_GPR12_LOS_LEVEL, IMX6Q_GPR12_LOS_LEVEL_9);
+
+ regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR8,
+- IMX6Q_GPR8_TX_DEEMPH_GEN1, 0 << 0);
++ IMX6Q_GPR8_TX_DEEMPH_GEN1,
++ imx6_pcie->tx_deemph_gen1 << 0);
+ regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR8,
+- IMX6Q_GPR8_TX_DEEMPH_GEN2_3P5DB, 0 << 6);
++ IMX6Q_GPR8_TX_DEEMPH_GEN2_3P5DB,
++ imx6_pcie->tx_deemph_gen2_3p5db << 6);
+ regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR8,
+- IMX6Q_GPR8_TX_DEEMPH_GEN2_6DB, 20 << 12);
++ IMX6Q_GPR8_TX_DEEMPH_GEN2_6DB,
++ imx6_pcie->tx_deemph_gen2_6db << 12);
+ regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR8,
+- IMX6Q_GPR8_TX_SWING_FULL, 127 << 18);
++ IMX6Q_GPR8_TX_SWING_FULL,
++ imx6_pcie->tx_swing_full << 18);
+ regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR8,
+- IMX6Q_GPR8_TX_SWING_LOW, 127 << 25);
++ IMX6Q_GPR8_TX_SWING_LOW,
++ imx6_pcie->tx_swing_low << 25);
+ }
+
+ /* configure the device type */
+@@ -1212,6 +1222,27 @@ static int __init imx6_pcie_probe(struct platform_device *pdev)
+ return PTR_ERR(imx6_pcie->iomuxc_gpr);
+ }
+
++ /* Grab PCIe PHY Tx Settings */
++ if (of_property_read_u32(np, "fsl,tx-deemph-gen1",
++ &imx6_pcie->tx_deemph_gen1))
++ imx6_pcie->tx_deemph_gen1 = 20;
++
++ if (of_property_read_u32(np, "fsl,tx-deemph-gen2-3p5db",
++ &imx6_pcie->tx_deemph_gen2_3p5db))
++ imx6_pcie->tx_deemph_gen2_3p5db = 20;
++
++ if (of_property_read_u32(np, "fsl,tx-deemph-gen2-6db",
++ &imx6_pcie->tx_deemph_gen2_6db))
++ imx6_pcie->tx_deemph_gen2_6db = 20;
++
++ if (of_property_read_u32(np, "fsl,tx-swing-full",
++ &imx6_pcie->tx_swing_full))
++ imx6_pcie->tx_swing_full = 115;
++
++ if (of_property_read_u32(np, "fsl,tx-swing-low",
++ &imx6_pcie->tx_swing_low))
++ imx6_pcie->tx_swing_low = 115;
++
+ if (IS_ENABLED(CONFIG_EP_MODE_IN_EP_RC_SYS)) {
+ int i;
+ void *test_reg1, *test_reg2;
+--
+2.8.1
+
diff --git a/recipes-kernel/linux/linux-advantech-4.1/0004-input-da9063_onkey-Add-driver.patch b/recipes-kernel/linux/linux-advantech-4.1/0004-input-da9063_onkey-Add-driver.patch
new file mode 100644
index 0000000..0067df4
--- /dev/null
+++ b/recipes-kernel/linux/linux-advantech-4.1/0004-input-da9063_onkey-Add-driver.patch
@@ -0,0 +1,277 @@
+From 25b18dc1f1a91fbbb697fc3fa362f8f2d1709a7f Mon Sep 17 00:00:00 2001
+From: "Opensource [Steve Twiss]" <stwiss.opensource at diasemi.com>
+Date: Mon, 2 Feb 2015 01:32:27 -0500
+Subject: [PATCH 4/7] input: da9063_onkey: Add driver
+
+https://lkml.org/lkml/2014/3/10/424
+---
+ drivers/input/misc/Kconfig | 10 ++
+ drivers/input/misc/Makefile | 1 +
+ drivers/input/misc/da9063-onkey.c | 209 ++++++++++++++++++++++++++++++++++++++
+ include/linux/mfd/da9063/pdata.h | 1 +
+ 4 files changed, 221 insertions(+)
+ create mode 100644 drivers/input/misc/da9063-onkey.c
+
+diff --git a/drivers/input/misc/Kconfig b/drivers/input/misc/Kconfig
+index 5d3fc34..336d273 100644
+--- a/drivers/input/misc/Kconfig
++++ b/drivers/input/misc/Kconfig
+@@ -610,6 +610,16 @@ config INPUT_DA9055_ONKEY
+ To compile this driver as a module, choose M here: the module
+ will be called da9055_onkey.
+
++config INPUT_DA9063_ONKEY
++ tristate "Dialog DA9063 OnKey"
++ depends on MFD_DA9063
++ help
++ Support the ONKEY of Dialog DA9063 Power Management IC as an
++ input device reporting power button statue.
++
++ To compile this driver as a module, choose M here: the module
++ will be called da9063-onkey.
++
+ config INPUT_DM355EVM
+ tristate "TI DaVinci DM355 EVM Keypad and IR Remote"
+ depends on MFD_DM355EVM_MSP
+diff --git a/drivers/input/misc/Makefile b/drivers/input/misc/Makefile
+index 361e086..d37fb32 100644
+--- a/drivers/input/misc/Makefile
++++ b/drivers/input/misc/Makefile
+@@ -25,6 +25,7 @@ obj-$(CONFIG_INPUT_CMA3000_I2C) += cma3000_d0x_i2c.o
+ obj-$(CONFIG_INPUT_COBALT_BTNS) += cobalt_btns.o
+ obj-$(CONFIG_INPUT_DA9052_ONKEY) += da9052_onkey.o
+ obj-$(CONFIG_INPUT_DA9055_ONKEY) += da9055_onkey.o
++obj-$(CONFIG_INPUT_DA9063_ONKEY) += da9063-onkey.o
+ obj-$(CONFIG_INPUT_DM355EVM) += dm355evm_keys.o
+ obj-$(CONFIG_INPUT_E3X0_BUTTON) += e3x0-button.o
+ obj-$(CONFIG_INPUT_DRV260X_HAPTICS) += drv260x.o
+diff --git a/drivers/input/misc/da9063-onkey.c b/drivers/input/misc/da9063-onkey.c
+new file mode 100644
+index 0000000..ce08954
+--- /dev/null
++++ b/drivers/input/misc/da9063-onkey.c
+@@ -0,0 +1,209 @@
++/* da9063-onkey.c - Onkey device driver for DA9063
++ * Copyright (C) 2013 Dialog Semiconductor Ltd.
++ *
++ * This library is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU Library General Public
++ * License as published by the Free Software Foundation; either
++ * version 2 of the License, or (at your option) any later version.
++ *
++ * This library is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
++ * Library General Public License for more details.
++ */
++
++#include <linux/module.h>
++#include <linux/errno.h>
++#include <linux/input.h>
++#include <linux/interrupt.h>
++#include <linux/platform_device.h>
++#include <linux/workqueue.h>
++#include <linux/regmap.h>
++
++#include <linux/mfd/da9063/core.h>
++#include <linux/mfd/da9063/pdata.h>
++#include <linux/mfd/da9063/registers.h>
++
++struct da9063_onkey {
++ struct da9063 *hw;
++ struct delayed_work work;
++ struct input_dev *input;
++ int irq;
++ bool key_power;
++};
++
++static void da9063_poll_on(struct work_struct *work)
++{
++ struct da9063_onkey *onkey = container_of(work, struct da9063_onkey,
++ work.work);
++ unsigned int val;
++ bool poll = true;
++ int ret;
++
++ /* poll to see when the pin is released */
++ ret = regmap_read(onkey->hw->regmap, DA9063_REG_STATUS_A, &val);
++ if (ret < 0) {
++ dev_err(&onkey->input->dev,
++ "Failed to read ON status: %d\n", ret);
++ goto err_poll;
++ }
++
++ if (!(val & DA9063_NONKEY)) {
++ ret = regmap_update_bits(onkey->hw->regmap,
++ DA9063_REG_CONTROL_B,
++ DA9063_NONKEY_LOCK, 0);
++ if (ret < 0) {
++ dev_err(&onkey->input->dev,
++ "Failed to reset the Key Delay %d\n", ret);
++ goto err_poll;
++ }
++
++ /* unmask the onkey interrupt again */
++ ret = regmap_update_bits(onkey->hw->regmap,
++ DA9063_REG_IRQ_MASK_A,
++ DA9063_NONKEY, 0);
++ if (ret < 0) {
++ dev_err(&onkey->input->dev,
++ "Failed to unmask the onkey IRQ: %d\n", ret);
++ goto err_poll;
++ }
++
++ input_report_key(onkey->input, KEY_POWER, 0);
++ input_sync(onkey->input);
++
++ poll = false;
++ }
++
++err_poll:
++ if (poll)
++ schedule_delayed_work(&onkey->work, 50);
++}
++
++static irqreturn_t da9063_onkey_irq_handler(int irq, void *data)
++{
++ struct da9063_onkey *onkey = data;
++ unsigned int val;
++ int ret;
++
++ ret = regmap_read(onkey->hw->regmap, DA9063_REG_STATUS_A, &val);
++ if (onkey->key_power && (ret >= 0) && (val & DA9063_NONKEY)) {
++ ret = regmap_update_bits(onkey->hw->regmap,
++ DA9063_REG_IRQ_MASK_A,
++ DA9063_NONKEY, 1);
++ if (ret < 0)
++ dev_err(&onkey->input->dev,
++ "Failed to mask the onkey IRQ: %d\n", ret);
++
++ input_report_key(onkey->input, KEY_POWER, 1);
++ input_sync(onkey->input);
++
++ schedule_delayed_work(&onkey->work, 0);
++ dev_dbg(&onkey->input->dev, "KEY_POWER pressed.\n");
++ } else {
++ input_report_key(onkey->input, KEY_SLEEP, 1);
++ input_sync(onkey->input);
++ input_report_key(onkey->input, KEY_SLEEP, 0);
++ input_sync(onkey->input);
++ dev_dbg(&onkey->input->dev, "KEY_SLEEP pressed.\n");
++ }
++
++ return IRQ_HANDLED;
++}
++
++static int da9063_onkey_probe(struct platform_device *pdev)
++{
++ struct da9063 *da9063 = dev_get_drvdata(pdev->dev.parent);
++ struct da9063_pdata *pdata = dev_get_platdata(da9063->dev);
++ struct da9063_onkey *onkey;
++ bool kp_tmp = true;
++ int ret = 0;
++
++ if (pdata)
++ kp_tmp = pdata->key_power;
++
++ onkey = devm_kzalloc(&pdev->dev, sizeof(struct da9063_onkey),
++ GFP_KERNEL);
++ if (!onkey) {
++ dev_err(&pdev->dev, "Failed to allocate memory.\n");
++ ret = -ENOMEM;
++ goto err;
++ }
++
++ INIT_DELAYED_WORK(&onkey->work, da9063_poll_on);
++
++ onkey->input = devm_input_allocate_device(&pdev->dev);
++ if (!onkey->input) {
++ dev_err(&pdev->dev, "Failed to allocated input device.\n");
++ ret = -ENOMEM;
++ goto err;
++ }
++
++ ret = platform_get_irq_byname(pdev, "ONKEY");
++ if (ret < 0) {
++ dev_err(&pdev->dev, "Failed to get platform IRQ.\n");
++ goto err;
++ }
++ onkey->irq = ret;
++
++ ret = request_threaded_irq(onkey->irq, NULL,
++ da9063_onkey_irq_handler,
++ IRQF_TRIGGER_LOW | IRQF_ONESHOT,
++ "ONKEY", onkey);
++ if (ret) {
++ dev_err(&pdev->dev,
++ "Failed to request input device IRQ.\n");
++ goto err;
++ }
++
++ onkey->hw = da9063;
++ onkey->key_power = kp_tmp;
++ onkey->input->evbit[0] = BIT_MASK(EV_KEY);
++ onkey->input->name = DA9063_DRVNAME_ONKEY;
++ onkey->input->phys = DA9063_DRVNAME_ONKEY "/input0";
++ onkey->input->dev.parent = &pdev->dev;
++
++ if (onkey->key_power)
++ input_set_capability(onkey->input, EV_KEY, KEY_POWER);
++ input_set_capability(onkey->input, EV_KEY, KEY_SLEEP);
++
++ ret = input_register_device(onkey->input);
++ if (ret) {
++ dev_err(&pdev->dev,
++ "Failed to register input device.\n");
++ goto err_irq;
++ }
++
++ platform_set_drvdata(pdev, onkey);
++ return 0;
++
++err_irq:
++ free_irq(onkey->irq, onkey);
++ cancel_delayed_work_sync(&onkey->work);
++err:
++ return ret;
++}
++
++static int da9063_onkey_remove(struct platform_device *pdev)
++{
++ struct da9063_onkey *onkey = platform_get_drvdata(pdev);
++ free_irq(onkey->irq, onkey);
++ cancel_delayed_work_sync(&onkey->work);
++ input_unregister_device(onkey->input);
++ return 0;
++}
++
++static struct platform_driver da9063_onkey_driver = {
++ .probe = da9063_onkey_probe,
++ .remove = da9063_onkey_remove,
++ .driver = {
++ .name = DA9063_DRVNAME_ONKEY,
++ .owner = THIS_MODULE,
++ },
++};
++
++module_platform_driver(da9063_onkey_driver);
++
++MODULE_AUTHOR("S Twiss <stwiss.opensource at diasemi.com>");
++MODULE_DESCRIPTION("Onkey device driver for Dialog DA9063");
++MODULE_LICENSE("GPL v2");
++MODULE_ALIAS("platform:" DA9063_DRVNAME_ONKEY);
+diff --git a/include/linux/mfd/da9063/pdata.h b/include/linux/mfd/da9063/pdata.h
+index 95c8742..612383b 100644
+--- a/include/linux/mfd/da9063/pdata.h
++++ b/include/linux/mfd/da9063/pdata.h
+@@ -103,6 +103,7 @@ struct da9063;
+ struct da9063_pdata {
+ int (*init)(struct da9063 *da9063);
+ int irq_base;
++ bool key_power;
+ unsigned flags;
+ struct da9063_regulators_pdata *regulators_pdata;
+ struct led_platform_data *leds_pdata;
+--
+2.8.1
+
diff --git a/recipes-kernel/linux/linux-advantech-4.1/0005-mfd-da9063-Add-support-for-OnKey-driver.patch b/recipes-kernel/linux/linux-advantech-4.1/0005-mfd-da9063-Add-support-for-OnKey-driver.patch
new file mode 100644
index 0000000..c9007bf
--- /dev/null
+++ b/recipes-kernel/linux/linux-advantech-4.1/0005-mfd-da9063-Add-support-for-OnKey-driver.patch
@@ -0,0 +1,114 @@
+From 18fe0924c45d803967a304abe4fb7b143a0a0296 Mon Sep 17 00:00:00 2001
+From: Steve Twiss <stwiss.opensource at diasemi.com>
+Date: Tue, 19 May 2015 11:32:45 +0100
+Subject: [PATCH 5/7] mfd: da9063: Add support for OnKey driver
+
+Add MFD support for the DA9063 OnKey driver
+
+The function da9063_clear_fault_log() is added to mitigate the case of a
+hardware power-cut after a long-long OnKey press. Although there is no
+software intervention in this case (by definition) such a shutdown would
+cause persistent information within the DA9063 FAULT_LOG that would be
+available during the next device restart.
+
+Clearance of this persistent register must be completed after such a
+hardware power-cut operation has happened so that the FAULT_LOG does not
+continue with previous values. The clearance function has been added here
+in the kernel driver because wiping the fault-log cannot be counted on
+outside the Linux kernel.
+
+Signed-off-by: Steve Twiss <stwiss.opensource at diasemi.com>
+[Lee: Removed 'key_power' for Dmitry to take through the Input Tree]
+Signed-off-by: Lee Jones <lee.jones at linaro.org>
+---
+ drivers/mfd/da9063-core.c | 54 +++++++++++++++++++++++++++++++++++++++++++++++
+ 1 file changed, 54 insertions(+)
+
+diff --git a/drivers/mfd/da9063-core.c b/drivers/mfd/da9063-core.c
+index facd361..af841c1 100644
+--- a/drivers/mfd/da9063-core.c
++++ b/drivers/mfd/da9063-core.c
+@@ -60,6 +60,7 @@ static struct resource da9063_rtc_resources[] = {
+
+ static struct resource da9063_onkey_resources[] = {
+ {
++ .name = "ONKEY",
+ .start = DA9063_IRQ_ONKEY,
+ .end = DA9063_IRQ_ONKEY,
+ .flags = IORESOURCE_IRQ,
+@@ -97,6 +98,7 @@ static const struct mfd_cell da9063_devs[] = {
+ .name = DA9063_DRVNAME_ONKEY,
+ .num_resources = ARRAY_SIZE(da9063_onkey_resources),
+ .resources = da9063_onkey_resources,
++ .of_compatible = "dlg,da9063-onkey",
+ },
+ {
+ .name = DA9063_DRVNAME_RTC,
+@@ -109,12 +111,64 @@ static const struct mfd_cell da9063_devs[] = {
+ },
+ };
+
++static int da9063_clear_fault_log(struct da9063 *da9063)
++{
++ int ret = 0;
++ int fault_log = 0;
++
++ ret = regmap_read(da9063->regmap, DA9063_REG_FAULT_LOG, &fault_log);
++ if (ret < 0) {
++ dev_err(da9063->dev, "Cannot read FAULT_LOG.\n");
++ return -EIO;
++ }
++
++ if (fault_log) {
++ if (fault_log & DA9063_TWD_ERROR)
++ dev_dbg(da9063->dev,
++ "Fault log entry detected: DA9063_TWD_ERROR\n");
++ if (fault_log & DA9063_POR)
++ dev_dbg(da9063->dev,
++ "Fault log entry detected: DA9063_POR\n");
++ if (fault_log & DA9063_VDD_FAULT)
++ dev_dbg(da9063->dev,
++ "Fault log entry detected: DA9063_VDD_FAULT\n");
++ if (fault_log & DA9063_VDD_START)
++ dev_dbg(da9063->dev,
++ "Fault log entry detected: DA9063_VDD_START\n");
++ if (fault_log & DA9063_TEMP_CRIT)
++ dev_dbg(da9063->dev,
++ "Fault log entry detected: DA9063_TEMP_CRIT\n");
++ if (fault_log & DA9063_KEY_RESET)
++ dev_dbg(da9063->dev,
++ "Fault log entry detected: DA9063_KEY_RESET\n");
++ if (fault_log & DA9063_NSHUTDOWN)
++ dev_dbg(da9063->dev,
++ "Fault log entry detected: DA9063_NSHUTDOWN\n");
++ if (fault_log & DA9063_WAIT_SHUT)
++ dev_dbg(da9063->dev,
++ "Fault log entry detected: DA9063_WAIT_SHUT\n");
++ }
++
++ ret = regmap_write(da9063->regmap,
++ DA9063_REG_FAULT_LOG,
++ fault_log);
++ if (ret < 0)
++ dev_err(da9063->dev,
++ "Cannot reset FAULT_LOG values %d\n", ret);
++
++ return ret;
++}
++
+ int da9063_device_init(struct da9063 *da9063, unsigned int irq)
+ {
+ struct da9063_pdata *pdata = da9063->dev->platform_data;
+ int model, variant_id, variant_code;
+ int ret;
+
++ ret = da9063_clear_fault_log(da9063);
++ if (ret < 0)
++ dev_err(da9063->dev, "Cannot clear fault log\n");
++
+ if (pdata) {
+ da9063->flags = pdata->flags;
+ da9063->irq_base = pdata->irq_base;
+--
+2.8.1
+
diff --git a/recipes-kernel/linux/linux-advantech-4.1/0006-add-usb-hub_test-suport.patch b/recipes-kernel/linux/linux-advantech-4.1/0006-add-usb-hub_test-suport.patch
new file mode 100644
index 0000000..27b5c62
--- /dev/null
+++ b/recipes-kernel/linux/linux-advantech-4.1/0006-add-usb-hub_test-suport.patch
@@ -0,0 +1,66 @@
+From b555459597027af3362d93020162dfbb30e0eddd Mon Sep 17 00:00:00 2001
+From: Ken Lin <ken.lin at advantech.com.tw>
+Date: Sun, 13 Sep 2015 10:38:29 +0800
+Subject: [PATCH 6/7] add usb hub_test suport
+
+---
+ drivers/usb/core/sysfs.c | 29 +++++++++++++++++++++++++++++
+ 1 file changed, 29 insertions(+)
+
+diff --git a/drivers/usb/core/sysfs.c b/drivers/usb/core/sysfs.c
+index d269738..e78188d 100644
+--- a/drivers/usb/core/sysfs.c
++++ b/drivers/usb/core/sysfs.c
+@@ -16,6 +16,8 @@
+ #include <linux/usb/quirks.h>
+ #include "usb.h"
+
++#include <uapi/linux/usb/ch11.h>
++
+ /* Active configuration fields */
+ #define usb_actconfig_show(field, format_string) \
+ static ssize_t field##_show(struct device *dev, \
+@@ -677,6 +679,30 @@ static ssize_t remove_store(struct device *dev, struct device_attribute *attr,
+ static DEVICE_ATTR_IGNORE_LOCKDEP(remove, S_IWUSR, NULL, remove_store);
+
+
++
++static ssize_t usbhub_testmode_store(struct device *dev,
++ struct device_attribute *attr,
++ const char *buf, size_t count)
++{
++ int port, testmode;
++ struct usb_device *udev = to_usb_device(dev);
++
++ sscanf(buf, "%d %d\n", &port, &testmode);
++ printk(KERN_ERR "[Advantech]%s ,port:%d testmode:%d %d\n", __func__, port, testmode, udev->portnum);
++
++ usb_control_msg(udev, usb_sndctrlpipe(udev, 0), USB_REQ_SET_FEATURE,
++ USB_RT_PORT, USB_PORT_FEAT_SUSPEND,
++ port, NULL, 0, 1000);
++ usb_control_msg(udev, usb_sndctrlpipe(udev, 0), USB_REQ_SET_FEATURE,
++ USB_RT_PORT, USB_PORT_FEAT_TEST,
++ (testmode << 8) | port, NULL, 0, 1000);
++
++ return count;
++}
++
++static DEVICE_ATTR(hub_test, 0200, NULL, usbhub_testmode_store);
++
++
+ static struct attribute *dev_attrs[] = {
+ /* current configuration's attributes */
+ &dev_attr_configuration.attr,
+@@ -706,6 +732,9 @@ static struct attribute *dev_attrs[] = {
+ &dev_attr_remove.attr,
+ &dev_attr_removable.attr,
+ &dev_attr_ltm_capable.attr,
++
++ &dev_attr_hub_test.attr,
++
+ NULL,
+ };
+ static struct attribute_group dev_attr_grp = {
+--
+2.8.1
+
diff --git a/recipes-kernel/linux/linux-advantech-4.1/0007-ARM-dts-imx-Add-support-for-Advantech-DMS-BA16.patch b/recipes-kernel/linux/linux-advantech-4.1/0007-ARM-dts-imx-Add-support-for-Advantech-DMS-BA16.patch
new file mode 100644
index 0000000..89cf759
--- /dev/null
+++ b/recipes-kernel/linux/linux-advantech-4.1/0007-ARM-dts-imx-Add-support-for-Advantech-DMS-BA16.patch
@@ -0,0 +1,817 @@
+From b65cedb176959d126e062e437a58738a2b31f724 Mon Sep 17 00:00:00 2001
+From: Justin Waters <justin.waters at timesys.com>
+Date: Fri, 12 Dec 2014 17:12:24 -0500
+Subject: [PATCH 7/7] ARM: dts: imx: Add support for Advantech DMS-BA16
+
+Add support for the Advantech DMS-BA16 Board.
+
+Signed-off-by: Justin Waters <justin.waters at timesys.com>
+---
+ arch/arm/boot/dts/imx6q-dms-ba16.dts | 795 +++++++++++++++++++++++++++++++++++
+ 1 file changed, 795 insertions(+)
+ create mode 100644 arch/arm/boot/dts/imx6q-dms-ba16.dts
+
+diff --git a/arch/arm/boot/dts/imx6q-dms-ba16.dts b/arch/arm/boot/dts/imx6q-dms-ba16.dts
+new file mode 100644
+index 0000000..533d536
+--- /dev/null
++++ b/arch/arm/boot/dts/imx6q-dms-ba16.dts
+@@ -0,0 +1,795 @@
++/*
++ * Copyright 2016 Timesys Corporation
++ * Copyright 2016 Advantech Corporation
++ *
++ * The code contained herein is licensed under the GNU General Public
++ * License. You may obtain a copy of the GNU General Public License
++ * Version 2 or later at the following locations:
++ *
++ * http://www.opensource.org/licenses/gpl-license.html
++ * http://www.gnu.org/copyleft/gpl.html
++ */
++
++/dts-v1/;
++
++#include <dt-bindings/gpio/gpio.h>
++#include "imx6q.dtsi"
++
++/ {
++ model = "Advantech DMS-BA16";
++ compatible = "fsl,imx6q-dms-ba16", "fsl,imx6q";
++
++ aliases {
++ mxcfb0 = &mxcfb1;
++ mxcfb1 = &mxcfb2;
++ mmc0 = &usdhc2;
++ mmc1 = &usdhc3;
++ mmc2 = &usdhc4;
++ };
++
++ memory {
++ reg = <0x10000000 0x40000000>;
++ };
++
++ clocks {
++ clk24m: clk24m {
++ compatible = "fixed-clock";
++ #clock-cells = <0>;
++ clock-frequency = <24000000>;
++ };
++ };
++
++ regulators {
++ compatible = "simple-bus";
++
++ reg_usb_otg_vbus: usb_otg_vbus {
++ compatible = "regulator-fixed";
++ regulator-name = "usb_otg_vbus";
++ regulator-min-microvolt = <5000000>;
++ regulator-max-microvolt = <5000000>;
++ };
++
++ reg_usb_h1_vbus: usb_h1_vbus {
++ compatible = "regulator-fixed";
++ regulator-name = "usb_h1_vbus";
++ regulator-min-microvolt = <5000000>;
++ regulator-max-microvolt = <5000000>;
++ };
++
++ reg_1p8v: 1p8v {
++ compatible = "regulator-fixed";
++ regulator-name = "1P8V";
++ regulator-min-microvolt = <1800000>;
++ regulator-max-microvolt = <1800000>;
++ regulator-always-on;
++ };
++
++ reg_3p3v: 3p3v {
++ compatible = "regulator-fixed";
++ regulator-name = "3P3V";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ regulator-always-on;
++ };
++
++ reg_lvds: regulator-lvds {
++ compatible = "regulator-fixed";
++ regulator-name = "lvds_ppen";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ regulator-boot-on;
++ gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
++ enable-active-high;
++ };
++ };
++
++ sound {
++ compatible = "fsl,imx6q-ba16-sgtl5000",
++ "fsl,imx-audio-sgtl5000";
++ model = "imx6q-ba16-sgtl5000";
++ ssi-controller = <&ssi1>;
++ audio-codec = <&codec>;
++ audio-routing =
++ "MIC_IN", "Mic Jack",
++ "Mic Jack", "Mic Bias",
++ "Headphone Jack", "HP_OUT";
++ mux-int-port = <1>;
++ mux-ext-port = <4>;
++ };
++
++ sound-hdmi {
++ compatible = "fsl,imx6q-audio-hdmi",
++ "fsl,imx-audio-hdmi"; model = "imx-audio-hdmi";
++ hdmi-controller = <&hdmi_audio>;
++ };
++
++ mxcfb1: fb at 0 {
++ compatible = "fsl,mxc_sdc_fb";
++ disp_dev = "ldb";
++ interface_pix_fmt = "RGB24";
++ default_bpp = <32>;
++ int_clk = <0>;
++ late_init = <0>;
++ status = "okay";
++ };
++
++ mxcfb2: fb at 1 {
++ compatible = "fsl,mxc_sdc_fb";
++ disp_dev = "hdmi";
++ interface_pix_fmt = "RGB24";
++ mode_str ="1920x1080M at 60";
++ default_bpp = <24>;
++ int_clk = <0>;
++ late_init = <0>;
++ status = "okay";
++ };
++
++ backlight {
++ compatible = "pwm-backlight";
++ pwms = <&pwm1 0 5000000>;
++ brightness-levels = < 0 1 2 3 4 5 6 7 8 9
++ 10 11 12 13 14 15 16 17 18 19
++ 20 21 22 23 24 25 26 27 28 29
++ 30 31 32 33 34 35 36 37 38 39
++ 40 41 42 43 44 45 46 47 48 49
++ 50 51 52 53 54 55 56 57 58 59
++ 60 61 62 63 64 65 66 67 68 69
++ 70 71 72 73 74 75 76 77 78 79
++ 80 81 82 83 84 85 86 87 88 89
++ 90 91 92 93 94 95 96 97 98 99
++ 100 101 102 103 104 105 106 107 108 109
++ 110 111 112 113 114 115 116 117 118 119
++ 120 121 122 123 124 125 126 127 128 129
++ 130 131 132 133 134 135 136 137 138 139
++ 140 141 142 143 144 145 146 147 148 149
++ 150 151 152 153 154 155 156 157 158 159
++ 160 161 162 163 164 165 166 167 168 169
++ 170 171 172 173 174 175 176 177 178 179
++ 180 181 182 183 184 185 186 187 188 189
++ 190 191 192 193 194 195 196 197 198 199
++ 200 201 202 203 204 205 206 207 208 209
++ 210 211 212 213 214 215 216 217 218 219
++ 220 221 222 223 224 225 226 227 228 229
++ 230 231 232 233 234 235 236 237 238 239
++ 240 241 242 243 244 245 246 247 248 249
++ 250 251 252 253 254 255>;
++ default-brightness-level = <255>;
++ power-supply = <®_lvds>;
++ enable-gpios = <&gpio1 0 GPIO_ACTIVE_HIGH>;
++ };
++
++ v4l2_out {
++ compatible = "fsl,mxc_v4l2_output";
++ status = "okay";
++ };
++};
++
++&audmux {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_audmux>;
++ status = "okay";
++};
++
++&clks {
++ fsl,ldb-di0-parent = <&clks IMX6QDL_CLK_PLL2_PFD0_352M>;
++ fsl,ldb-di1-parent = <&clks IMX6QDL_CLK_PLL2_PFD0_352M>;
++};
++
++&ecspi1 {
++ fsl,spi-num-chipselects = <1>;
++ cs-gpios = <&gpio2 30 0>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_ecspi1>;
++ status = "okay";
++
++ flash: n25q032 at 0 {
++ #address-cells = <1>;
++ #size-cells = <1>;
++ compatible = "st,n25q032";
++ spi-max-frequency = <20000000>;
++ reg = <0>;
++ partition at 0 {
++ label = "U-Boot";
++ reg = <0x0 0xC0000>;
++ };
++ partition at C0000 {
++ label = "env";
++ reg = <0xC0000 0x10000>;
++ };
++ partition at D0000 {
++ label = "spare";
++ reg = <0xD0000 0x130000>;
++ };
++ };
++};
++
++&ecspi5 {
++ fsl,spi-num-chipselects = <1>;
++ cs-gpios = <&gpio1 17 0>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_ecspi5>;
++ status = "okay";
++
++ m25_eeprom: m25p80 at 0 {
++ compatible = "atmel,at25";
++ spi-max-frequency = <20000000>;
++ size = <0x8000>;
++ pagesize = <64>;
++ reg = <0>;
++ address-width = <16>;
++ };
++};
++
++&fec {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_enet>;
++ phy-mode = "rgmii";
++ status = "okay";
++};
++
++&cpu0 {
++ arm-supply = <®_arm>;
++ soc-supply = <®_soc>;
++ pu-supply = <®_pu>;
++};
++
++&dcic1 {
++ dcic_id = <0>;
++ dcic_mux = "dcic-hdmi";
++ status = "okay";
++};
++
++&dcic2 {
++ dcic_id = <1>;
++ dcic_mux = "dcic-lvds1";
++ status = "okay";
++};
++
++
++&gpc {
++ fsl,cpu_pupscr_sw2iso = <0xf>;
++ fsl,cpu_pupscr_sw = <0xf>;
++ fsl,cpu_pdnscr_iso2sw = <0x1>;
++ fsl,cpu_pdnscr_iso = <0x1>;
++ fsl,ldo-bypass = <0>;
++ fsl,wdog-reset = <1>; /* watchdog select of reset source */
++ pu-supply = <®_pu>;
++};
++
++&hdmi_audio {
++ status = "okay";
++};
++
++&hdmi_cec {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_hdmi_cec>;
++ status = "okay";
++};
++
++&hdmi_core {
++ ipu_id = <1>;
++ disp_id = <0>;
++ status = "okay";
++};
++
++&hdmi_video {
++ fsl,phy_reg_vlev = <0x01ad>;
++ fsl,phy_reg_cksymtx = <0x800d>;
++ status = "okay";
++};
++
++&i2c1 {
++ clock-frequency = <100000>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_i2c1>;
++ status = "okay";
++
++ codec: sgtl5000 at 0a {
++ compatible = "fsl,sgtl5000";
++ reg = <0x0a>;
++ clocks = <&clks 201>;
++ VDDA-supply = <®_1p8v>;
++ VDDIO-supply = <®_3p3v>;
++ };
++};
++
++&i2c2 {
++ clock-frequency = <100000>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_i2c2>;
++ status = "okay";
++
++ hdmi: edid at 50 {
++ compatible = "fsl,imx6-hdmi-i2c";
++ reg = <0x50>;
++ };
++};
++
++&i2c3 {
++ clock-frequency = <100000>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_i2c3>;
++ status = "okay";
++
++ pmic at 58 {
++ compatible = "dialog,da9063";
++ reg = <0x58>;
++ interrupt-parent = <&gpio7>;
++ interrupts = <13 0x8>; /* active-low GPIO7_13 */
++
++ regulators {
++ bcore1 {
++ regulator-min-microvolt = <1420000>;
++ regulator-max-microvolt = <1420000>;
++ regulator-always-on;
++ regulator-boot-on;
++ };
++
++ bcore2 {
++ regulator-min-microvolt = <1420000>;
++ regulator-max-microvolt = <1420000>;
++ regulator-always-on;
++ regulator-boot-on;
++ };
++
++ bpro {
++ regulator-min-microvolt = <1500000>;
++ regulator-max-microvolt = <1500000>;
++ regulator-always-on;
++ regulator-boot-on;
++ };
++
++ bmem {
++ regulator-min-microvolt = <1800000>;
++ regulator-max-microvolt = <1800000>;
++ regulator-always-on;
++ regulator-boot-on;
++ };
++
++ bio: bio {
++ regulator-min-microvolt = <1800000>;
++ regulator-max-microvolt = <1800000>;
++ regulator-always-on;
++ regulator-boot-on;
++ };
++
++ bperi: bperi {
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ regulator-always-on;
++ regulator-boot-on;
++ };
++
++ ldo1 {
++ regulator-min-microvolt = <600000>;
++ regulator-max-microvolt = <1860000>;
++ };
++
++ ldo2 {
++ regulator-min-microvolt = <600000>;
++ regulator-max-microvolt = <1860000>;
++ };
++
++ ldo3 {
++ regulator-min-microvolt = <900000>;
++ regulator-max-microvolt = <3440000>;
++ };
++
++ ldo4 {
++ regulator-min-microvolt = <900000>;
++ regulator-max-microvolt = <3440000>;
++ };
++
++ ldo5 {
++ regulator-min-microvolt = <900000>;
++ regulator-max-microvolt = <3600000>;
++ regulator-always-on;
++ regulator-boot-on;
++ };
++
++ ldo6 {
++ regulator-min-microvolt = <900000>;
++ regulator-max-microvolt = <3600000>;
++ regulator-always-on;
++ regulator-boot-on;
++ };
++
++ ldo7 {
++ regulator-min-microvolt = <900000>;
++ regulator-max-microvolt = <3600000>;
++ regulator-always-on;
++ regulator-boot-on;
++ };
++
++ ldo8 {
++ regulator-min-microvolt = <900000>;
++ regulator-max-microvolt = <3600000>;
++ regulator-always-on;
++ regulator-boot-on;
++ };
++
++ ldo9 {
++ regulator-min-microvolt = <950000>;
++ regulator-max-microvolt = <3600000>;
++ regulator-always-on;
++ regulator-boot-on;
++ };
++
++ ldo10 {
++ regulator-min-microvolt = <900000>;
++ regulator-max-microvolt = <3600000>;
++ regulator-always-on;
++ regulator-boot-on;
++ };
++
++ ldo11 {
++ regulator-min-microvolt = <900000>;
++ regulator-max-microvolt = <3600000>;
++ regulator-always-on;
++ regulator-boot-on;
++ };
++ };
++ };
++
++ rtc at 32 {
++ compatible = "epson,rx8010";
++ reg = <0x32>;
++ interrupt-parent = <&gpio4>;
++ interrupts = <10>;
++ rx8010-irq_1 = <&gpio4 10 0>;
++ };
++};
++
++&iomuxc {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_hog>;
++
++ hog {
++ pinctrl_hog: hoggrp-1 {
++ fsl,pins = <
++ MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x80000000 /* uSDHC2 CD */
++ MX6QDL_PAD_NANDF_CS0__GPIO6_IO11 0x80000000 /* uSDHC4 CD */
++ MX6QDL_PAD_NANDF_CS1__GPIO6_IO14 0x80000000 /* uSDHC4 SDIO PWR */
++ MX6QDL_PAD_NANDF_CS2__GPIO6_IO15 0x80000000 /* uSDHC4 SDIO WP */
++ MX6QDL_PAD_NANDF_CS3__GPIO6_IO16 0x80000000 /* uSDHC4 SDIO LED */
++ MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x80000000 /* SPI1 CS */
++ MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x80000000 /* FEC Reset */
++ MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x80000000 /* GPIO0 */
++ MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x80000000 /* GPIO1 */
++ MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x80000000 /* GPIO2 */
++ MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x80000000 /* GPIO3 */
++ MX6QDL_PAD_NANDF_D4__GPIO2_IO04 0x80000000 /* GPIO4 */
++ MX6QDL_PAD_NANDF_D5__GPIO2_IO05 0x80000000 /* GPIO5 */
++ MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x80000000 /* GPIO6 */
++ MX6QDL_PAD_NANDF_D7__GPIO2_IO07 0x80000000 /* GPIO7 */
++ MX6QDL_PAD_NANDF_CLE__GPIO6_IO07 0x80000000 /* CAM_PWDN */
++ MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x80000000 /* CAM_RST */
++ MX6QDL_PAD_GPIO_9__WDOG1_B 0x80000000 /* Watchdog out */
++ MX6QDL_PAD_GPIO_16__GPIO7_IO11 0x80000000 /* HUB_RESET */
++ MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x80000000 /* PMIC Interrupt */
++ MX6QDL_PAD_GPIO_19__GPIO4_IO05 0x80000000 /* AR8033 Interrupt */
++ MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x80000000 /* BLEN_OUT */
++ MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000 /* LVDS_PPEN_OUT */
++ MX6QDL_PAD_KEY_COL2__GPIO4_IO10 0x80000000 /* RTC_INT */
++ >;
++ };
++ };
++
++ usdhc3 {
++ pinctrl_usdhc3_reset: usdhc3grp-reset {
++ fsl,pins = <
++ MX6QDL_PAD_SD3_RST__SD3_RESET 0x170F9
++ >;
++ };
++ };
++
++ audmux {
++ pinctrl_audmux: audmuxgrp {
++ fsl,pins = <
++ MX6QDL_PAD_DISP0_DAT20__AUD4_TXC 0x130b0
++ MX6QDL_PAD_DISP0_DAT21__AUD4_TXD 0x130b0
++ MX6QDL_PAD_DISP0_DAT22__AUD4_TXFS 0x130b0
++ MX6QDL_PAD_DISP0_DAT23__AUD4_RXD 0x130b0
++ >;
++ };
++ };
++
++ ecspi1 {
++ pinctrl_ecspi1: ecspi1grp {
++ fsl,pins = <
++ MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1
++ MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1
++ MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1
++ >;
++ };
++ };
++
++ ecspi5 {
++ pinctrl_ecspi5: ecspi5grp {
++ fsl,pins = <
++ MX6QDL_PAD_SD1_DAT0__ECSPI5_MISO 0x1b0b0
++ MX6QDL_PAD_SD1_CMD__ECSPI5_MOSI 0x1b0b0
++ MX6QDL_PAD_SD1_CLK__ECSPI5_SCLK 0x1b0b0
++ MX6QDL_PAD_SD1_DAT1__GPIO1_IO17 0x1b0b0
++ >;
++ };
++ };
++
++ hdmi_cec {
++ pinctrl_hdmi_cec: hdmicecgrp {
++ fsl,pins = <
++ MX6QDL_PAD_KEY_ROW2__HDMI_TX_CEC_LINE 0x1f8b0
++ >;
++ };
++ };
++
++ usbotg {
++ pinctrl_usbotg: usbotggrp {
++ fsl,pins = <
++ MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
++ >;
++ };
++ };
++
++ usdhc2 {
++ pinctrl_usdhc2: usdhc2grp {
++ fsl,pins = <
++ MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
++ MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059
++ MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
++ MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
++ MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
++ MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059
++ >;
++ };
++ };
++
++ usdhc3 {
++ pinctrl_usdhc3: usdhc3grp {
++ fsl,pins = <
++ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
++ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
++ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
++ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
++ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
++ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
++ MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059
++ MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059
++ MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059
++ MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059
++ >;
++ };
++ };
++
++ usdhc4 {
++ pinctrl_usdhc4: usdhc4grp {
++ fsl,pins = <
++ MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059
++ MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059
++ MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059
++ MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059
++ MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059
++ MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059
++ MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17059
++ MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17059
++ MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17059
++ MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17059
++ >;
++ };
++ };
++
++ i2c1 {
++ pinctrl_i2c1: i2c1grp {
++ fsl,pins = <
++ MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1
++ MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1
++ >;
++ };
++ };
++
++ i2c2 {
++ pinctrl_i2c2: i2c2grp {
++ fsl,pins = <
++ MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
++ MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
++ >;
++ };
++ };
++
++ i2c3 {
++ pinctrl_i2c3: i2c3grp {
++ fsl,pins = <
++ MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
++ MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
++ >;
++ };
++ };
++
++ pwm1 {
++ pinctrl_pwm1: pwm1grp {
++ fsl,pins = <
++ MX6QDL_PAD_SD1_DAT3__PWM1_OUT 0x1b0b1
++ >;
++ };
++ };
++
++ pwm2 {
++ pinctrl_pwm2: pwm2grp {
++ fsl,pins = <
++ MX6QDL_PAD_GPIO_1__PWM2_OUT 0x1b0b1
++ >;
++ };
++ };
++
++ enet {
++ pinctrl_enet: enetgrp {
++ fsl,pins = <
++ MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x100b0
++ MX6QDL_PAD_ENET_MDC__ENET_MDC 0x100b0
++ MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x100b0
++ MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x100b0
++ MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x100b0
++ MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x100b0
++ MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x100b0
++ MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x100b0
++ MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x100b0
++ MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
++ MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
++ MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
++ MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
++ MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
++ MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
++ >;
++ };
++ };
++
++ uart3 {
++ pinctrl_uart3: uart3grp {
++ fsl,pins = <
++ MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
++ MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
++ MX6QDL_PAD_EIM_D23__UART3_CTS_B 0x1b0b1
++ MX6QDL_PAD_EIM_D31__UART3_RTS_B 0x1b0b1
++ >;
++ };
++ };
++
++ uart4 {
++ pinctrl_uart4: uart4grp {
++ fsl,pins = <
++ MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
++ MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
++ >;
++ };
++ };
++};
++
++&ldb {
++ split-mode;
++ status = "okay";
++
++ lvds-channel at 0 {
++ fsl,data-mapping = "spwg";
++ fsl,data-width = <24>;
++ crtc = "ipu1-di0";
++ status = "okay";
++
++ display-timings {
++ native-mode = <&timing0>;
++ timing0: SHARP-LQ156M1LG21 {
++ clock-frequency = <65000000>;
++ hactive = <1920>;
++ vactive = <1080>;
++ hback-porch = <100>;
++ hfront-porch = <40>;
++ vback-porch = <30>;
++ vfront-porch = <3>;
++ hsync-len = <10>;
++ vsync-len = <2>;
++ };
++ };
++ };
++
++ lvds-channel at 1 {
++ status = "disabled";
++ };
++};
++
++&pcie {
++ reset-gpio = <&gpio7 12 0>;
++ fsl,tx-deemph-gen1 = <0>;
++ fsl,tx-deemph-gen2-3p5db = <0>;
++ fsl,tx-deemph-gen2-6db = <20>;
++ fsl,tx-swing-full = <103>;
++ fsl,tx-swing-low = <103>;
++ status = "okay";
++};
++
++
++&pwm1 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_pwm1>;
++ status = "okay";
++};
++
++&pwm2 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_pwm2>;
++ status = "okay";
++};
++
++&ssi1 {
++ status = "okay";
++};
++
++&uart3 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_uart3>;
++ fsl,uart-has-rtscts;
++ status = "okay";
++};
++
++&uart4 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_uart4>;
++ status = "okay";
++};
++
++&usbh1 {
++ vbus-supply = <®_usb_h1_vbus>;
++ reset-gpios = <&gpio7 11 0>;
++ status = "okay";
++};
++
++&usbotg {
++ vbus-supply = <®_usb_otg_vbus>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_usbotg>;
++ disable-over-current;
++ status = "okay";
++};
++
++&usdhc2 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_usdhc2>;
++ cd-gpios = <&gpio1 4 1>;
++ no-1-8-v;
++ keep-power-in-suspend;
++ enable-sdio-wakeup;
++ status = "okay";
++};
++
++&usdhc3 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_usdhc3 &pinctrl_usdhc3_reset>;
++ bus-width = <8>;
++ vmmc-supply = <&bperi>;
++ no-1-8-v;
++ non-removable;
++ keep-power-in-suspend;
++ status = "okay";
++};
++
++&usdhc4 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_usdhc4>;
++ bus-width = <8>;
++ cd-gpios = <&gpio6 11 1>;
++ no-1-8-v;
++ keep-power-in-suspend;
++ enable-sdio-wakeup;
++ status = "okay";
++};
++
++&vpu {
++ pu-supply = <®_pu>;
++};
++
++&sata {
++ fsl,no-spread-spectrum;
++ fsl,transmit-atten-16ths = <12>;
++ fsl,transmit-boost-mdB = <3330>;
++ fsl,transmit-level-mV = <1133>;
++ fsl,receive-dpll-mode = <1>;
++ status = "okay";
++};
+--
+2.8.1
+
diff --git a/recipes-kernel/linux/linux-advantech-4.1/0008-da9063-Add-a-PMIC-qurk-to-support-system-suspend-res.patch b/recipes-kernel/linux/linux-advantech-4.1/0008-da9063-Add-a-PMIC-qurk-to-support-system-suspend-res.patch
new file mode 100644
index 0000000..17261be
--- /dev/null
+++ b/recipes-kernel/linux/linux-advantech-4.1/0008-da9063-Add-a-PMIC-qurk-to-support-system-suspend-res.patch
@@ -0,0 +1,218 @@
+From f08d25fce37274bb7ff7862ed380b998500b739c Mon Sep 17 00:00:00 2001
+From: Ken Lin <ken.lin at advantech.com.tw>
+Date: Tue, 26 Jul 2016 11:30:25 +0800
+Subject: [PATCH 1/3] da9063: Add a PMIC qurk to support system suspend/resume and shutdown
+
+Add a platfrom specific qurik to adjust PMIC power rails during suspend/resume and shutdown
+---
+ arch/arm/mach-imx/Makefile | 2 +-
+ arch/arm/mach-imx/mach-dms-ba16.c | 184 ++++++++++++++++++++++++++++++++++++++
+ 2 files changed, 185 insertions(+), 1 deletion(-)
+ create mode 100644 arch/arm/mach-imx/mach-dms-ba16.c
+
+diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile
+index d973b16..dfa25b4 100644
+--- a/arch/arm/mach-imx/Makefile
++++ b/arch/arm/mach-imx/Makefile
+@@ -102,7 +102,7 @@ AFLAGS_ddr3_freq_imx6.o :=-Wa,-march=armv7-a
+ AFLAGS_smp_wfe_imx6.o :=-Wa,-march=armv7-a
+ AFLAGS_lpddr2_freq_imx6q.o :=-Wa,-march=armv7-a
+ obj-$(CONFIG_SOC_IMX6Q) += clk-imx6q.o mach-imx6q.o ddr3_freq_imx6.o \
+- smp_wfe_imx6.o lpddr2_freq_imx6q.o
++ smp_wfe_imx6.o lpddr2_freq_imx6q.o mach-dms-ba16.o
+ AFLAGS_lpddr2_freq_imx6.o :=-Wa,-march=armv7-a
+ obj-$(CONFIG_SOC_IMX6SL) += clk-imx6sl.o mach-imx6sl.o lpddr2_freq_imx6.o
+ AFLAGS_ddr3_freq_imx6sx.o :=-Wa,-march=armv7-a
+diff --git a/arch/arm/mach-imx/mach-dms-ba16.c b/arch/arm/mach-imx/mach-dms-ba16.c
+new file mode 100644
+index 0000000..bc327d5
+--- /dev/null
++++ b/arch/arm/mach-imx/mach-dms-ba16.c
+@@ -0,0 +1,184 @@
++/*
++ * Platform suspend/resume/poweroff quirk example
++ *
++ * Copyright (C) 2015 Dialog Semiconductor Ltd
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; version 2 of the License.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ */
++
++#include <linux/device.h>
++#include <linux/i2c.h>
++#include <linux/init.h>
++#include <linux/io.h>
++#include <linux/notifier.h>
++#include <linux/of.h>
++#include <linux/mfd/da9063/registers.h>
++#include <linux/pm.h>
++#include <linux/suspend.h>
++#include <linux/reboot.h>
++#include <linux/delay.h>
++#include <linux/regulator/machine.h>
++
++static struct i2c_client *da9063_client;
++
++static int dms_ba16_suspend_pm_cb(struct notifier_block *nb,
++ unsigned long action, void *ptr)
++{
++ switch (action) {
++ case PM_SUSPEND_PREPARE:
++ case PM_HIBERNATION_PREPARE:
++ /*
++ * E.G. ADJUST PMIC SEQUENCER FOR SUSPEND
++ * E.G. MANIPULATE CONTROL LINE USAGE
++ * i2c_smbus_write_byte_data(dms_ba16_client, <REGISTER>, <VALUE>);
++ */
++
++
++
++ break;
++ case PM_POST_SUSPEND:
++ case PM_POST_HIBERNATION:
++ /*
++ * RESTORE PMIC SEQUENCER / CONTROL LINES
++ * i2c_smbus_write_byte_data(dms_ba16_client, <REGISTER>, <VALUE>);
++ */
++ i2c_smbus_write_byte_data(da9063_client,0xA4,0x70); // VBCORE1_A(1.42V)
++ i2c_smbus_write_byte_data(da9063_client,0xA3,0x70); // VBCORE2_A(1.42V)
++ i2c_smbus_write_byte_data(da9063_client,0xA5,0x61); // VBPRO_A(1.5V)
++ i2c_smbus_write_byte_data(da9063_client,0xA6,0x32); // VBMEM_A(1.8V)
++ i2c_smbus_write_byte_data(da9063_client,0xA7,0x32); // VBIO_A(1.8V)
++ i2c_smbus_write_byte_data(da9063_client,0xA8,0x7d); // VBPERI_A(3.3V)
++
++
++
++
++ break;
++ default:
++ return NOTIFY_DONE;
++ }
++ return NOTIFY_OK;
++}
++
++static void dms_ba16_poweroff_quirk(void)
++{
++ /*
++ * Do nothing - this must be assigned as pm_power_off callback, or
++ * otherwise /kernel/reboot.c : SYSCALL_DEFINE4(reboot, ... reduces
++ * LINUX_REBOOT_CMD_POWER_OFF to LINUX_REBOOT_CMD_HALT
++ * and so the pm_power_off_prepare callback would never be used!
++ *
++ * This callback is now apparently too late in the power off process
++ * for dms_ba16 I2C work, as it caused a stack dump with the message:
++ * WARNING: CPU: 0 PID: 50 at kernel/workqueue.c:1958
++ * process_one_work+0x3bc/0x424()
++ */
++}
++static void da9063_poweroff_prepare_quirk(void)
++{
++ /* E.G. SET PMIC MODE AND POWER OFF */
++ u8 val = 0;
++
++
++ printk(KERN_ALERT "Poweroff DA9063\n");
++
++
++ i2c_smbus_write_byte_data(da9063_client, DA9063_REG_CONTROL_F,DA9063_SHUTDOWN);
++
++
++ while (1);
++
++ return;
++}
++
++static int dms_ba16_reboot_notify(struct notifier_block *nb,
++ unsigned long action, void *data)
++{
++ switch (action) {
++ case SYS_POWER_OFF:
++ break;
++ case SYS_HALT:
++ case SYS_RESTART:
++ /*
++ * E.G. RESTORE PMIC SEQUENCER
++ * E.G. MODIFY GPIO TO RESET SLAVE DEVICE
++ * i2c_smbus_write_byte_data(dms_ba16_client, <REGISTER>, <VALUE>);
++ */
++ break;
++ default:
++ break;
++ }
++ return 0;
++}
++
++static struct notifier_block dms_ba16_reboot_nb = {
++ .notifier_call = dms_ba16_reboot_notify
++};
++
++static int platform_i2c_bus_notify(struct notifier_block *nb,
++ unsigned long action, void *data)
++{
++ struct device *dev = data;
++ struct i2c_client *client;
++
++ if ((action != BUS_NOTIFY_ADD_DEVICE) ||
++ (dev->type == &i2c_adapter_type))
++ return 0;
++
++ client = to_i2c_client(dev);
++
++ if ((client->addr == 0x58 && !strcmp(client->name, "da9063"))) {
++ da9063_client = client;
++
++ /*
++ * E.G. SET IRQ MASKS
++ * i2c_smbus_write_byte_data(dms_ba16_client, <REGISTER>, <VALUE>);
++ */
++
++ /*
++ * Register PM notifier for suspend/resume switchovers
++ * of control
++ */
++
++ i2c_smbus_write_byte_data(da9063_client,0x0B,0xF7); /*IRQ_MASK_B*/
++ i2c_smbus_write_byte_data(da9063_client,0x25,0x9); /*BPERI_CONT keep BPERI_B voltage when supsend*/
++ i2c_smbus_write_byte_data(da9063_client,0x24,0x1); /*BIO_CONT let BIO_B off when supsend*/
++
++
++
++ pm_notifier(dms_ba16_suspend_pm_cb, 0);
++
++ /* Register reboot notifier */
++ register_reboot_notifier(&dms_ba16_reboot_nb);
++
++ /* Establish poweroff callback */
++ printk(KERN_INFO "Installing DA9063 poweroff control\n");
++ pm_power_off_prepare = da9063_poweroff_prepare_quirk;
++ pm_power_off = dms_ba16_poweroff_quirk;
++
++ /* Get rid of this notification */
++ bus_unregister_notifier(&i2c_bus_type, nb);
++ }
++
++ return 0;
++}
++
++static struct notifier_block platform_i2c_bus_nb = {
++ .notifier_call = platform_i2c_bus_notify
++};
++
++static int __init platform_quirk(void)
++{
++ da9063_client = NULL;
++ bus_register_notifier(&i2c_bus_type, &platform_i2c_bus_nb);
++ return 0;
++}
++
++arch_initcall(platform_quirk);
++
+--
+1.9.1
+
diff --git a/recipes-kernel/linux/linux-advantech-4.1/0009-mfd-da9063-Add-wakeup-source-support.patch b/recipes-kernel/linux/linux-advantech-4.1/0009-mfd-da9063-Add-wakeup-source-support.patch
new file mode 100644
index 0000000..2085d54
--- /dev/null
+++ b/recipes-kernel/linux/linux-advantech-4.1/0009-mfd-da9063-Add-wakeup-source-support.patch
@@ -0,0 +1,28 @@
+From 93b8c33148ae69e4e060f1fbe66e21c59c91e368 Mon Sep 17 00:00:00 2001
+From: Ken Lin <ken.lin at advantech.com.tw>
+Date: Tue, 26 Jul 2016 11:36:19 +0800
+Subject: [PATCH 2/3] mfd: da9063: Add wakeup source support
+
+Configure da9063 IRQ as a iMx6 wakeup source
+---
+ drivers/mfd/da9063-core.c | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+diff --git a/drivers/mfd/da9063-core.c b/drivers/mfd/da9063-core.c
+index af841c1..7ea00a5 100644
+--- a/drivers/mfd/da9063-core.c
++++ b/drivers/mfd/da9063-core.c
+@@ -232,6 +232,10 @@ int da9063_device_init(struct da9063 *da9063, unsigned int irq)
+ if (ret)
+ dev_err(da9063->dev, "Cannot add MFD cells\n");
+
++
++ enable_irq_wake(da9063->chip_irq);
++
++
+ return ret;
+ }
+
+--
+1.9.1
+
diff --git a/recipes-kernel/linux/linux-advantech-4.1/0010-ARM-dts-imx-Add-Q7-SUS_S3_OUT-control-support-during.patch b/recipes-kernel/linux/linux-advantech-4.1/0010-ARM-dts-imx-Add-Q7-SUS_S3_OUT-control-support-during.patch
new file mode 100644
index 0000000..95ee76b
--- /dev/null
+++ b/recipes-kernel/linux/linux-advantech-4.1/0010-ARM-dts-imx-Add-Q7-SUS_S3_OUT-control-support-during.patch
@@ -0,0 +1,85 @@
+From d2b1dd5c8591c6e87b955329615683d0431cfb6e Mon Sep 17 00:00:00 2001
+From: Ken Lin <ken.lin at advantech.com.tw>
+Date: Tue, 26 Jul 2016 11:48:57 +0800
+Subject: [PATCH 3/3] ARM: dts: imx: Add Q7 SUS_S3_OUT control support during
+ suspend/resume
+
+configure Q7 SUS_S3_OUT as GPO and set the correct level during suspend/resume
+---
+ arch/arm/boot/dts/imx6q-dms-ba16.dts | 6 +++++-
+ arch/arm/mach-imx/mach-dms-ba16.c | 8 ++++++--
+ 2 files changed, 11 insertions(+), 3 deletions(-)
+
+diff --git a/arch/arm/boot/dts/imx6q-dms-ba16.dts b/arch/arm/boot/dts/imx6q-dms-ba16.dts
+index 533d536..9805aca 100644
+--- a/arch/arm/boot/dts/imx6q-dms-ba16.dts
++++ b/arch/arm/boot/dts/imx6q-dms-ba16.dts
+@@ -260,12 +260,14 @@
+ status = "okay";
+ };
+
++
+ &hdmi_cec {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_hdmi_cec>;
+- status = "okay";
++ status = "disabled";
+ };
+
++
+ &hdmi_core {
+ ipu_id = <1>;
+ disp_id = <0>;
+@@ -471,6 +473,8 @@
+ MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x80000000 /* BLEN_OUT */
+ MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000 /* LVDS_PPEN_OUT */
+ MX6QDL_PAD_KEY_COL2__GPIO4_IO10 0x80000000 /* RTC_INT */
++ MX6QDL_PAD_KEY_ROW2__GPIO4_IO11 0x1b0b0 /*SUS_S3_OUT*/
++
+ >;
+ };
+ };
+diff --git a/arch/arm/mach-imx/mach-dms-ba16.c b/arch/arm/mach-imx/mach-dms-ba16.c
+index bc327d5..ac6e6a0 100644
+--- a/arch/arm/mach-imx/mach-dms-ba16.c
++++ b/arch/arm/mach-imx/mach-dms-ba16.c
+@@ -25,7 +25,10 @@
+ #include <linux/reboot.h>
+ #include <linux/delay.h>
+ #include <linux/regulator/machine.h>
++#include <linux/gpio.h>
++#include "hardware.h"
+
++#define SUS_S3_OUT IMX_GPIO_NR(4, 11)
+ static struct i2c_client *da9063_client;
+
+ static int dms_ba16_suspend_pm_cb(struct notifier_block *nb,
+@@ -40,7 +43,7 @@ static int dms_ba16_suspend_pm_cb(struct notifier_block *nb,
+ * i2c_smbus_write_byte_data(dms_ba16_client, <REGISTER>, <VALUE>);
+ */
+
+-
++ gpio_direction_output(SUS_S3_OUT, 0); /*Set SUS_S3 low during suspend*/
+
+ break;
+ case PM_POST_SUSPEND:
+@@ -57,7 +60,7 @@ static int dms_ba16_suspend_pm_cb(struct notifier_block *nb,
+ i2c_smbus_write_byte_data(da9063_client,0xA8,0x7d); // VBPERI_A(3.3V)
+
+
+-
++ gpio_direction_output(SUS_S3_OUT, 1); /*Set SUS_S3 high during resume*/
+
+ break;
+ default:
+@@ -151,6 +154,7 @@ static int platform_i2c_bus_notify(struct notifier_block *nb,
+ i2c_smbus_write_byte_data(da9063_client,0x24,0x1); /*BIO_CONT let BIO_B off when supsend*/
+
+
++ gpio_direction_output(SUS_S3_OUT, 1); /*Set SUS_S3 high when power on*/
+
+ pm_notifier(dms_ba16_suspend_pm_cb, 0);
+
+--
+1.9.1
+
diff --git a/recipes-kernel/linux/linux-advantech-4.1/defconfig b/recipes-kernel/linux/linux-advantech-4.1/defconfig
new file mode 100644
index 0000000..c02b3c3
--- /dev/null
+++ b/recipes-kernel/linux/linux-advantech-4.1/defconfig
@@ -0,0 +1,451 @@
+CONFIG_KERNEL_LZO=y
+CONFIG_SYSVIPC=y
+CONFIG_NO_HZ=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_LOG_BUF_SHIFT=18
+CONFIG_CGROUPS=y
+CONFIG_RELAY=y
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_EXPERT=y
+CONFIG_KALLSYMS_ALL=y
+CONFIG_PERF_EVENTS=y
+# CONFIG_SLUB_DEBUG is not set
+# CONFIG_COMPAT_BRK is not set
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+CONFIG_MODVERSIONS=y
+CONFIG_MODULE_SRCVERSION_ALL=y
+# CONFIG_BLK_DEV_BSG is not set
+CONFIG_ARCH_MXC=y
+CONFIG_SOC_IMX50=y
+CONFIG_SOC_IMX53=y
+CONFIG_SOC_IMX6Q=y
+CONFIG_SOC_IMX6SL=y
+CONFIG_SOC_IMX6SX=y
+CONFIG_SOC_IMX6UL=y
+CONFIG_SOC_IMX7D=y
+CONFIG_SOC_VF610=y
+# CONFIG_SWP_EMULATE is not set
+CONFIG_PCI=y
+CONFIG_PCI_MSI=y
+CONFIG_PCI_IMX6=y
+CONFIG_SMP=y
+CONFIG_HAVE_ARM_ARCH_TIMER=y
+CONFIG_VMSPLIT_2G=y
+CONFIG_PREEMPT=y
+CONFIG_AEABI=y
+CONFIG_HIGHMEM=y
+CONFIG_CMA=y
+CONFIG_CMDLINE="noinitrd console=ttymxc0,115200"
+CONFIG_KEXEC=y
+CONFIG_CPU_FREQ=y
+CONFIG_CPU_FREQ_DEFAULT_GOV_INTERACTIVE=y
+CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
+CONFIG_CPU_FREQ_GOV_POWERSAVE=y
+CONFIG_CPU_FREQ_GOV_USERSPACE=y
+CONFIG_CPU_FREQ_GOV_ONDEMAND=y
+CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
+CONFIG_ARM_IMX6Q_CPUFREQ=y
+CONFIG_ARM_IMX7D_CPUFREQ=y
+CONFIG_CPU_IDLE=y
+CONFIG_VFP=y
+CONFIG_NEON=y
+CONFIG_BINFMT_MISC=m
+CONFIG_PM_DEBUG=y
+CONFIG_PM_TEST_SUSPEND=y
+CONFIG_NET=y
+CONFIG_PACKET=y
+CONFIG_UNIX=y
+CONFIG_INET=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_BEET is not set
+# CONFIG_INET_LRO is not set
+CONFIG_IPV6=y
+CONFIG_NETFILTER=y
+CONFIG_VLAN_8021Q=y
+CONFIG_LLC2=y
+CONFIG_CAN=y
+CONFIG_CAN_FLEXCAN=y
+CONFIG_CAN_M_CAN=y
+CONFIG_BT=y
+CONFIG_BT_RFCOMM=y
+CONFIG_BT_RFCOMM_TTY=y
+CONFIG_BT_BNEP=y
+CONFIG_BT_BNEP_MC_FILTER=y
+CONFIG_BT_BNEP_PROTO_FILTER=y
+CONFIG_BT_HIDP=y
+CONFIG_BT_HCIBTUSB=y
+CONFIG_BT_HCIUART=y
+CONFIG_BT_HCIUART_BCSP=y
+CONFIG_BT_HCIUART_ATH3K=y
+CONFIG_BT_HCIBCM203X=y
+CONFIG_BT_ATH3K=y
+CONFIG_CFG80211=y
+CONFIG_MAC80211=y
+CONFIG_DEVTMPFS=y
+CONFIG_DEVTMPFS_MOUNT=y
+# CONFIG_STANDALONE is not set
+CONFIG_DMA_CMA=y
+CONFIG_CMA_SIZE_MBYTES=320
+CONFIG_IMX_WEIM=y
+CONFIG_CONNECTOR=y
+CONFIG_MTD=y
+CONFIG_MTD_CMDLINE_PARTS=y
+CONFIG_MTD_BLOCK=y
+CONFIG_MTD_CFI=y
+CONFIG_MTD_JEDECPROBE=y
+CONFIG_MTD_CFI_INTELEXT=y
+CONFIG_MTD_CFI_AMDSTD=y
+CONFIG_MTD_CFI_STAA=y
+CONFIG_MTD_PHYSMAP_OF=y
+CONFIG_MTD_DATAFLASH=y
+CONFIG_MTD_M25P80=y
+CONFIG_MTD_SST25L=y
+CONFIG_MTD_NAND=y
+CONFIG_MTD_NAND_GPMI_NAND=y
+CONFIG_MTD_NAND_MXC=y
+CONFIG_MTD_SPI_NOR=y
+CONFIG_SPI_FSL_QUADSPI=y
+CONFIG_MTD_UBI=y
+CONFIG_BLK_DEV_LOOP=y
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_SIZE=65536
+CONFIG_SENSORS_FXOS8700=y
+CONFIG_SENSORS_FXAS2100X=y
+CONFIG_EEPROM_AT24=y
+CONFIG_EEPROM_AT25=y
+# CONFIG_SCSI_PROC_FS is not set
+CONFIG_BLK_DEV_SD=y
+CONFIG_SCSI_CONSTANTS=y
+CONFIG_SCSI_LOGGING=y
+CONFIG_SCSI_SCAN_ASYNC=y
+# CONFIG_SCSI_LOWLEVEL is not set
+CONFIG_ATA=y
+CONFIG_SATA_AHCI_PLATFORM=y
+CONFIG_AHCI_IMX=y
+CONFIG_PATA_IMX=y
+CONFIG_NETDEVICES=y
+# CONFIG_NET_VENDOR_BROADCOM is not set
+CONFIG_CS89x0=y
+CONFIG_CS89x0_PLATFORM=y
+# CONFIG_NET_VENDOR_FARADAY is not set
+CONFIG_IGB=y
+# CONFIG_NET_VENDOR_MARVELL is not set
+# CONFIG_NET_VENDOR_MICREL is not set
+# CONFIG_NET_VENDOR_MICROCHIP is not set
+# CONFIG_NET_VENDOR_NATSEMI is not set
+# CONFIG_NET_VENDOR_SEEQ is not set
+CONFIG_SMC91X=y
+CONFIG_SMC911X=y
+CONFIG_SMSC911X=y
+# CONFIG_NET_VENDOR_STMICRO is not set
+CONFIG_MICREL_PHY=y
+CONFIG_ATH_CARDS=m
+CONFIG_ATH9K=m
+CONFIG_ATH6KL=m
+CONFIG_ATH6KL_SDIO=m
+CONFIG_USB_PEGASUS=m
+CONFIG_USB_RTL8150=m
+CONFIG_USB_RTL8152=m
+CONFIG_USB_USBNET=m
+CONFIG_USB_NET_CDC_EEM=m
+CONFIG_BCMDHD=m
+CONFIG_BCMDHD_SDIO=y
+CONFIG_BCMDHD_FW_PATH="/lib/firmware/bcm/fw_bcmdhd.bin"
+CONFIG_BCMDHD_NVRAM_PATH="/lib/firmware/bcm/bcmdhd.cal"
+# CONFIG_RTL_CARDS is not set
+# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
+CONFIG_INPUT_EVDEV=y
+CONFIG_INPUT_EVBUG=m
+CONFIG_KEYBOARD_GPIO=y
+CONFIG_KEYBOARD_IMX=y
+CONFIG_MOUSE_PS2=m
+CONFIG_MOUSE_PS2_ELANTECH=y
+CONFIG_INPUT_TOUCHSCREEN=y
+CONFIG_TOUCHSCREEN_ADS7846=y
+CONFIG_TOUCHSCREEN_EGALAX=y
+CONFIG_TOUCHSCREEN_ELAN=y
+CONFIG_TOUCHSCREEN_MAX11801=y
+CONFIG_TOUCHSCREEN_IMX6UL_TSC=y
+CONFIG_TOUCHSCREEN_MC13783=y
+CONFIG_TOUCHSCREEN_TSC2007=y
+CONFIG_TOUCHSCREEN_STMPE=y
+CONFIG_INPUT_MISC=y
+CONFIG_INPUT_DA9063_ONKEY=y
+CONFIG_INPUT_MMA8450=y
+CONFIG_INPUT_MPL3115=y
+CONFIG_SENSOR_FXLS8471=y
+CONFIG_INPUT_ISL29023=y
+CONFIG_SERIO_SERPORT=m
+# CONFIG_LEGACY_PTYS is not set
+# CONFIG_DEVKMEM is not set
+CONFIG_SERIAL_IMX=y
+CONFIG_SERIAL_IMX_CONSOLE=y
+CONFIG_SERIAL_FSL_LPUART=y
+CONFIG_SERIAL_FSL_LPUART_CONSOLE=y
+CONFIG_FSL_OTP=y
+# CONFIG_I2C_COMPAT is not set
+CONFIG_I2C_CHARDEV=y
+# CONFIG_I2C_HELPER_AUTO is not set
+CONFIG_I2C_ALGOPCF=m
+CONFIG_I2C_ALGOPCA=m
+CONFIG_I2C_IMX=y
+CONFIG_SPI=y
+CONFIG_SPI_GPIO=y
+CONFIG_SPI_IMX=y
+CONFIG_GPIO_SYSFS=y
+CONFIG_GPIO_MAX732X=y
+CONFIG_GPIO_PCA953X=y
+CONFIG_GPIO_74X164=y
+CONFIG_POWER_SUPPLY=y
+CONFIG_SABRESD_MAX8903=y
+CONFIG_SENSORS_MAX17135=y
+CONFIG_SENSORS_MAG3110=y
+CONFIG_THERMAL=y
+CONFIG_CPU_THERMAL=y
+CONFIG_IMX_THERMAL=y
+CONFIG_DEVICE_THERMAL=y
+CONFIG_WATCHDOG=y
+CONFIG_IMX2_WDT=y
+CONFIG_MFD_DA9052_I2C=y
+CONFIG_MFD_DA9063=y
+CONFIG_MFD_MC13XXX_SPI=y
+CONFIG_MFD_MC13XXX_I2C=y
+CONFIG_MFD_MAX17135=y
+CONFIG_MFD_SI476X_CORE=y
+CONFIG_MFD_STMPE=y
+CONFIG_REGULATOR=y
+CONFIG_REGULATOR_FIXED_VOLTAGE=y
+CONFIG_REGULATOR_ANATOP=y
+CONFIG_REGULATOR_DA9052=y
+CONFIG_REGULATOR_DA9063=y
+CONFIG_REGULATOR_GPIO=y
+CONFIG_REGULATOR_MAX17135=y
+CONFIG_REGULATOR_MC13783=y
+CONFIG_REGULATOR_MC13892=y
+CONFIG_REGULATOR_PFUZE100=y
+CONFIG_MEDIA_SUPPORT=y
+CONFIG_MEDIA_CAMERA_SUPPORT=y
+CONFIG_MEDIA_RADIO_SUPPORT=y
+CONFIG_MEDIA_RC_SUPPORT=y
+CONFIG_RC_DEVICES=y
+CONFIG_IR_GPIO_CIR=y
+CONFIG_MEDIA_USB_SUPPORT=y
+CONFIG_USB_VIDEO_CLASS=m
+CONFIG_V4L_PLATFORM_DRIVERS=y
+CONFIG_VIDEO_MXC_OUTPUT=y
+CONFIG_VIDEO_MXC_CAPTURE=m
+CONFIG_MXC_CAMERA_OV5640=m
+CONFIG_MXC_CAMERA_OV5642=m
+CONFIG_MXC_CAMERA_OV5640_MIPI=m
+CONFIG_MXC_TVIN_ADV7180=m
+CONFIG_MXC_IPU_DEVICE_QUEUE_SDC=m
+CONFIG_VIDEO_MXC_IPU_OUTPUT=y
+CONFIG_VIDEO_MXC_PXP_V4L2=y
+CONFIG_VIDEO_MXC_CSI_CAMERA=m
+CONFIG_MXC_VADC=m
+CONFIG_MXC_MIPI_CSI=m
+CONFIG_MXC_CAMERA_OV5647_MIPI=m
+CONFIG_SOC_CAMERA=y
+CONFIG_VIDEO_MX3=y
+CONFIG_V4L_MEM2MEM_DRIVERS=y
+CONFIG_VIDEO_CODA=y
+CONFIG_RADIO_SI476X=y
+CONFIG_SOC_CAMERA_OV2640=y
+CONFIG_DRM=y
+CONFIG_DRM_VIVANTE=y
+CONFIG_FB=y
+CONFIG_FB_MXS=y
+CONFIG_FB_MXC_SYNC_PANEL=y
+CONFIG_FB_MXC_MIPI_DSI=y
+CONFIG_FB_MXC_MIPI_DSI_SAMSUNG=y
+CONFIG_FB_MXC_TRULY_WVGA_SYNC_PANEL=y
+CONFIG_FB_MXC_LDB=y
+CONFIG_FB_MXC_HDMI=y
+CONFIG_FB_MXS_SII902X=y
+CONFIG_FB_MXC_DCIC=m
+CONFIG_HANNSTAR_CABC=y
+CONFIG_FB_MXC_EINK_PANEL=y
+CONFIG_FB_MXC_EINK_V2_PANEL=y
+CONFIG_LCD_CLASS_DEVICE=y
+CONFIG_LCD_L4F00242T03=y
+CONFIG_LCD_PLATFORM=y
+CONFIG_BACKLIGHT_PWM=y
+CONFIG_FRAMEBUFFER_CONSOLE=y
+CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
+CONFIG_LOGO=y
+CONFIG_SOUND=y
+CONFIG_SND=y
+CONFIG_SND_USB_AUDIO=m
+CONFIG_SND_SOC=y
+CONFIG_SND_IMX_SOC=y
+CONFIG_SND_SOC_EUKREA_TLV320=y
+CONFIG_SND_SOC_IMX_WM8960=y
+CONFIG_SND_SOC_IMX_SII902X=y
+CONFIG_SND_SOC_IMX_WM8958=y
+CONFIG_SND_SOC_IMX_CS42888=y
+CONFIG_SND_SOC_IMX_WM8962=y
+CONFIG_SND_SOC_IMX_SGTL5000=y
+CONFIG_SND_SOC_IMX_MQS=y
+CONFIG_SND_SOC_IMX_SPDIF=y
+CONFIG_SND_SOC_IMX_MC13783=y
+CONFIG_SND_SOC_IMX_SI476X=y
+CONFIG_SND_SOC_IMX_HDMI=y
+CONFIG_USB=y
+CONFIG_USB_OTG_WHITELIST=y
+CONFIG_USB_OTG_FSM=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_MXC=y
+CONFIG_USB_HCD_TEST_MODE=y
+CONFIG_USB_ACM=m
+CONFIG_USB_STORAGE=y
+CONFIG_USB_CHIPIDEA=y
+CONFIG_USB_CHIPIDEA_UDC=y
+CONFIG_USB_CHIPIDEA_HOST=y
+CONFIG_USB_SERIAL=m
+CONFIG_USB_SERIAL_GENERIC=y
+CONFIG_USB_SERIAL_FTDI_SIO=m
+CONFIG_USB_SERIAL_OPTION=m
+CONFIG_USB_EHSET_TEST_FIXTURE=y
+CONFIG_NOP_USB_XCEIV=y
+CONFIG_USB_MXS_PHY=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_CONFIGFS=m
+CONFIG_USB_CONFIGFS_SERIAL=y
+CONFIG_USB_CONFIGFS_ACM=y
+CONFIG_USB_CONFIGFS_OBEX=y
+CONFIG_USB_CONFIGFS_NCM=y
+CONFIG_USB_CONFIGFS_ECM=y
+CONFIG_USB_CONFIGFS_ECM_SUBSET=y
+CONFIG_USB_CONFIGFS_RNDIS=y
+CONFIG_USB_CONFIGFS_EEM=y
+CONFIG_USB_CONFIGFS_MASS_STORAGE=y
+CONFIG_USB_CONFIGFS_F_LB_SS=y
+CONFIG_USB_CONFIGFS_F_FS=y
+CONFIG_USB_ZERO=m
+CONFIG_USB_ETH=m
+CONFIG_USB_G_NCM=m
+CONFIG_USB_GADGETFS=m
+CONFIG_USB_MASS_STORAGE=m
+CONFIG_USB_G_SERIAL=m
+CONFIG_MMC=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_PLTFM=y
+CONFIG_MMC_SDHCI_ESDHC_IMX=y
+CONFIG_MXC_IPU=y
+CONFIG_MXC_IPU_V3_PRE=y
+CONFIG_MXC_GPU_VIV=y
+CONFIG_MXC_SIM=y
+CONFIG_MXC_MIPI_CSI2=y
+CONFIG_NEW_LEDS=y
+CONFIG_LEDS_CLASS=y
+CONFIG_LEDS_GPIO=y
+CONFIG_LEDS_TRIGGERS=y
+CONFIG_LEDS_TRIGGER_TIMER=y
+CONFIG_LEDS_TRIGGER_ONESHOT=y
+CONFIG_LEDS_TRIGGER_HEARTBEAT=y
+CONFIG_LEDS_TRIGGER_BACKLIGHT=y
+CONFIG_LEDS_TRIGGER_GPIO=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_INTF_DEV_UIE_EMUL=y
+CONFIG_RTC_DRV_RX8010=y
+CONFIG_RTC_DRV_DA9063=y
+CONFIG_RTC_DRV_MC13XXX=y
+CONFIG_RTC_DRV_MXC=y
+CONFIG_RTC_DRV_SNVS=y
+CONFIG_RTC_HCTOSYS_DEVICE="rtc1"
+CONFIG_DMADEVICES=y
+CONFIG_MXC_PXP_V2=y
+CONFIG_MXC_PXP_V3=y
+CONFIG_IMX_SDMA=y
+CONFIG_MXS_DMA=y
+CONFIG_STAGING=y
+CONFIG_STAGING_MEDIA=y
+# CONFIG_IOMMU_SUPPORT is not set
+CONFIG_IIO=y
+CONFIG_VF610_ADC=y
+CONFIG_PWM=y
+CONFIG_PWM_IMX=y
+CONFIG_EXT2_FS=y
+CONFIG_EXT2_FS_XATTR=y
+CONFIG_EXT2_FS_POSIX_ACL=y
+CONFIG_EXT2_FS_SECURITY=y
+CONFIG_EXT3_FS=y
+CONFIG_EXT3_FS_POSIX_ACL=y
+CONFIG_EXT3_FS_SECURITY=y
+CONFIG_EXT4_FS=y
+CONFIG_EXT4_FS_POSIX_ACL=y
+CONFIG_EXT4_FS_SECURITY=y
+CONFIG_QUOTA=y
+CONFIG_QUOTA_NETLINK_INTERFACE=y
+# CONFIG_PRINT_QUOTA_WARNING is not set
+CONFIG_AUTOFS4_FS=y
+CONFIG_FUSE_FS=y
+CONFIG_ISO9660_FS=m
+CONFIG_JOLIET=y
+CONFIG_ZISOFS=y
+CONFIG_UDF_FS=m
+CONFIG_MSDOS_FS=m
+CONFIG_VFAT_FS=y
+CONFIG_TMPFS=y
+CONFIG_JFFS2_FS=y
+CONFIG_UBIFS_FS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3_ACL=y
+CONFIG_NFS_V4=y
+CONFIG_ROOT_NFS=y
+CONFIG_NLS_DEFAULT="cp437"
+CONFIG_NLS_CODEPAGE_437=y
+CONFIG_NLS_ASCII=y
+CONFIG_NLS_ISO8859_1=y
+CONFIG_NLS_ISO8859_15=m
+CONFIG_NLS_UTF8=y
+CONFIG_DEBUG_FS=y
+CONFIG_MAGIC_SYSRQ=y
+# CONFIG_SCHED_DEBUG is not set
+# CONFIG_DEBUG_BUGVERBOSE is not set
+# CONFIG_FTRACE is not set
+CONFIG_CORESIGHT=y
+CONFIG_CORESIGHT_LINK_AND_SINK_TMC=y
+CONFIG_CORESIGHT_SINK_TPIU=y
+CONFIG_CORESIGHT_SINK_ETBV10=y
+CONFIG_CORESIGHT_SOURCE_ETM3X=y
+CONFIG_SECURITYFS=y
+CONFIG_CRYPTO_USER=y
+CONFIG_CRYPTO_TEST=m
+CONFIG_CRYPTO_CBC=y
+CONFIG_CRYPTO_CTS=y
+CONFIG_CRYPTO_LRW=y
+CONFIG_CRYPTO_XTS=y
+CONFIG_CRYPTO_MD4=y
+CONFIG_CRYPTO_MD5=y
+CONFIG_CRYPTO_MICHAEL_MIC=y
+CONFIG_CRYPTO_RMD128=y
+CONFIG_CRYPTO_RMD160=y
+CONFIG_CRYPTO_RMD256=y
+CONFIG_CRYPTO_RMD320=y
+CONFIG_CRYPTO_SHA1=y
+CONFIG_CRYPTO_SHA512=y
+CONFIG_CRYPTO_TGR192=y
+CONFIG_CRYPTO_WP512=y
+CONFIG_CRYPTO_BLOWFISH=y
+CONFIG_CRYPTO_CAMELLIA=y
+CONFIG_CRYPTO_DES=y
+CONFIG_CRYPTO_TWOFISH=y
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
+CONFIG_CRYPTO_DEV_FSL_CAAM=y
+CONFIG_CRYPTO_DEV_FSL_CAAM_SM=y
+CONFIG_CRYPTO_DEV_FSL_CAAM_SM_TEST=y
+CONFIG_CRYPTO_DEV_FSL_CAAM_SECVIO=y
+CONFIG_CRC_CCITT=m
+CONFIG_CRC_T10DIF=y
+CONFIG_CRC7=m
+CONFIG_LIBCRC32C=m
+CONFIG_FONTS=y
+CONFIG_FONT_8x8=y
+CONFIG_FONT_8x16=y
diff --git a/recipes-kernel/linux/linux-advantech_4.1.bb b/recipes-kernel/linux/linux-advantech_4.1.bb
new file mode 100644
index 0000000..635d29b
--- /dev/null
+++ b/recipes-kernel/linux/linux-advantech_4.1.bb
@@ -0,0 +1,27 @@
+# Copyright (C) 2016 Timesys Corporation
+# Copyright (C) 2016 Advantech Corporation
+# Released under the MIT license (see COPYING.MIT for the terms)
+
+include recipes-kernel/linux/linux-imx.inc
+include recipes-kernel/linux/linux-dtb.inc
+
+DEPENDS += "lzop-native bc-native"
+
+SRCBRANCH = "4.1-1.0.x-imx"
+SRCREV = "8eaed11bf59476b24c46a41036b34e969c40d165"
+LOCALVERSION = "-${SRCBRANCH}-dms-ba16"
+
+SRC_URI = "git://github.com/Freescale/linux-fslc.git;branch=${SRCBRANCH} \
+ file://0001-rtc-rx8010-Add-driver-to-kernel.patch \
+ file://0002-ahci_imx-Make-receive-DPLL-mode-configurable.patch \
+ file://0003-PCI-imx6-Add-DT-bindings-to-configure-PHY-Tx-driver-.patch \
+ file://0004-input-da9063_onkey-Add-driver.patch \
+ file://0005-mfd-da9063-Add-support-for-OnKey-driver.patch \
+ file://0006-add-usb-hub_test-suport.patch \
+ file://0007-ARM-dts-imx-Add-support-for-Advantech-DMS-BA16.patch \
+ file://0008-da9063-Add-a-PMIC-qurk-to-support-system-suspend-res.patch \
+ file://0009-mfd-da9063-Add-wakeup-source-support.patch \
+ file://0010-ARM-dts-imx-Add-Q7-SUS_S3_OUT-control-support-during.patch \
+ file://defconfig"
+
+COMPATIBLE_MACHINE = "(imx6q-dms-ba16)"
--
2.8.1
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