[meta-freescale] [meta-fsl-ppc][PATCH 9/9] rcw: update to revision 426f7a6

[Otavio Salvador]

On Fri, Jul 17, 2015 at 2:36 AM,  <b28495 at freescale.com> wrote:
> From: Ting Liu <ting.liu at freescale.com>
>
> This imports following changes:
>
> 426f7a6 SECURE BOOT: Add missing RCW's for T4240QDS
> 756454f SECURE BOOT: Rename the RCW's
> 7782087 SECURE BOOT: Remove Unwanted RCW's
> e93c210 LS1021: Unset BOOT_HO bit in rcw.
> 4375fc4 t1023rdb: update IFC_MODE to 0x2F for errata A-009138
> 5cf9bc5 T4240QDS: Add four 1800MHz/Core RCW files for T4240QDS board
> cff536a t1023rdb: set RTC=1 to enable GPIO1[14]
> a5983f2 T4240RDB: Add one new RCW for T4240RDB board
> 3a6ae48 ls1021a: fix some serdes settings for SATA
> 31078e1 ls1021atwr: do not power down PLL which is used by SATA
> c6d72e3 t2080qds: rcw: Add eMMC DDR mode RCW
> c77415c T104xD4RDB: update SRDS_PLL_REF_CLK_SEL_S1 value
> e2c0844 ls1021atwr: add USB 2.0 support
> fd0c1df p5020/p5040: NAND Secure Boot RCW added with PBI commands
> 259d57d t1023rdb: add rcw for t1023rdb board
> c3ab906 T1042: Add t1042d4rdb rcw files for serdes protocol 0x86
> ae39560 T1040: Add t1040d4rdb rcw files for serdes protocol 0x66
> b9d3c22 p3041: NAND Secure Boot RCW added with PBI commands
> dc0fad9 t2080rdb: update ddr to 1866MT/s
> 03c5ee6 t2080: update platform clock to 600MHz
> 72945fa rcw: ls102xa: merge rcw for lpuart and dcu
> 6678741 rcw: ls102xa: Adjust the features supported in SD boot
> f7a54c1 arm: ls102xa: Increase IO drive strength for LS1021AQDS board
> 3dd07fa B4860-As-B3: Add two new RCW files
> 69a041c B4860QDS: Add HWA_CGA_M3_CLK_SEL bits define in b4860.rcwi file
> 87289d5 ls102xa: rcw: Add QSPI boot RCW for LS1021A TWR board
> 13bf692 t1024: update FM1_MAC_RAT from 0 to 1
> 5b94b3e t1024rdb: add new rcw 0x135 and minor update
>
> Also align with the one in meta-fsl-arm layer.
>
> Signed-off-by: Ting Liu <ting.liu at freescale.com>

Acked-by: Otavio Salvador <otavio at ossystems.com.br>

-- 
Otavio Salvador                             O.S. Systems
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