[meta-freescale] iMX6 - CPU frequency lowered during LDO bypass setting

[Andrea Scian]

Il 17/04/2015 15:03, ansaris ha scritto:
> We would like to know, during the LDO bypass settings why the CPU
> frequency is lowered in File-1(Linux 3.14.28_1.0.0-GA)?  Is it
> recommended  to do the same.?

I think that the answer is here:

http://git.freescale.com/git/cgit.cgi/imx/uboot-imx.git/commit/?id=404fd02e96d33840f58f83f88815e2a259cdc532

During bypass procedure you violate datasheet power constraint if 
running at 800MHz: in LDO mode VDD_ARM must be 125mV higher that the LDO 
output voltage, while you need to lower VDD_ARM (on PMIC) before 
switching to bypass mode.
To fill the 125mV gap you need to:
- switch to 400MHz
- lower PMIC voltages
- switch to bypass mode (which remove the 125mV gap)
- switch back to 800MHz

If you skip the first step you may have 1.175-0.125 = 1.050V which is 
below the required power supply for VDD_ARM

I think this is the meaning of the commit, please correct me if I'm 
wrong, of course.

Kind Regards,

-- 

Andrea SCIAN

DAVE Embedded Systems