[meta-freescale] [meta-fsl-arm dizzy][PATCH 3/5] u-boot-ls1: Update to 50d6848 revision

[Zhenhua Luo]

From: Chunrong Guo <B40290 at freescale.com>

     This includes following changes:

     50d6848 arm: ls102xa: Update bit reversing for SCFG registers
     4d18340 arm: ls102xa: Remove custom part number SLS1020A and related defination
     756cbdc arm: ls102xa: clear EPU registers for deep sleep
     1d333c7 arm: ls102xa: correct the base address of DCSR registers

Signed-off-by: Chunrong Guo <B40290 at freescale.com>
Signed-off-by: Otavio Salvador <otavio at ossystems.com.br>
(cherry picked from commit c4dc7260187d19cb6f379642d7fbd2fb37cc3b43)
---
 recipes-bsp/u-boot/u-boot-ls1.inc | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/recipes-bsp/u-boot/u-boot-ls1.inc b/recipes-bsp/u-boot/u-boot-ls1.inc
index 49d757c..371773f 100644
--- a/recipes-bsp/u-boot/u-boot-ls1.inc
+++ b/recipes-bsp/u-boot/u-boot-ls1.inc
@@ -10,6 +10,6 @@ LIC_FILES_CHKSUM = " \
 
 SRCBRANCH = "LS1-dev"
 SRC_URI = "git://git.freescale.com/layerscape/ls1021a/u-boot.git;branch=${SRCBRANCH}"
-SRCREV = "48bfc6985a0524bc5c388bb9a9a6a6bc4a121ec5"
+SRCREV = "50d684801cd05ed6b77d52d1ca9ed00fefeac469"
 
 S = "${WORKDIR}/git"
-- 
1.9.3