[meta-freescale] Updates to meta-fsl-arm (dizzy) in 2014-12-03

[Otavio Salvador]

Hello,

I pushed following updates:

commit 2376d3d7c898bbda9ce98f9dedcc63b19ccffd93 (HEAD, yocto/dizzy-next, yocto/dizzy, for-dizzy)
Author: Gary Bisson <bisson.gary at gmail.com>
Date:   Wed Dec 3 15:10:11 2014 -0800

    linux-imx: add clock patch for revision T0 1.0 of i.MX6Q
    
    The post dividers do not work on i.MX6Q rev T0 1.0 so they must be fixed
    to 1. As the table index was wrong, a divider a of 4 could still be
    requested which implied the clock not to be set properly. This is the
    root cause of the HDMI not working at high resolution on rev T0 1.0 of
    the SoC, giving the following error:
    mxc_sdc_fb fb.27: timeout when waiting for flip irq
    
    Signed-off-by: Gary Bisson <bisson.gary at gmail.com>
    Signed-off-by: Otavio Salvador <otavio at ossystems.com.br>

Regards,

--
Otavio Salvador                             O.S. Systems
http://www.ossystems.com.br        http://code.ossystems.com.br
Mobile: +55 (53) 9981-7854            Mobile: +1 (347) 903-9750