[meta-freescale] [PATCH] arm/mach-mx6: fix pll4 set_rate callback

[Eric Bénard]

Hi Alexander,

Le Tue, 04 Jun 2013 16:43:53 +0400,
Alexander Smirnov <alex.bluesman.smirnov at gmail.com> a écrit :
>  >     There is single method to set clock-rate for both audio and video 
> pll-s
> >     in i.MX6q clock system implementation. That's possible due to they have
> >     similar set of registers with a different bases. But there is also one
> >     common register: CCM_ANALOG_MISC2, which contains post-dividers.
> >
> >     In current implementation, independently of whether audio or video clock
> >     is going to be set, the mask 0xc0000000 is applied to MISC2 register.
> >     This means, that if the audio clock rate is changed, the video clock
> >     post-dividers possibly will be corrupted.
> >
> >     This patch fixes the issue described above.
> >
> >     Signed-off-by: Alexander Smirnov <alex.bluesman.smirnov at gmail.com
> >     <mailto:alex.bluesman.smirnov at gmail.com>>
> >
> >
> > I am adding Fabio and Mahesh in Cc so they can take a look in this patch
> 
> has anybody looked at the patch I sent?
> 
> I also have a couple of fixes for imx audio, can I send them here?
> 
please send them here even if that doesn't reach meta-fsl-arm, at least
other users of i.MX are reading this mailing list and may find your
patches interesting and test them if they face the same issues.

Thanks and best regards,
Eric