[linux-yocto] [PATCH 02/14] FogBugz #251539-2: dts: Add Altera Quad SPI Driver Device Tree Binding

Meng.Li at windriver.com Meng.Li at windriver.com
Wed May 16 02:14:36 PDT 2018


From: VIET NGA DAO <vndao at altera.com>

commit 990acaf14261901a67c96f2effab389556d87c60 from
https://github.com/altera-opensource/linux-socfpga.git

This patch adds Device Tree Binding for Altera Quad SPI Driver.

Signed-off-by: Viet Nga Dao <vndao at altera.com>
Signed-off-by: Ooi, Joyce <joyce.ooi at intel.com>
Signed-off-by: Meng Li <Meng.Li at windriver.com>
---
 .../devicetree/bindings/mtd/altera_quadspi.txt     | 42 ++++++++++++++++++++++
 1 file changed, 42 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/mtd/altera_quadspi.txt

diff --git a/Documentation/devicetree/bindings/mtd/altera_quadspi.txt b/Documentation/devicetree/bindings/mtd/altera_quadspi.txt
new file mode 100644
index 0000000..626b602
--- /dev/null
+++ b/Documentation/devicetree/bindings/mtd/altera_quadspi.txt
@@ -0,0 +1,42 @@
+* MTD Altera QUADSPI driver
+
+Required properties:
+- compatible: Should be "altr,quadspi-1.0"
+- reg: Address and length of the register set  for the device. It contains
+  the information of registers in the same order as described by reg-names
+- reg-names: Should contain the reg names
+  "avl_csr": Should contain the register configuration base address
+  "avl_mem": Should contain the data base address
+- #address-cells: Must be <1>.
+- #size-cells: Must be <0>.
+- flash device tree subnode, there must be a node with the following fields:
+	- compatible: Should contain the flash name
+	- #address-cells: please refer to /mtd/partition.txt
+	- #size-cells: please refer to /mtd/partition.txt
+	For partitions inside each flash, please refer to /mtd/partition.txt
+
+Example:
+
+			quadspi_controller_0: quadspi at 0x180014a0 {
+				compatible = "altr,quadspi-1.0";
+				reg = <0x180014a0 0x00000020>,
+				      <0x14000000 0x04000000>;
+				reg-names = "avl_csr", "avl_mem";
+				#address-cells = <1>;
+				#size-cells = <0>;
+				flash0: epcq256 at 0 {
+					compatible = "epcq256-nonjedec";
+					#address-cells = <1>;
+					#size-cells = <1>;
+					partition at 0 {
+						/* 16 MB for raw data. */
+						label = "EPCQ Flash 0 raw data";
+						reg = <0x0 0x1000000>;
+					};
+					partition at 1000000 {
+						/* 16 MB for jffs2 data. */
+						label = "EPCQ Flash 0 JFFS 2";
+						reg = <0x1000000 0x1000000>;
+					};
+				};
+			}; //end quadspi at 0x180014a0 (quadspi_controller_0)
-- 
2.7.4



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