[linux-yocto] [PATCH 052/269] arch/arm: arm changes to support the axxia BSP

Bruce Ashfield bruce.ashfield at windriver.com
Wed Mar 21 09:40:48 PDT 2018


On 03/02/2018 12:46 PM, Daniel Dragomir wrote:
> From: Charlie Paul <Charlie.Paul at windriver.com>
> 
> These files were changed to support the LSI axxia 5500 board.

I'm finally looking at these, sorry for the delay. See some
questions below.

I have questions, since this commit log has no details. :D


> 
> Signed-off-by: Charlie Paul <Charlie.Paul at windriver.com>
> Signed-off-by: John Jacques <john.jacques at intel.com>
> ---
>   arch/arm/Kconfig                  | 84 ++++++++++++++++++++++++++++++++++++++-
>   arch/arm/Kconfig.debug            |  4 ++
>   arch/arm/Makefile                 |  2 +-
>   arch/arm/include/asm/kmap_types.h |  5 +++
>   arch/arm/include/asm/spinlock.h   |  6 +++
>   arch/arm/kernel/head.S            |  8 ++++
>   arch/arm/kernel/irq.c             |  2 +-
>   arch/arm/kernel/perf_event_v7.c   |  3 +-
>   arch/arm/tools/mach-types         |  1 +
>   9 files changed, 111 insertions(+), 4 deletions(-)
> 
> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
> index c0fcab6..0f6c9e0 100644
> --- a/arch/arm/Kconfig
> +++ b/arch/arm/Kconfig
> @@ -359,6 +359,29 @@ config ARM_SINGLE_ARMV7M
>   	select SPARSE_IRQ
>   	select USE_OF
>   
> +config ARCH_AXXIA
> +	bool "LSI Axxia family"
> +	select ARCH_PHYS_ADDR_T_64BIT
> +	select ARCH_DMA_ADDR_T_64BIT
> +	select ARCH_WANT_OPTIONAL_GPIOLIB
> +	select ARM_AMBA
> +	select COMMON_CLK
> +	select CLKDEV_LOOKUP
> +	select CLKSRC_MMIO
> +	select GENERIC_CLOCKEVENTS
> +	select HAVE_CLK
> +	select HAVE_PATA_PLATFORM
> +	select ARM_TIMER_SP804
> +	select ICST
> +	select NEED_MACH_IO_H
> +	select ZONE_DMA
> +	select PCI
> +	select PCI_DOMAINS if PCI
> +	select ARCH_SUPPORTS_MSI if PCI
> +	select HAS_RAPIDIO
> +	help
> +	  This enables support for the LSI Axxia boards.
> +
>   config ARCH_EBSA110
>   	bool "EBSA-110"
>   	select ARCH_USES_GETTIMEOFFSET
> @@ -839,6 +862,8 @@ source "arch/arm/mach-ux500/Kconfig"
>   
>   source "arch/arm/mach-versatile/Kconfig"
>   
> +source "arch/arm/mach-axxia/Kconfig"
> +
>   source "arch/arm/mach-vexpress/Kconfig"
>   source "arch/arm/plat-versatile/Kconfig"
>   
> @@ -1268,6 +1293,19 @@ source "drivers/pci/Kconfig"
>   
>   source "drivers/pcmcia/Kconfig"
>   
> +config HAS_RAPIDIO
> +	bool
> +	default n
> +
> +config RAPIDIO
> +	bool "RapidIO support"
> +	depends on HAS_RAPIDIO || PCI

Shouldn't this be an "&&", not an "||" ? This is going to get
turned on for every config that has PCI, which from the HAS_RAPIDIO
doesn't look to be the intent.

> +	help
> +          If you say Y here, the kernel will include drivers and
> +          infrastructure code to support RapidIO interconnect devices.
> +
> +source "drivers/rapidio/Kconfig"
> +
>   endmenu
>   
>   menu "Kernel Features"
> @@ -1438,12 +1476,46 @@ config NR_CPUS
>   	depends on SMP
>   	default "4"
>   
> +menu "Support for hot-pluggable CPUs"
> +
>   config HOTPLUG_CPU
>   	bool "Support for hot-pluggable CPUs"
> -	depends on SMP
> +	depends on SMP && HOTPLUG

I don't see why this is being changed. Depending on SMP should
still be enough.

>   	help
>   	  Say Y here to experiment with turning CPUs off and on.  CPUs
>   	  can be controlled through /sys/devices/system/cpu.
> +choice
> +	prompt "CPU Power Down Mode"
> +	default HOTPLUG_CPU_COMPLETE_POWER_DOWN
> +	help
> +		This is used to select how the CPU is going to be powered down. If LOW POWER
> +		is selected then the CPU enters a WFI state and waits for an interrupt to
> +		wake up. If COMPLETE POWER down is selected the CPU power is turned off. The only
> +		way to power on the CPU is to execute a command.
> +
> +config HOTPLUG_CPU_COMPLETE_POWER_DOWN
> +	bool "Power off the CPU"
> +	help
> +		This will power off the CPU completely. The irqs are migrated
> +		to another CPU.
> +
> +config HOTPLUG_CPU_LOW_POWER
> +	bool "Low Power CPU (wfi)"
> +	help
> +		This will put the CPU into a low power mode wfi mode. When an interrupt
> +		is received the CPU will power on again.
> +
> +endchoice
> +
> +config HOTPLUG_CPU_L2_POWER_DOWN
> +	bool "Power Off L2 Cache"
> +	depends on HOTPLUG_CPU_COMPLETE_POWER_DOWN
> +	default n if HOTPLUG_CPU_LOW_POWER
> +	help
> +		Select this if you want to power down the L2 cache when
> +		all CPUS of a cluster have been powered off.
> +
> +endmenu
>   
>   config ARM_PSCI
>   	bool "Support for the ARM Power State Coordination Interface (PSCI)"
> @@ -1456,6 +1528,16 @@ config ARM_PSCI
>   	  0022A ("Power State Coordination Interface System Software on
>   	  ARM processors").
>   
> +config LOCAL_TIMERS
> +	bool "Use local timer interrupts"
> +	depends on SMP
> +	default y

A new option, should never be default 'y'. This should be default 'n'
and just add it to your config frags, or select it in the top level
board Kconfig.

> +	help
> +	  Enable support for local timers on SMP platforms, rather then the
> +	  legacy IPI broadcast method.  Local timers allows the system
> +	  accounting to be spread across the timer interval, preventing a
> +	  "thundering herd" at every timer tick.
> +
>   # The GPIO number here must be sorted by descending number. In case of
>   # a multiplatform kernel, we just want the highest value required by the
>   # selected platforms.
> diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
> index 426d271..4f58e22 100644
> --- a/arch/arm/Kconfig.debug
> +++ b/arch/arm/Kconfig.debug
> @@ -145,6 +145,10 @@ choice
>   		  Say Y here if you want kernel low-level debugging support
>   		  on the USART3 port of sama5d4.
>   
> +	config DEBUG_LL_AXXIA_UART0
> +		bool "Kernel low-level debugging via UART0"
> +		depends on ARCH_AXXIA
> +
>   	config DEBUG_BCM2835
>   		bool "Kernel low-level debugging on BCM2835 PL011 UART"
>   		depends on ARCH_BCM2835 && ARCH_MULTI_V6
> diff --git a/arch/arm/Makefile b/arch/arm/Makefile
> index 4305557..ab5158d 100644
> --- a/arch/arm/Makefile
> +++ b/arch/arm/Makefile
> @@ -147,7 +147,7 @@ textofs-$(CONFIG_SA1111) := 0x00208000
>   endif
>   textofs-$(CONFIG_ARCH_MSM8X60) := 0x00208000
>   textofs-$(CONFIG_ARCH_MSM8960) := 0x00208000
> -textofs-$(CONFIG_ARCH_AXXIA) := 0x00308000
> +textofs-$(CONFIG_ARCH_AXXIA)   := 0x00408000
>   
>   # Machine directory name.  This list is sorted alphanumerically
>   # by CONFIG_* macro name.
> diff --git a/arch/arm/include/asm/kmap_types.h b/arch/arm/include/asm/kmap_types.h
> index 83eb2f7..3e527f9 100644
> --- a/arch/arm/include/asm/kmap_types.h
> +++ b/arch/arm/include/asm/kmap_types.h
> @@ -4,6 +4,11 @@
>   /*
>    * This is the "bare minimum".  AIO seems to require this.
>    */
> +#if (NR_CPUS > 15)
> +/* Prevent overlap between fixmap mapping and CPU vector page for 16th core */

This looks like it should be in an axxia #ifdef, or is the
implication that other 16 core machines should also be seeing
what this is trying to avoid ?

> +#define KM_TYPE_NR 15
> +#else
>   #define KM_TYPE_NR 16
> +#endif
>   
>   #endif
> diff --git a/arch/arm/include/asm/spinlock.h b/arch/arm/include/asm/spinlock.h
> index 4bec454..03ffd76 100644
> --- a/arch/arm/include/asm/spinlock.h
> +++ b/arch/arm/include/asm/spinlock.h
> @@ -88,7 +88,12 @@ static inline void arch_spin_lock(arch_spinlock_t *lock)
>   	: "cc");
>   
>   	while (lockval.tickets.next != lockval.tickets.owner) {
> +#ifdef CONFIG_ARCH_AXXIA
> +		extern void __axxia_arch_wfe(void);
> +		__axxia_arch_wfe();
> +#else
>   		wfe();
> +#endif
>   		lockval.tickets.owner = ACCESS_ONCE(lock->tickets.owner);
>   	}
>   
> @@ -141,6 +146,7 @@ static inline int arch_spin_is_locked(arch_spinlock_t *lock)
>   static inline int arch_spin_is_contended(arch_spinlock_t *lock)
>   {
>   	struct __raw_tickets tickets = READ_ONCE(lock->tickets);
> +

Whitespace damage in the patch.

>   	return (tickets.next - tickets.owner) > 1;
>   }
>   #define arch_spin_is_contended	arch_spin_is_contended
> diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S
> index 04286fd..e7441da 100644
> --- a/arch/arm/kernel/head.S
> +++ b/arch/arm/kernel/head.S
> @@ -52,8 +52,13 @@
>   	.equ	swapper_pg_dir, KERNEL_RAM_VADDR - PG_DIR_SIZE
>   
>   	.macro	pgtbl, rd, phys
> +#ifdef CONFIG_ARCH_AXXIA
> +	ldr	\rd, =(TEXT_OFFSET - PG_DIR_SIZE)
> +	add	\rd, \rd, \phys
> +#else
>   	add	\rd, \phys, #TEXT_OFFSET
>   	sub	\rd, \rd, #PG_DIR_SIZE
> +#endif
>   	.endm
>   
>   /*
> @@ -318,6 +323,9 @@ __create_page_tables:
>   #endif
>   #else
>   	orr	r3, r3, #PMD_SECT_XN
> +#ifdef CONFIG_ARCH_AXXIA
> +	orr	r7, r7, #0x20
> +#endif
>   	str	r3, [r0], #4
>   #endif
>   
> diff --git a/arch/arm/kernel/irq.c b/arch/arm/kernel/irq.c
> index ece04a4..0eb772f 100644
> --- a/arch/arm/kernel/irq.c
> +++ b/arch/arm/kernel/irq.c
> @@ -143,7 +143,7 @@ static bool migrate_one_irq(struct irq_desc *desc)
>   	c = irq_data_get_irq_chip(d);
>   	if (!c->irq_set_affinity)
>   		pr_debug("IRQ%u: unable to set affinity\n", d->irq);
> -	else if (c->irq_set_affinity(d, affinity, false) == IRQ_SET_MASK_OK && ret)
> +	else if (c->irq_set_affinity(d, affinity, true) == IRQ_SET_MASK_OK && ret)

This should be in an axxia #ifdef.

Yes, I know this is going into a BSP branch, but there's no reason
to not do the simple things to make it safe for all boards.

Bruce

>   		cpumask_copy(irq_data_get_affinity_mask(d), affinity);
>   
>   	return ret;
> diff --git a/arch/arm/kernel/perf_event_v7.c b/arch/arm/kernel/perf_event_v7.c
> index ab6522b..d6748e6 100644
> --- a/arch/arm/kernel/perf_event_v7.c
> +++ b/arch/arm/kernel/perf_event_v7.c
> @@ -94,6 +94,7 @@
>   #define ARMV7_A5_PERFCTR_PREFETCH_LINEFILL_DROP		0xc3
>   
>   /* ARMv7 Cortex-A15 specific event types */
> +#define ARMV7_A15_PERFCTR_CPU_CYCLES			0x11
>   #define ARMV7_A15_PERFCTR_L1_DCACHE_ACCESS_READ		0x40
>   #define ARMV7_A15_PERFCTR_L1_DCACHE_ACCESS_WRITE	0x41
>   #define ARMV7_A15_PERFCTR_L1_DCACHE_REFILL_READ		0x42
> @@ -295,7 +296,7 @@ static const unsigned armv7_a5_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
>    */
>   static const unsigned armv7_a15_perf_map[PERF_COUNT_HW_MAX] = {
>   	PERF_MAP_ALL_UNSUPPORTED,
> -	[PERF_COUNT_HW_CPU_CYCLES]		= ARMV7_PERFCTR_CPU_CYCLES,
> +	[PERF_COUNT_HW_CPU_CYCLES]		= ARMV7_A15_PERFCTR_CPU_CYCLES,
>   	[PERF_COUNT_HW_INSTRUCTIONS]		= ARMV7_PERFCTR_INSTR_EXECUTED,
>   	[PERF_COUNT_HW_CACHE_REFERENCES]	= ARMV7_PERFCTR_L1_DCACHE_ACCESS,
>   	[PERF_COUNT_HW_CACHE_MISSES]		= ARMV7_PERFCTR_L1_DCACHE_REFILL,
> diff --git a/arch/arm/tools/mach-types b/arch/arm/tools/mach-types
> index a9313b6..c4f179b 100644
> --- a/arch/arm/tools/mach-types
> +++ b/arch/arm/tools/mach-types
> @@ -598,3 +598,4 @@ missouri		MACH_MISSOURI		MISSOURI		5105
>   remarkable		MACH_REMARKABLE		REMARKABLE		5106
>   fa0113			MACH_FA0113		FA0113			5107
>   innova_statnettawm	MACH_INNOVA_STATNETTAWM	INNOVA_STATNETTAWM	5108
> +axxia			MACH_AXXIA		AXXIA			4173
> \ No newline at end of file
> 



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