[linux-yocto] [PATCH 2/3] arch/arm/mach-axxia: Clean Up the Mapping of Dickens

[Cristian Bercaru]

From: John Jacques <john.jacques at intel.com>

Dickens was mapped in a number of places, and inconsistently at that.
This commit changes that; Dickens is mapped in one place.

Signed-off-by: John Jacques <john.jacques at intel.com>
---
 arch/arm/mach-axxia/axxia.c         |    5 +--
 arch/arm/mach-axxia/axxia.h         |    2 +-
 arch/arm/mach-axxia/ddr_retention.c |   67 +----------------------------------
 arch/arm/mach-axxia/platsmp.c       |    6 ----
 4 files changed, 5 insertions(+), 75 deletions(-)

diff --git a/arch/arm/mach-axxia/axxia.c b/arch/arm/mach-axxia/axxia.c
index 2105c32..1df6353 100644
--- a/arch/arm/mach-axxia/axxia.c
+++ b/arch/arm/mach-axxia/axxia.c
@@ -62,6 +62,7 @@ static const char *axxia_dt_match[] __initconst = {
 };
 
 static void __iomem *base;
+void __iomem *dickens;
 
 #ifdef AXXIA_NCR_RESET_CHECK
 int ncr_reset_active;
@@ -91,7 +92,7 @@ static void set_l3_pstate(u32 newstate)
 	}
 }
 
-static void
+void
 flush_l3(void)
 {
 	/* Switch to SFONLY to flush */
@@ -202,7 +203,7 @@ void __init axxia_dt_init(void)
 {
 	base = ioremap(0x2010000000, 0x40000);
 	if (!of_find_compatible_node(NULL, NULL, "lsi,axm5500-sim")) {
-		dickens = ioremap(0x2000000000, SZ_4M);
+		dickens = ioremap(0x2000000000, SZ_16M);
 #ifdef CONFIG_KEXEC
 		kexec_reinit = flush_l3;
 #endif
diff --git a/arch/arm/mach-axxia/axxia.h b/arch/arm/mach-axxia/axxia.h
index 6fd9474..5b83378 100644
--- a/arch/arm/mach-axxia/axxia.h
+++ b/arch/arm/mach-axxia/axxia.h
@@ -4,8 +4,8 @@ void axxia_init_clocks(int is_sim);
 void axxia_ddr_retention_init(void);
 void axxia_platform_cpu_die(unsigned int cpu);
 int axxia_platform_cpu_kill(unsigned int cpu);
-
 void ncp_ddr_shutdown(void *, void *, unsigned long);
+void flush_l3(void);
 
 extern void axxia_secondary_startup(void);
 
diff --git a/arch/arm/mach-axxia/ddr_retention.c b/arch/arm/mach-axxia/ddr_retention.c
index eb2f571..1bf3e8f 100644
--- a/arch/arm/mach-axxia/ddr_retention.c
+++ b/arch/arm/mach-axxia/ddr_retention.c
@@ -36,9 +36,6 @@
 
 static void __iomem *nca;
 static void __iomem *apb;
-#ifndef CONFIG_SMP
-void __iomem *dickens;
-#endif
 static int ddr_retention_enabled;
 
 enum {
@@ -80,67 +77,6 @@ ncp_cnal_regions_acp55xx[] = {
 	NCP_REGION_ID(0xff, 0xff)
 };
 
-
-/*
-  ------------------------------------------------------------------------------
-  flush_l3
-
-  This is NOT a general function to flush the L3 cache.  There are a number of
-  assumptions that are not usually true...
-
-  1) All other cores are " quiesced".
-  2) There is no need to worry about preemption or interrupts.
-*/
-
-static void
-flush_l3(void)
-{
-
-	unsigned long hnf_offsets[] = {
-		0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27
-	};
-
-	int i;
-	unsigned long status;
-	int retries;
-
-	for (i = 0; i < (sizeof(hnf_offsets) / sizeof(unsigned long)); ++i)
-		writel(0x0, dickens + (0x10000 * hnf_offsets[i]) + 0x10);
-
-	for (i = 0; i < (sizeof(hnf_offsets) / sizeof(unsigned long)); ++i) {
-		retries = 10000;
-
-		do {
-			status = readl(dickens +
-				       (0x10000 * hnf_offsets[i]) + 0x18);
-			udelay(1);
-		} while ((0 < --retries) && (0x0 != (status & 0xf)));
-
-		if (0 == retries)
-			BUG();
-	}
-
-	for (i = 0; i < (sizeof(hnf_offsets) / sizeof(unsigned long)); ++i)
-		writel(0x3, dickens + (0x10000 * hnf_offsets[i]) + 0x10);
-
-	for (i = 0; i < (sizeof(hnf_offsets) / sizeof(unsigned long)); ++i) {
-		retries = 10000;
-
-		do {
-			status = readl(dickens +
-				       (0x10000 * hnf_offsets[i]) + 0x18);
-			udelay(1);
-		} while ((0 < --retries) && (0xc != (status & 0xf)));
-
-		if (0 == retries)
-			BUG();
-	}
-
-	asm volatile ("dsb" : : : "memory");
-
-	return;
-}
-
 static void
 quiesce_vp_engine(int engine_type)
 {
@@ -300,7 +236,7 @@ initiate_retention_reset(void)
 		return;
 	}
 
-	if (NULL == nca || NULL == apb || NULL == dickens)
+	if (NULL == nca || NULL == apb)
 		BUG();
 
 	preempt_disable();
@@ -376,7 +312,6 @@ axxia_ddr_retention_init(void)
 		} else {
 			apb = ioremap(0x2010000000, 0x80000);
 			nca = ioremap(0x002020100000ULL, 0x20000);
-			dickens = ioremap(0x2000000000, 0x1000000);
 			ddr_retention_enabled = 1;
 			pr_info("DDR Retention Reset Initialized\n");
 		}
diff --git a/arch/arm/mach-axxia/platsmp.c b/arch/arm/mach-axxia/platsmp.c
index 6472734..c17063f 100644
--- a/arch/arm/mach-axxia/platsmp.c
+++ b/arch/arm/mach-axxia/platsmp.c
@@ -27,13 +27,11 @@
 #include <mach/axxia-gic.h>
 
 #define SYSCON_PHYS_ADDR 0x002010030000ULL
-#define DICKENS_PHYS_ADDR 0x2000000000
 
 static int __cpuinitdata wfe_fixup;
 static int wfe_available;
 
 void __iomem *syscon;
-void __iomem *dickens;
 
 inline void
 __axxia_arch_wfe(void)
@@ -234,10 +232,6 @@ static void __init axxia_smp_prepare_cpus(unsigned int max_cpus)
 	if (WARN_ON(!syscon))
 		return;
 
-	dickens = ioremap(DICKENS_PHYS_ADDR, SZ_4M);
-	if (WARN_ON(!dickens))
-		return;
-
 	check_fixup_sev(syscon);
 	do_fixup_sev();
 
-- 
1.7.9.5