[linux-yocto] [PATCH 01/42] arch/arm/boot/dts: Files added to support axxia 5500 board

Cristian Bercaru cristian.bercaru at windriver.com
Thu Jun 11 01:31:46 PDT 2015


From: Charlie Paul <cpaul.windriver at gmail.com>

Dts files added to support the AXXIA 5500 board.

Signed-off-by: Charlie Paul <cpaul.windriver at gmail.com>
---
 arch/arm/boot/dts/Makefile               |    9 +
 arch/arm/boot/dts/axm5504-cpus.dtsi      |   49 ++++
 arch/arm/boot/dts/axm5504-emu.dts        |   46 ++++
 arch/arm/boot/dts/axm5504-sim-mmc.dts    |  127 +++++++++
 arch/arm/boot/dts/axm5504-sim-virtio.dts |  126 +++++++++
 arch/arm/boot/dts/axm5504-sim.dts        |  133 +++++++++
 arch/arm/boot/dts/axm5507-cpus.dtsi      |   73 +++++
 arch/arm/boot/dts/axm5507-emu.dts        |   46 ++++
 arch/arm/boot/dts/axm5508-amarillo.dts   |  229 ++++++++++++++++
 arch/arm/boot/dts/axm5508-cpus.dtsi      |   81 ++++++
 arch/arm/boot/dts/axm5512-amarillo.dts   |  229 ++++++++++++++++
 arch/arm/boot/dts/axm5512-cpus.dtsi      |  114 ++++++++
 arch/arm/boot/dts/axm5516-amarillo.dts   |  233 ++++++++++++++++
 arch/arm/boot/dts/axm5516-cpus.dtsi      |  145 ++++++++++
 arch/arm/boot/dts/axm5516-sim-common.dts |  131 +++++++++
 arch/arm/boot/dts/axm5516-sim-mmc.dts    |  127 +++++++++
 arch/arm/boot/dts/axm5516-sim-virtio.dts |  126 +++++++++
 arch/arm/boot/dts/axm5516-sim.dts        |  133 +++++++++
 arch/arm/boot/dts/axm55xx.dtsi           |  442 ++++++++++++++++++++++++++++++
 19 files changed, 2599 insertions(+)
 create mode 100644 arch/arm/boot/dts/axm5504-cpus.dtsi
 create mode 100644 arch/arm/boot/dts/axm5504-emu.dts
 create mode 100644 arch/arm/boot/dts/axm5504-sim-mmc.dts
 create mode 100644 arch/arm/boot/dts/axm5504-sim-virtio.dts
 create mode 100644 arch/arm/boot/dts/axm5504-sim.dts
 create mode 100644 arch/arm/boot/dts/axm5507-cpus.dtsi
 create mode 100644 arch/arm/boot/dts/axm5507-emu.dts
 create mode 100644 arch/arm/boot/dts/axm5508-amarillo.dts
 create mode 100644 arch/arm/boot/dts/axm5508-cpus.dtsi
 create mode 100644 arch/arm/boot/dts/axm5512-amarillo.dts
 create mode 100644 arch/arm/boot/dts/axm5512-cpus.dtsi
 create mode 100644 arch/arm/boot/dts/axm5516-amarillo.dts
 create mode 100644 arch/arm/boot/dts/axm5516-cpus.dtsi
 create mode 100644 arch/arm/boot/dts/axm5516-sim-common.dts
 create mode 100644 arch/arm/boot/dts/axm5516-sim-mmc.dts
 create mode 100644 arch/arm/boot/dts/axm5516-sim-virtio.dts
 create mode 100644 arch/arm/boot/dts/axm5516-sim.dts
 create mode 100644 arch/arm/boot/dts/axm55xx.dtsi

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 29cc71e..e7aa170 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -318,6 +318,15 @@ dtb-$(CONFIG_ARCH_VT8500) += vt8500-bv07.dtb \
 	wm8650-mid.dtb \
 	wm8750-apc8750.dtb \
 	wm8850-w70v2.dtb
+dtb-$(CONFIG_ARCH_AXXIA) += axm5504-sim-mmc.dtb \
+	axm5504-sim-virtio.dtb \
+	axm5516-sim-mmc.dtb \
+	axm5516-sim-virtio.dtb \
+	axm5504-emu.dtb \
+	axm5507-emu.dtb \
+	axm5516-amarillo.dtb \
+	axm5512-amarillo.dtb \
+	axm5508-amarillo.dtb
 dtb-$(CONFIG_ARCH_ZYNQ) += zynq-zc702.dtb \
 	zynq-zc706.dtb \
 	zynq-zed.dtb
diff --git a/arch/arm/boot/dts/axm5504-cpus.dtsi b/arch/arm/boot/dts/axm5504-cpus.dtsi
new file mode 100644
index 0000000..f76d716
--- /dev/null
+++ b/arch/arm/boot/dts/axm5504-cpus.dtsi
@@ -0,0 +1,49 @@
+/*
+ * arch/arm/boot/dts/axm5504-cpus.dtsi
+ *
+ * Copyright (C) 2013 LSI
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+/ {
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		cpu at 0 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a15";
+			reg = <0x00>;
+			cpu-release-addr = <0>; // Fixed by the boot loader
+			clock-frequency = <0>;  // Placeholder
+		};
+
+		cpu at 1 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a15";
+			reg = <0x01>;
+			cpu-release-addr = <0>; // Fixed by the boot loader
+			clock-frequency = <0>;  // Placeholder
+		};
+
+		cpu at 2 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a15";
+			reg = <0x02>;
+			cpu-release-addr = <0>; // Fixed by the boot loader
+			clock-frequency = <0>;  // Placeholder
+		};
+
+		cpu at 3 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a15";
+			reg = <0x03>;
+			cpu-release-addr = <0>; // Fixed by the boot loader
+			clock-frequency = <0>;  // Placeholder
+		};
+	};
+};
diff --git a/arch/arm/boot/dts/axm5504-emu.dts b/arch/arm/boot/dts/axm5504-emu.dts
new file mode 100644
index 0000000..0e37f8e
--- /dev/null
+++ b/arch/arm/boot/dts/axm5504-emu.dts
@@ -0,0 +1,46 @@
+/*
+ * arch/arm/boot/dts/axm5504-emulation.dts
+ *
+ * Copyright (C) 2013 LSI
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+/dts-v1/;
+
+/memreserve/ 0x00000000 0x00400000;
+
+/include/ "axm55xx.dtsi"
+/include/ "axm5504-cpus.dtsi"
+
+/ {
+	model = "Emulation Platform AXM5500";
+	compatible = "lsi,axm5500-emu", "lsi,axm5500";
+
+	memory {
+		device_type = "memory";
+		reg = <0 0x00000000 0 0x10000000>;
+	};
+};
+
+&femac {
+	status = "okay";
+	phy-address = <0x03>;
+	mdio-clock-offset = <0x10>;
+	mdio-clock-period = <0x2c>;
+};
+
+&serial0 {
+	status = "okay";
+};
+
+&gpio0 {
+	status = "okay";
+};
+
+&gpio1 {
+	status = "okay";
+};
diff --git a/arch/arm/boot/dts/axm5504-sim-mmc.dts b/arch/arm/boot/dts/axm5504-sim-mmc.dts
new file mode 100644
index 0000000..22ee70f
--- /dev/null
+++ b/arch/arm/boot/dts/axm5504-sim-mmc.dts
@@ -0,0 +1,127 @@
+/*
+ * arch/arm/boot/dts/axm5504-amarillo.dts
+ *
+ * Copyright (C) 2013 LSI
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+/dts-v1/;
+
+/memreserve/ 0x00000000 0x00400000;
+
+/include/ "axm55xx.dtsi"
+/include/ "axm5504-cpus.dtsi"
+
+/ {
+	model = "Simulation Platform AXM5500";
+	compatible = "lsi,axm5500-sim", "lsi,axm5500";
+
+	memory {
+		device_type = "memory";
+		reg = <0 0x00000000 0 0x40000000>;
+	};
+
+	clocks {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		cpu {
+			frequency = <1400000000>;
+		};
+
+		peripheral {
+			frequency = <400000000>;
+		};
+
+		emmc {
+			frequency = <25000000>;
+		};
+	};
+
+	sim {
+		compatible = "arm,amba-bus", "simple-bus";
+		device_type = "soc";
+		#address-cells = <2>;
+		#size-cells = <2>;
+		interrupt-parent = <&gic>;
+		ranges;
+
+		mmci at 020101E0000 {
+			compatible = "arm,pl180", "arm,primecell";
+			reg = <0x20 0x101E0000 0x00 0x1000>;
+			interrupts = <0 222 4>,
+				     <0 223 4>;
+		};
+
+		ethernet at 201100000000 {
+			compatible = "smsc,lan91c111";
+			device_type = "network";
+			reg = <0x20 0x11000000 0 0x10000>;
+			interrupts = <0 1 4>;
+			phy-mode = "mii";
+			reg-io-width = <4>;
+			smsc,irq-active-high;
+			smsc,irq-push-pull;
+		};
+	};
+};
+
+&mtc {
+	status = "okay";
+};
+
+&pcie0 {
+	status = "okay";
+};
+
+&pcie1 {
+	status = "okay";
+};
+
+&serial0 {
+	status = "okay";
+};
+
+&serial1 {
+	status = "okay";
+};
+
+&serial2 {
+	status = "okay";
+};
+
+&serial3 {
+	status = "okay";
+};
+
+&gpio0 {
+	status = "okay";
+};
+
+&gpio1 {
+	status = "okay";
+};
+
+&spics {
+	status = "okay";
+};
+
+&spi0 {
+	status = "okay";
+};
+
+&i2c1 {
+	status = "okay";
+};
+
+&i2c2 {
+	status = "okay";
+};
+
+&i2c3 {
+	status = "okay";
+};
diff --git a/arch/arm/boot/dts/axm5504-sim-virtio.dts b/arch/arm/boot/dts/axm5504-sim-virtio.dts
new file mode 100644
index 0000000..68560e5
--- /dev/null
+++ b/arch/arm/boot/dts/axm5504-sim-virtio.dts
@@ -0,0 +1,126 @@
+/*
+ * arch/arm/boot/dts/axm5504-amarillo.dts
+ *
+ * Copyright (C) 2013 LSI
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+/dts-v1/;
+
+/memreserve/ 0x00000000 0x00400000;
+
+/include/ "axm55xx.dtsi"
+/include/ "axm5504-cpus.dtsi"
+
+/ {
+	model = "Simulation Platform AXM5500";
+	compatible = "lsi,axm5500-sim", "lsi,axm5500";
+
+	memory {
+		device_type = "memory";
+		reg = <0 0x00000000 0 0x40000000>;
+	};
+
+	clocks {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		cpu {
+			frequency = <1400000000>;
+		};
+
+		peripheral {
+			frequency = <400000000>;
+		};
+
+		emmc {
+			frequency = <25000000>;
+		};
+	};
+
+	sim {
+		compatible = "arm,amba-bus", "simple-bus";
+		device_type = "soc";
+		#address-cells = <2>;
+		#size-cells = <2>;
+		interrupt-parent = <&gic>;
+		ranges;
+
+		virtio_block at 0130000 {
+			compatible = "virtio,mmio";
+			reg = <0x20 0x101f0000 0 0x10000>;
+			interrupts = <0 223 4>;
+		};
+
+		ethernet at 201100000000 {
+			compatible = "smsc,lan91c111";
+			device_type = "network";
+			reg = <0x20 0x11000000 0 0x10000>;
+			interrupts = <0 1 4>;
+			phy-mode = "mii";
+			reg-io-width = <4>;
+			smsc,irq-active-high;
+			smsc,irq-push-pull;
+		};
+	};
+};
+
+&mtc {
+	status = "okay";
+};
+
+&pcie0 {
+	status = "okay";
+};
+
+&pcie1 {
+	status = "okay";
+};
+
+&serial0 {
+	status = "okay";
+};
+
+&serial1 {
+	status = "okay";
+};
+
+&serial2 {
+	status = "okay";
+};
+
+&serial3 {
+	status = "okay";
+};
+
+&gpio0 {
+	status = "okay";
+};
+
+&gpio1 {
+	status = "okay";
+};
+
+&spics {
+	status = "okay";
+};
+
+&spi0 {
+	status = "okay";
+};
+
+&i2c1 {
+	status = "okay";
+};
+
+&i2c2 {
+	status = "okay";
+};
+
+&i2c3 {
+	status = "okay";
+};
diff --git a/arch/arm/boot/dts/axm5504-sim.dts b/arch/arm/boot/dts/axm5504-sim.dts
new file mode 100644
index 0000000..bbb922a
--- /dev/null
+++ b/arch/arm/boot/dts/axm5504-sim.dts
@@ -0,0 +1,133 @@
+/*
+ * arch/arm/boot/dts/axm5516-amarillo.dts
+ *
+ * Copyright (C) 2013 LSI
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+/dts-v1/;
+
+/memreserve/ 0x00000000 0x00400000;
+
+/include/ "axm55xx.dtsi"
+/include/ "axm5504-cpus.dtsi"
+
+/ {
+	model = "Simulation Platform AXM55xx";
+	compatible = "lsi,axm5516-sim", "lsi,axm5516";
+
+	memory {
+		device_type = "memory";
+		reg = <0 0x00000000 0 0x40000000>;
+	};
+
+	clocks {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		cpu {
+			frequency = <1400000000>;
+		};
+
+		peripheral {
+			frequency = <400000000>;
+		};
+
+		emmc {
+			frequency = <25000000>;
+		};
+	};
+
+	sim {
+		compatible = "arm,amba-bus", "simple-bus";
+		device_type = "soc";
+		#address-cells = <2>;
+		#size-cells = <2>;
+		interrupt-parent = <&gic>;
+		ranges;
+
+		virtio_block at 0130000 {
+                compatible = "virtio,mmio";
+                reg = <0x20 0x101f0000 0 0x10000>;
+                interrupts = <0 223 4>;
+		};
+
+		mmci at 020101E0000 {
+			compatible = "arm,pl180", "arm,primecell";
+			reg = <0x20 0x101E0000 0x00 0x1000>;
+			interrupts = <0 222 4>,
+				     <0 223 4>;
+		};
+
+		ethernet at 201100000000 {
+			compatible = "smsc,lan91c111";
+			device_type = "network";
+			reg = <0x20 0x11000000 0 0x10000>;
+			interrupts = <0 1 4>;
+			phy-mode = "mii";
+			reg-io-width = <4>;
+			smsc,irq-active-high;
+			smsc,irq-push-pull;
+		};
+	};
+};
+
+&mtc {
+	status = "okay";
+};
+
+&pcie0 {
+	status = "okay";
+};
+
+&pcie1 {
+	status = "okay";
+};
+
+&serial0 {
+	status = "okay";
+};
+
+&serial1 {
+	status = "okay";
+};
+
+&serial2 {
+	status = "okay";
+};
+
+&serial3 {
+	status = "okay";
+};
+
+&gpio0 {
+	status = "okay";
+};
+
+&gpio1 {
+	status = "okay";
+};
+
+&spics {
+	status = "okay";
+};
+
+&spi0 {
+	status = "okay";
+};
+
+&i2c1 {
+	status = "okay";
+};
+
+&i2c2 {
+	status = "okay";
+};
+
+&i2c3 {
+	status = "okay";
+};
diff --git a/arch/arm/boot/dts/axm5507-cpus.dtsi b/arch/arm/boot/dts/axm5507-cpus.dtsi
new file mode 100644
index 0000000..a32372b
--- /dev/null
+++ b/arch/arm/boot/dts/axm5507-cpus.dtsi
@@ -0,0 +1,73 @@
+/*
+ * arch/arm/boot/dts/axm5508-cpus.dtsi
+ *
+ * Copyright (C) 2013 LSI
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+/ {
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		cpu at 0 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a15";
+			reg = <0x00>;
+			cpu-release-addr = <0>; // Fixed by the boot loader
+			clock-frequency = <0>;  // Placeholder
+		};
+
+		cpu at 1 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a15";
+			reg = <0x01>;
+			cpu-release-addr = <0>; // Fixed by the boot loader
+			clock-frequency = <0>;  // Placeholder
+		};
+
+		cpu at 2 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a15";
+			reg = <0x02>;
+			cpu-release-addr = <0>; // Fixed by the boot loader
+			clock-frequency = <0>;  // Placeholder
+		};
+
+		cpu at 3 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a15";
+			reg = <0x03>;
+			cpu-release-addr = <0>; // Fixed by the boot loader
+			clock-frequency = <0>;  // Placeholder
+		};
+
+		cpu at 4 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a15";
+			reg = <0x04>;
+			cpu-release-addr = <0>; // Fixed by the boot loader
+			clock-frequency = <0>;  // Placeholder
+		};
+
+		cpu at 5 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a15";
+			reg = <0x05>;
+			cpu-release-addr = <0>; // Fixed by the boot loader
+			clock-frequency = <0>;  // Placeholder
+		};
+
+		cpu at 6 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a15";
+			reg = <0x06>;
+			cpu-release-addr = <0>; // Fixed by the boot loader
+			clock-frequency = <0>;  // Placeholder
+		};
+	};
+};
diff --git a/arch/arm/boot/dts/axm5507-emu.dts b/arch/arm/boot/dts/axm5507-emu.dts
new file mode 100644
index 0000000..2fc938b
--- /dev/null
+++ b/arch/arm/boot/dts/axm5507-emu.dts
@@ -0,0 +1,46 @@
+/*
+ * arch/arm/boot/dts/axm5507-emu.dts
+ *
+ * Copyright (C) 2013 LSI
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+/dts-v1/;
+
+/memreserve/ 0x00000000 0x00400000;
+
+/include/ "axm55xx.dtsi"
+/include/ "axm5507-cpus.dtsi"
+
+/ {
+	model = "Emulation Platform AXM5500";
+	compatible = "lsi,axm5500-emu", "lsi,axm5500";
+
+	memory {
+		device_type = "memory";
+		reg = <0 0x00000000 0 0x10000000>;
+	};
+};
+
+&femac {
+	status = "okay";
+	phy-address = <0x03>;
+	mdio-clock-offset = <0x10>;
+	mdio-clock-period = <0x2c>;
+};
+
+&serial0 {
+	status = "okay";
+};
+
+&gpio0 {
+	status = "okay";
+};
+
+&gpio1 {
+	status = "okay";
+};
diff --git a/arch/arm/boot/dts/axm5508-amarillo.dts b/arch/arm/boot/dts/axm5508-amarillo.dts
new file mode 100644
index 0000000..c24234a
--- /dev/null
+++ b/arch/arm/boot/dts/axm5508-amarillo.dts
@@ -0,0 +1,229 @@
+/*
+ * arch/arm/boot/dts/axm5508-amarillo.dts
+ *
+ * Copyright (C) 2013 LSI
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+/dts-v1/;
+
+/memreserve/ 0x00000000 0x00400000;
+
+/include/ "axm55xx.dtsi"
+/include/ "axm5508-cpus.dtsi"
+
+/ {
+	model = "Amarillo AXM5500";
+	compatible = "lsi,axm5500-amarillo", "lsi,axm5500";
+
+	memory {
+		device_type = "memory";
+		reg = <0 0x00000000 0 0x40000000>;
+	};
+};
+
+&femac {
+	status = "okay";
+	mdio-clock-offset = <0x1c>;
+	mdio-clock-period = <0xf0>;
+};
+
+&ccn {
+	status = "okay";
+};
+
+&perf_platform {
+	status = "okay";
+};
+
+&sm0 {
+	status = "okay";
+};
+
+&sm1 {
+	status = "okay";
+};
+
+&pcie0 {
+	status = "okay";
+};
+
+&pcie1 {
+	status = "okay";
+};
+
+&rio0 {
+	status = "okay";
+};
+
+&rio1 {
+	status = "okay";
+};
+
+&usb0 {
+	status = "okay";
+};
+
+&mtc {
+	status = "okay";
+};
+
+&serial0 {
+	status = "okay";
+};
+
+&serial1 {
+	status = "okay";
+};
+
+&serial2 {
+	status = "okay";
+};
+
+&serial3 {
+	status = "okay";
+};
+
+&gpio0 {
+	status = "okay";
+};
+
+&gpio1 {
+	status = "okay";
+};
+
+&spics {
+	status = "okay";
+};
+
+&spi0 {
+	status = "okay";
+
+	flash at 0 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "s25fl129p1";
+		reg = <0x0>;
+		spi-max-frequency = <25000000>;
+		pl022,com-mode = <0>;
+
+		partition at 0 {
+			label = "spl";
+			reg = <0x0 0x40000>;
+		};
+		partition at 40000 {
+			label = "parameters0";
+			reg = <0x40000 0x10000>;
+		};
+		partition at 50000 {
+			label = "parameters1";
+			reg = <0x50000 0x10000>;
+		};
+		partition at 60000 {
+			label = "env0";
+			reg = <0x60000 0x10000>;
+		};
+		partition at 70000 {
+			label = "env1";
+			reg = <0x70000 0x10000>;
+		};
+		partition at 100000 {
+			label = "u-boot0";
+			reg = <0x100000 0x200000>;
+		};
+		partition at 300000 {
+			label = "u-boot1";
+			reg = <0x300000 0x200000>;
+		};
+	};
+};
+
+&i2c0 {
+	status = "okay";
+
+	sysfpga at 40 {
+		reg = <0x40>;
+	};
+};
+
+&i2c1 {
+	status = "okay";
+
+	pxa9555 at 20 {
+		compatible = "pca9555";
+		reg = <0x20>;
+	};
+
+	adt7467 at 2e {
+		compatible = "adt7473";
+		reg = <0x2e>;
+	};
+
+	temp at 18 {
+		compatible = "jc42";
+		reg = <0x18>;
+	};
+
+	temp at 1a {
+		compatible = "jc42";
+		reg = <0x1a>;
+	};
+
+	spd at 50 {
+		compatible = "spd";
+		reg = <0x50>;
+	};
+
+	spd at 52 {
+		compatible = "spd";
+		reg = <0x52>;
+	};
+
+	eeprom at 54 {
+		compatible = "24c1024";
+		reg = <0x54>;
+		pagesize = <128>;
+	};
+};
+
+&i2c2 {
+	status = "okay";
+
+	pxa9544 at 70 {
+		compatible = "pca9544";
+		reg = <0x70>;
+	};
+
+	pxa9544 at 71 {
+		compatible = "pca9544";
+		reg = <0x71>;
+	};
+
+	pxa9544 at 72 {
+		compatible = "pca9544";
+		reg = <0x72>;
+	};
+
+	pxa9544 at 73 {
+		compatible = "pca9544";
+		reg = <0x73>;
+	};
+};
+
+&i2c3 {
+	status = "okay";
+
+	ltc2974 at 5c {
+		compatible = "ltc2974";
+		reg = <0x5c>;
+	};
+
+	ltc2974 at 5d {
+		compatible = "ltc2974";
+		reg = <0x5d>;
+	};
+};
diff --git a/arch/arm/boot/dts/axm5508-cpus.dtsi b/arch/arm/boot/dts/axm5508-cpus.dtsi
new file mode 100644
index 0000000..85ee3e4
--- /dev/null
+++ b/arch/arm/boot/dts/axm5508-cpus.dtsi
@@ -0,0 +1,81 @@
+/*
+ * arch/arm/boot/dts/axm5508-cpus.dtsi
+ *
+ * Copyright (C) 2013 LSI
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+/ {
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		cpu at 0 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a15";
+			reg = <0x00>;
+			cpu-release-addr = <0>; // Fixed by the boot loader
+			clock-frequency = <0>;  // Placeholder
+		};
+
+		cpu at 1 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a15";
+			reg = <0x01>;
+			cpu-release-addr = <0>; // Fixed by the boot loader
+			clock-frequency = <0>;  // Placeholder
+		};
+
+		cpu at 2 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a15";
+			reg = <0x02>;
+			cpu-release-addr = <0>; // Fixed by the boot loader
+			clock-frequency = <0>;  // Placeholder
+		};
+
+		cpu at 3 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a15";
+			reg = <0x03>;
+			cpu-release-addr = <0>; // Fixed by the boot loader
+			clock-frequency = <0>;  // Placeholder
+		};
+
+		cpu at 4 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a15";
+			reg = <0x04>;
+			cpu-release-addr = <0>; // Fixed by the boot loader
+			clock-frequency = <0>;  // Placeholder
+		};
+
+		cpu at 5 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a15";
+			reg = <0x05>;
+			cpu-release-addr = <0>; // Fixed by the boot loader
+			clock-frequency = <0>;  // Placeholder
+		};
+
+		cpu at 6 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a15";
+			reg = <0x06>;
+			cpu-release-addr = <0>; // Fixed by the boot loader
+			clock-frequency = <0>;  // Placeholder
+		};
+
+		cpu at 7 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a15";
+			reg = <0x07>;
+			cpu-release-addr = <0>; // Fixed by the boot loader
+			clock-frequency = <0>;  // Placeholder
+		};
+	};
+};
diff --git a/arch/arm/boot/dts/axm5512-amarillo.dts b/arch/arm/boot/dts/axm5512-amarillo.dts
new file mode 100644
index 0000000..5567b80
--- /dev/null
+++ b/arch/arm/boot/dts/axm5512-amarillo.dts
@@ -0,0 +1,229 @@
+/*
+ * arch/arm/boot/dts/axm5512-amarillo.dts
+ *
+ * Copyright (C) 2013 LSI
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+/dts-v1/;
+
+/memreserve/ 0x00000000 0x00400000;
+
+/include/ "axm55xx.dtsi"
+/include/ "axm5512-cpus.dtsi"
+
+/ {
+	model = "Amarillo AXM5500";
+	compatible = "lsi,axm5500-amarillo", "lsi,axm5500";
+
+	memory {
+		device_type = "memory";
+		reg = <0 0x00000000 0 0x40000000>;
+	};
+};
+
+&femac {
+	status = "okay";
+	mdio-clock-offset = <0x1c>;
+	mdio-clock-period = <0xf0>;
+};
+
+&ccn {
+	status = "okay";
+};
+
+&perf_platform {
+	status = "okay";
+};
+
+&sm0 {
+	status = "okay";
+};
+
+&sm1 {
+	status = "okay";
+};
+
+&pcie0 {
+	status = "okay";
+};
+
+&pcie1 {
+	status = "okay";
+};
+
+&rio0 {
+	status = "okay";
+};
+
+&rio1 {
+	status = "okay";
+};
+
+&usb0 {
+	status = "okay";
+};
+
+&mtc {
+	status = "okay";
+};
+
+&serial0 {
+	status = "okay";
+};
+
+&serial1 {
+	status = "okay";
+};
+
+&serial2 {
+	status = "okay";
+};
+
+&serial3 {
+	status = "okay";
+};
+
+&gpio0 {
+	status = "okay";
+};
+
+&gpio1 {
+	status = "okay";
+};
+
+&spics {
+	status = "okay";
+};
+
+&spi0 {
+	status = "okay";
+
+	flash at 0 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "s25fl129p1";
+		reg = <0x0>;
+		spi-max-frequency = <25000000>;
+		pl022,com-mode = <0>;
+
+		partition at 0 {
+			label = "spl";
+			reg = <0x0 0x40000>;
+		};
+		partition at 40000 {
+			label = "parameters0";
+			reg = <0x40000 0x10000>;
+		};
+		partition at 50000 {
+			label = "parameters1";
+			reg = <0x50000 0x10000>;
+		};
+		partition at 60000 {
+			label = "env0";
+			reg = <0x60000 0x10000>;
+		};
+		partition at 70000 {
+			label = "env1";
+			reg = <0x70000 0x10000>;
+		};
+		partition at 100000 {
+			label = "u-boot0";
+			reg = <0x100000 0x200000>;
+		};
+		partition at 300000 {
+			label = "u-boot1";
+			reg = <0x300000 0x200000>;
+		};
+	};
+};
+
+&i2c0 {
+	status = "okay";
+
+	sysfpga at 40 {
+		reg = <0x40>;
+	};
+};
+
+&i2c1 {
+	status = "okay";
+
+	pxa9555 at 20 {
+		compatible = "pca9555";
+		reg = <0x20>;
+	};
+
+	adt7467 at 2e {
+		compatible = "adt7473";
+		reg = <0x2e>;
+	};
+
+	temp at 18 {
+		compatible = "jc42";
+		reg = <0x18>;
+	};
+
+	temp at 1a {
+		compatible = "jc42";
+		reg = <0x1a>;
+	};
+
+	spd at 50 {
+		compatible = "spd";
+		reg = <0x50>;
+	};
+
+	spd at 52 {
+		compatible = "spd";
+		reg = <0x52>;
+	};
+
+	eeprom at 54 {
+		compatible = "24c1024";
+		reg = <0x54>;
+		pagesize = <128>;
+	};
+};
+
+&i2c2 {
+	status = "okay";
+
+	pxa9544 at 70 {
+		compatible = "pca9544";
+		reg = <0x70>;
+	};
+
+	pxa9544 at 71 {
+		compatible = "pca9544";
+		reg = <0x71>;
+	};
+
+	pxa9544 at 72 {
+		compatible = "pca9544";
+		reg = <0x72>;
+	};
+
+	pxa9544 at 73 {
+		compatible = "pca9544";
+		reg = <0x73>;
+	};
+};
+
+&i2c3 {
+	status = "okay";
+
+	ltc2974 at 5c {
+		compatible = "ltc2974";
+		reg = <0x5c>;
+	};
+
+	ltc2974 at 5d {
+		compatible = "ltc2974";
+		reg = <0x5d>;
+	};
+};
diff --git a/arch/arm/boot/dts/axm5512-cpus.dtsi b/arch/arm/boot/dts/axm5512-cpus.dtsi
new file mode 100644
index 0000000..b45a344
--- /dev/null
+++ b/arch/arm/boot/dts/axm5512-cpus.dtsi
@@ -0,0 +1,114 @@
+/*
+ * arch/arm/boot/dts/axm5512-cpus.dtsi
+ *
+ * Copyright (C) 2013 LSI
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+/ {
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		cpu at 0 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a15";
+			reg = <0x00>;
+			cpu-release-addr = <0>; // Fixed by the boot loader
+			clock-frequency = <0>;  // Placeholder
+		};
+
+		cpu at 1 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a15";
+			reg = <0x01>;
+			cpu-release-addr = <0>; // Fixed by the boot loader
+			clock-frequency = <0>;  // Placeholder
+		};
+
+		cpu at 2 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a15";
+			reg = <0x02>;
+			cpu-release-addr = <0>; // Fixed by the boot loader
+			clock-frequency = <0>;  // Placeholder
+		};
+
+		cpu at 3 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a15";
+			reg = <0x03>;
+			cpu-release-addr = <0>; // Fixed by the boot loader
+			clock-frequency = <0>;  // Placeholder
+		};
+
+		cpu at 4 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a15";
+			reg = <0x04>;
+			cpu-release-addr = <0>; // Fixed by the boot loader
+			clock-frequency = <0>;  // Placeholder
+		};
+
+		cpu at 5 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a15";
+			reg = <0x05>;
+			cpu-release-addr = <0>; // Fixed by the boot loader
+			clock-frequency = <0>;  // Placeholder
+		};
+
+		cpu at 6 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a15";
+			reg = <0x06>;
+			cpu-release-addr = <0>; // Fixed by the boot loader
+			clock-frequency = <0>;  // Placeholder
+		};
+
+		cpu at 7 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a15";
+			reg = <0x07>;
+			cpu-release-addr = <0>; // Fixed by the boot loader
+			clock-frequency = <0>;  // Placeholder
+		};
+
+		cpu at 8 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a15";
+			reg = <0x08>;
+			cpu-release-addr = <0>; // Fixed by the boot loader
+			clock-frequency = <0>;  // Placeholder
+		};
+
+		cpu at 9 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a15";
+			reg = <0x09>;
+			cpu-release-addr = <0>; // Fixed by the boot loader
+			clock-frequency = <0>;  // Placeholder
+		};
+
+		cpu at 10 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a15";
+			reg = <0x0a>;
+			cpu-release-addr = <0>; // Fixed by the boot loader
+			clock-frequency = <0>;  // Placeholder
+		};
+
+		cpu at 11 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a15";
+			reg = <0x0b>;
+			cpu-release-addr = <0>; // Fixed by the boot loader
+			clock-frequency = <0>;  // Placeholder
+		};
+
+	};
+};
diff --git a/arch/arm/boot/dts/axm5516-amarillo.dts b/arch/arm/boot/dts/axm5516-amarillo.dts
new file mode 100644
index 0000000..59eeb53
--- /dev/null
+++ b/arch/arm/boot/dts/axm5516-amarillo.dts
@@ -0,0 +1,233 @@
+/*
+ * arch/arm/boot/dts/axm5516-amarillo.dts
+ *
+ * Copyright (C) 2013 LSI
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+/dts-v1/;
+
+/memreserve/ 0x00000000 0x00400000;
+
+/include/ "axm55xx.dtsi"
+/include/ "axm5516-cpus.dtsi"
+
+/ {
+	model = "Amarillo AXM5500";
+	compatible = "lsi,axm5500-amarillo", "lsi,axm5500";
+
+	memory {
+		device_type = "memory";
+		reg = <0 0x00000000 0 0x40000000>;
+	};
+};
+
+&edac {
+        status = "okay";
+};
+
+&femac {
+	status = "okay";
+	mdio-clock-offset = <0x1c>;
+	mdio-clock-period = <0xf0>;
+};
+
+&ccn {
+	status = "okay";
+};
+
+&perf_platform {
+	status = "okay";
+};
+
+&sm0 {
+	status = "okay";
+};
+
+&sm1 {
+	status = "okay";
+};
+
+&pcie0 {
+	status = "okay";
+};
+
+&pcie1 {
+	status = "okay";
+};
+
+&rio0 {
+	status = "okay";
+};
+
+&rio1 {
+	status = "okay";
+};
+
+&usb0 {
+	status = "okay";
+};
+
+&mtc {
+	status = "okay";
+};
+
+&serial0 {
+	status = "okay";
+};
+
+&serial1 {
+	status = "okay";
+};
+
+&serial2 {
+	status = "okay";
+};
+
+&serial3 {
+	status = "okay";
+};
+
+&gpio0 {
+	status = "okay";
+};
+
+&gpio1 {
+	status = "okay";
+};
+
+&spics {
+	status = "okay";
+};
+
+&spi0 {
+	status = "okay";
+
+	flash at 0 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "s25fl129p1";
+		reg = <0x0>;
+		spi-max-frequency = <25000000>;
+		pl022,com-mode = <0>;
+
+		partition at 0 {
+			label = "spl";
+			reg = <0x0 0x40000>;
+		};
+		partition at 40000 {
+			label = "parameters0";
+			reg = <0x40000 0x10000>;
+		};
+		partition at 50000 {
+			label = "parameters1";
+			reg = <0x50000 0x10000>;
+		};
+		partition at 60000 {
+			label = "env0";
+			reg = <0x60000 0x10000>;
+		};
+		partition at 70000 {
+			label = "env1";
+			reg = <0x70000 0x10000>;
+		};
+		partition at 100000 {
+			label = "u-boot0";
+			reg = <0x100000 0x200000>;
+		};
+		partition at 300000 {
+			label = "u-boot1";
+			reg = <0x300000 0x200000>;
+		};
+	};
+};
+
+&i2c0 {
+	status = "okay";
+
+	sysfpga at 40 {
+		reg = <0x40>;
+	};
+};
+
+&i2c1 {
+	status = "okay";
+
+	pxa9555 at 20 {
+		compatible = "pca9555";
+		reg = <0x20>;
+	};
+
+	adt7467 at 2e {
+		compatible = "adt7473";
+		reg = <0x2e>;
+	};
+
+	temp at 18 {
+		compatible = "jc42";
+		reg = <0x18>;
+	};
+
+	temp at 1a {
+		compatible = "jc42";
+		reg = <0x1a>;
+	};
+
+	spd at 50 {
+		compatible = "spd";
+		reg = <0x50>;
+	};
+
+	spd at 52 {
+		compatible = "spd";
+		reg = <0x52>;
+	};
+
+	eeprom at 54 {
+		compatible = "24c1024";
+		reg = <0x54>;
+		pagesize = <128>;
+	};
+};
+
+&i2c2 {
+	status = "okay";
+
+	pxa9544 at 70 {
+		compatible = "pca9544";
+		reg = <0x70>;
+	};
+
+	pxa9544 at 71 {
+		compatible = "pca9544";
+		reg = <0x71>;
+	};
+
+	pxa9544 at 72 {
+		compatible = "pca9544";
+		reg = <0x72>;
+	};
+
+	pxa9544 at 73 {
+		compatible = "pca9544";
+		reg = <0x73>;
+	};
+};
+
+&i2c3 {
+	status = "okay";
+
+	ltc2974 at 5c {
+		compatible = "ltc2974";
+		reg = <0x5c>;
+	};
+
+	ltc2974 at 5d {
+		compatible = "ltc2974";
+		reg = <0x5d>;
+	};
+};
diff --git a/arch/arm/boot/dts/axm5516-cpus.dtsi b/arch/arm/boot/dts/axm5516-cpus.dtsi
new file mode 100644
index 0000000..923f92e
--- /dev/null
+++ b/arch/arm/boot/dts/axm5516-cpus.dtsi
@@ -0,0 +1,145 @@
+/*
+ * arch/arm/boot/dts/axm5516-cpus.dtsi
+ *
+ * Copyright (C) 2013 LSI
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+/ {
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		cpu at 0 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a15";
+			reg = <0x00>;
+			cpu-release-addr = <0>; // Fixed by the boot loader
+			clock-frequency = <0>;  // Placeholder
+		};
+
+		cpu at 1 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a15";
+			reg = <0x01>;
+			cpu-release-addr = <0>; // Fixed by the boot loader
+			clock-frequency = <0>;  // Placeholder
+		};
+
+		cpu at 2 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a15";
+			reg = <0x02>;
+			cpu-release-addr = <0>; // Fixed by the boot loader
+			clock-frequency = <0>;  // Placeholder
+		};
+
+		cpu at 3 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a15";
+			reg = <0x03>;
+			cpu-release-addr = <0>; // Fixed by the boot loader
+			clock-frequency = <0>;  // Placeholder
+		};
+
+		cpu at 4 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a15";
+			reg = <0x04>;
+			cpu-release-addr = <0>; // Fixed by the boot loader
+			clock-frequency = <0>;  // Placeholder
+		};
+
+		cpu at 5 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a15";
+			reg = <0x05>;
+			cpu-release-addr = <0>; // Fixed by the boot loader
+			clock-frequency = <0>;  // Placeholder
+		};
+
+		cpu at 6 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a15";
+			reg = <0x06>;
+			cpu-release-addr = <0>; // Fixed by the boot loader
+			clock-frequency = <0>;  // Placeholder
+		};
+
+		cpu at 7 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a15";
+			reg = <0x07>;
+			cpu-release-addr = <0>; // Fixed by the boot loader
+			clock-frequency = <0>;  // Placeholder
+		};
+
+		cpu at 8 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a15";
+			reg = <0x08>;
+			cpu-release-addr = <0>; // Fixed by the boot loader
+			clock-frequency = <0>;  // Placeholder
+		};
+
+		cpu at 9 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a15";
+			reg = <0x09>;
+			cpu-release-addr = <0>; // Fixed by the boot loader
+			clock-frequency = <0>;  // Placeholder
+		};
+
+		cpu at 10 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a15";
+			reg = <0x0a>;
+			cpu-release-addr = <0>; // Fixed by the boot loader
+			clock-frequency = <0>;  // Placeholder
+		};
+
+		cpu at 11 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a15";
+			reg = <0x0b>;
+			cpu-release-addr = <0>; // Fixed by the boot loader
+			clock-frequency = <0>;  // Placeholder
+		};
+
+		cpu at 12 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a15";
+			reg = <0x0c>;
+			cpu-release-addr = <0>; // Fixed by the boot loader
+			clock-frequency = <0>;  // Placeholder
+		};
+
+		cpu at 13 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a15";
+			reg = <0x0d>;
+			cpu-release-addr = <0>; // Fixed by the boot loader
+			clock-frequency = <0>;  // Placeholder
+		};
+
+		cpu at 14 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a15";
+			reg = <0x0e>;
+			cpu-release-addr = <0>; // Fixed by the boot loader
+			clock-frequency = <0>;  // Placeholder
+		};
+
+		cpu at 15 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a15";
+			reg = <0x0f>;
+			cpu-release-addr = <0>; // Fixed by the boot loader
+			clock-frequency = <0>;  // Placeholder
+		};
+	};
+};
diff --git a/arch/arm/boot/dts/axm5516-sim-common.dts b/arch/arm/boot/dts/axm5516-sim-common.dts
new file mode 100644
index 0000000..abbd00a
--- /dev/null
+++ b/arch/arm/boot/dts/axm5516-sim-common.dts
@@ -0,0 +1,131 @@
+/*
+ * arch/arm/boot/dts/axm5516-sim.dts
+ *
+ * Copyright (C) 2013 LSI
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+/dts-v1/;
+
+/memreserve/ 0x00000000 0x00400000;
+
+/include/ "axm55xx.dtsi"
+/include/ "axm5516-cpus.dtsi"
+
+/ {
+	model = "Simulation Platform AXM5500";
+	compatible = "lsi,axm5500-sim", "lsi,axm5500";
+
+	memory {
+		device_type = "memory";
+		reg = <0 0x00000000 0 0x40000000>;
+	};
+
+	clocks {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		cpu {
+			frequency = <1400000000>;
+		};
+
+		peripheral {
+			frequency = <400000000>;
+		};
+
+		emmc {
+			frequency = <25000000>;
+		};
+	};
+
+	sim {
+		compatible = "arm,amba-bus", "simple-bus";
+		device_type = "soc";
+		#address-cells = <2>;
+		#size-cells = <2>;
+		interrupt-parent = <&gic>;
+		ranges;
+
+		mmci at 020101E0000 {
+			compatible = "arm,pl180", "arm,primecell";
+			reg = <0x20 0x101E0000 0x00 0x1000>;
+			interrupts = <0 222 4>,
+				     <0 223 4>;
+		};
+		virtio_block at 0130000 {
+			compatible = "virtio,mmio";
+			reg = <0x20 0x101f0000 0 0x10000>;
+			interrupts = <0 223 4>;
+		};
+		ethernet at 201100000000 {
+			compatible = "smsc,lan91c111";
+			device_type = "network";
+			reg = <0x20 0x11000000 0 0x10000>;
+			interrupts = <0 1 4>;
+			phy-mode = "mii";
+			reg-io-width = <4>;
+			smsc,irq-active-high;
+			smsc,irq-push-pull;
+		};
+	};
+};
+
+&mtc {
+	status = "okay";
+};
+
+&pcie0 {
+	status = "okay";
+};
+
+&pcie1 {
+	status = "okay";
+};
+
+&serial0 {
+	status = "okay";
+};
+
+&serial1 {
+	status = "okay";
+};
+
+&serial2 {
+	status = "okay";
+};
+
+&serial3 {
+	status = "okay";
+};
+
+&gpio0 {
+	status = "okay";
+};
+
+&gpio1 {
+	status = "okay";
+};
+
+&spics {
+	status = "okay";
+};
+
+&spi0 {
+	status = "okay";
+};
+
+&i2c1 {
+	status = "okay";
+};
+
+&i2c2 {
+	status = "okay";
+};
+
+&i2c3 {
+	status = "okay";
+};
diff --git a/arch/arm/boot/dts/axm5516-sim-mmc.dts b/arch/arm/boot/dts/axm5516-sim-mmc.dts
new file mode 100644
index 0000000..e9fe852
--- /dev/null
+++ b/arch/arm/boot/dts/axm5516-sim-mmc.dts
@@ -0,0 +1,127 @@
+/*
+ * arch/arm/boot/dts/axm5516-sim.dts
+ *
+ * Copyright (C) 2013 LSI
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+/dts-v1/;
+
+/memreserve/ 0x00000000 0x00400000;
+
+/include/ "axm55xx.dtsi"
+/include/ "axm5516-cpus.dtsi"
+
+/ {
+	model = "Simulation Platform AXM5500";
+	compatible = "lsi,axm5500-sim", "lsi,axm5500";
+
+	memory {
+		device_type = "memory";
+		reg = <0 0x00000000 0 0x40000000>;
+	};
+
+	clocks {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		cpu {
+			frequency = <1400000000>;
+		};
+
+		peripheral {
+			frequency = <400000000>;
+		};
+
+		emmc {
+			frequency = <25000000>;
+		};
+	};
+
+	sim {
+		compatible = "arm,amba-bus", "simple-bus";
+		device_type = "soc";
+		#address-cells = <2>;
+		#size-cells = <2>;
+		interrupt-parent = <&gic>;
+		ranges;
+
+		mmci at 020101E0000 {
+			compatible = "arm,pl180", "arm,primecell";
+			reg = <0x20 0x101E0000 0x00 0x1000>;
+			interrupts = <0 222 4>,
+				     <0 223 4>;
+		};
+
+		ethernet at 201100000000 {
+			compatible = "smsc,lan91c111";
+			device_type = "network";
+			reg = <0x20 0x11000000 0 0x10000>;
+			interrupts = <0 1 4>;
+			phy-mode = "mii";
+			reg-io-width = <4>;
+			smsc,irq-active-high;
+			smsc,irq-push-pull;
+		};
+	};
+};
+
+&mtc {
+	status = "okay";
+};
+
+&pcie0 {
+	status = "okay";
+};
+
+&pcie1 {
+	status = "okay";
+};
+
+&serial0 {
+	status = "okay";
+};
+
+&serial1 {
+	status = "okay";
+};
+
+&serial2 {
+	status = "okay";
+};
+
+&serial3 {
+	status = "okay";
+};
+
+&gpio0 {
+	status = "okay";
+};
+
+&gpio1 {
+	status = "okay";
+};
+
+&spics {
+	status = "okay";
+};
+
+&spi0 {
+	status = "okay";
+};
+
+&i2c1 {
+	status = "okay";
+};
+
+&i2c2 {
+	status = "okay";
+};
+
+&i2c3 {
+	status = "okay";
+};
diff --git a/arch/arm/boot/dts/axm5516-sim-virtio.dts b/arch/arm/boot/dts/axm5516-sim-virtio.dts
new file mode 100644
index 0000000..3533467
--- /dev/null
+++ b/arch/arm/boot/dts/axm5516-sim-virtio.dts
@@ -0,0 +1,126 @@
+/*
+ * arch/arm/boot/dts/axm5516-sim.dts
+ *
+ * Copyright (C) 2013 LSI
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+/dts-v1/;
+
+/memreserve/ 0x00000000 0x00400000;
+
+/include/ "axm55xx.dtsi"
+/include/ "axm5516-cpus.dtsi"
+
+/ {
+	model = "Simulation Platform AXM5500";
+	compatible = "lsi,axm5500-sim", "lsi,axm5500";
+
+	memory {
+		device_type = "memory";
+		reg = <0 0x00000000 0 0x40000000>;
+	};
+
+	clocks {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		cpu {
+			frequency = <1400000000>;
+		};
+
+		peripheral {
+			frequency = <400000000>;
+		};
+
+		emmc {
+			frequency = <25000000>;
+		};
+	};
+
+	sim {
+		compatible = "arm,amba-bus", "simple-bus";
+		device_type = "soc";
+		#address-cells = <2>;
+		#size-cells = <2>;
+		interrupt-parent = <&gic>;
+		ranges;
+
+		virtio_block at 0130000 {
+			compatible = "virtio,mmio";
+			reg = <0x20 0x101f0000 0 0x10000>;
+			interrupts = <0 223 4>;
+		};
+
+		ethernet at 201100000000 {
+			compatible = "smsc,lan91c111";
+			device_type = "network";
+			reg = <0x20 0x11000000 0 0x10000>;
+			interrupts = <0 1 4>;
+			phy-mode = "mii";
+			reg-io-width = <4>;
+			smsc,irq-active-high;
+			smsc,irq-push-pull;
+		};
+	};
+};
+
+&mtc {
+	status = "okay";
+};
+
+&pcie0 {
+	status = "okay";
+};
+
+&pcie1 {
+	status = "okay";
+};
+
+&serial0 {
+	status = "okay";
+};
+
+&serial1 {
+	status = "okay";
+};
+
+&serial2 {
+	status = "okay";
+};
+
+&serial3 {
+	status = "okay";
+};
+
+&gpio0 {
+	status = "okay";
+};
+
+&gpio1 {
+	status = "okay";
+};
+
+&spics {
+	status = "okay";
+};
+
+&spi0 {
+	status = "okay";
+};
+
+&i2c1 {
+	status = "okay";
+};
+
+&i2c2 {
+	status = "okay";
+};
+
+&i2c3 {
+	status = "okay";
+};
diff --git a/arch/arm/boot/dts/axm5516-sim.dts b/arch/arm/boot/dts/axm5516-sim.dts
new file mode 100644
index 0000000..3ea5f05
--- /dev/null
+++ b/arch/arm/boot/dts/axm5516-sim.dts
@@ -0,0 +1,133 @@
+/*
+ * arch/arm/boot/dts/axm5516-amarillo.dts
+ *
+ * Copyright (C) 2013 LSI
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+/dts-v1/;
+
+/memreserve/ 0x00000000 0x00400000;
+
+/include/ "axm55xx.dtsi"
+/include/ "axm5516-cpus.dtsi"
+
+/ {
+	model = "Simulation Platform AXM55xx";
+	compatible = "lsi,axm5516-sim", "lsi,axm5516";
+
+	memory {
+		device_type = "memory";
+		reg = <0 0x00000000 0 0x40000000>;
+	};
+
+	clocks {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		cpu {
+			frequency = <1400000000>;
+		};
+
+		peripheral {
+			frequency = <400000000>;
+		};
+
+		emmc {
+			frequency = <25000000>;
+		};
+	};
+
+	sim {
+		compatible = "arm,amba-bus", "simple-bus";
+		device_type = "soc";
+		#address-cells = <2>;
+		#size-cells = <2>;
+		interrupt-parent = <&gic>;
+		ranges;
+
+		virtio_block at 0130000 {
+                compatible = "virtio,mmio";
+                reg = <0x20 0x101f0000 0 0x10000>;
+                interrupts = <0 223 4>;
+		};
+
+		mmci at 020101E0000 {
+			compatible = "arm,pl180", "arm,primecell";
+			reg = <0x20 0x101E0000 0x00 0x1000>;
+			interrupts = <0 222 4>,
+				     <0 223 4>;
+		};
+
+		ethernet at 201100000000 {
+			compatible = "smsc,lan91c111";
+			device_type = "network";
+			reg = <0x20 0x11000000 0 0x10000>;
+			interrupts = <0 1 4>;
+			phy-mode = "mii";
+			reg-io-width = <4>;
+			smsc,irq-active-high;
+			smsc,irq-push-pull;
+		};
+	};
+};
+
+&mtc {
+	status = "okay";
+};
+
+&pcie0 {
+	status = "okay";
+};
+
+&pcie1 {
+	status = "okay";
+};
+
+&serial0 {
+	status = "okay";
+};
+
+&serial1 {
+	status = "okay";
+};
+
+&serial2 {
+	status = "okay";
+};
+
+&serial3 {
+	status = "okay";
+};
+
+&gpio0 {
+	status = "okay";
+};
+
+&gpio1 {
+	status = "okay";
+};
+
+&spics {
+	status = "okay";
+};
+
+&spi0 {
+	status = "okay";
+};
+
+&i2c1 {
+	status = "okay";
+};
+
+&i2c2 {
+	status = "okay";
+};
+
+&i2c3 {
+	status = "okay";
+};
diff --git a/arch/arm/boot/dts/axm55xx.dtsi b/arch/arm/boot/dts/axm55xx.dtsi
new file mode 100644
index 0000000..2d1771b
--- /dev/null
+++ b/arch/arm/boot/dts/axm55xx.dtsi
@@ -0,0 +1,442 @@
+/*
+ * arch/arm/boot/dts/axm55xx.dtsi
+ *
+ * Copyright (C) 2013 LSI
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+/include/ "skeleton64.dtsi"
+
+/ {
+	interrupt-parent = <&gic>;
+
+	aliases {
+		gpio0     = &gpio0;
+		gpio1     = &gpio1;
+		serial0	  = &serial0;
+		serial1   = &serial1;
+		serial2	  = &serial2;
+		serial3	  = &serial3;
+		ethernet0 = &femac;
+		timer	  = &timer0;
+		i2c0      = &i2c0;
+		i2c1      = &i2c1;
+		i2c2      = &i2c2;
+		i2c3      = &i2c3;
+	};
+
+	clocks {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		cpu {
+			frequency = <0>; /* Filled in by the boot loader. */
+		};
+
+		peripheral {
+			frequency = <0>; /* Filled in by the boot loader. */
+		};
+
+		emmc {
+			frequency = <0>; /* Filled in by the boot loader. */
+		};
+	};
+
+	gic: interrupt-controller at 2001001000 {
+		compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
+		#interrupt-cells = <3>;
+		#address-cells = <0>;
+		interrupt-controller;
+		reg = <0x20 0x01001000 0 0x1000>,  /* gic dist base */
+		      <0x20 0x01002000 0 0x1000>,  /* gic cpu base */
+		      <0x20 0x01004000 0 0x2000>,  /* vgic control */
+		      <0x20 0x01006000 0 0x2000>,  /* vgic cpu base */
+		      <0x20 0x10030000 0 0x1000>,  /* axm IPI mask reg base */
+		      <0x20 0x10040000 0 0x20000>; /* axm IPI send reg base */
+		interrupts = <1 9 0xf04>;          /* vgic for kvm */
+	};
+
+	timer {
+		compatible = "arm,armv7-timer";
+		interrupts = <1 13 0xf08>,
+			     <1 14 0xf08>,
+			     <1 11 0xf08>,
+			     <1 10 0xf08>;
+	};
+        edac: edac0 at 0x1000 {
+                compatible = "lsi,edac";
+                reg = <0 0x00220000 0 0x1000>,
+			<0 0x000f0000 0 0x1000>,
+			<0x20 0x10030000 0 0001000>,
+			<0x20 0x00200400 0 0001000>,
+			<0x20 0x00210400 0 0001000>,
+			<0x20 0x00220400 0 0001000>,
+			<0x20 0x00230400 0 0001000>,
+			<0x20 0x00240400 0 0001000>,
+			<0x20 0x00250400 0 0001000>,
+			<0x20 0x00260400 0 0001000>,
+			<0x20 0x00270400 0 0001000>;
+                interrupts = <0 160 4>,
+                        <0 161 4>;
+                device_type = "edac";
+                status = "disabled";
+        };
+
+	ccn: ccn at 0x2000000000 {
+		compatible = "arm,ccn-504";
+		reg = <0x20 0x00000000 0 0x1000000>;
+		interrupts = <0 181 4>;
+		status = "disabled";
+	};
+
+	perf_platform: perf_platform {
+		compatible = "lsi,axm-platformperf";
+		status = "disabled";
+	};
+
+	sm0: sm0 at 00220000 {
+		compatible = "lsi,smmon";
+		reg = <0 0x00220000 0 0x1000>,
+			<0x20 0x10030000 0 0001000>;
+		interrupts = <0 161 4>;
+		status = "disabled";
+	};
+
+	sm1: sm1 at 00220000 {
+		compatible = "lsi,smmon";
+		reg = <0 0x000f0000 0 0x1000>,
+			<0x20 0x10030000 0 0001000>;
+		interrupts = <0 160 4>;
+		status = "disabled";
+	};
+
+	femac: femac at 0x2010120000 {
+		compatible = "lsi,acp-femac";
+		device_type = "network";
+		reg = <0x20 0x10120000 0 0x1000>,
+		      <0x20 0x10121000 0 0x1000>,
+		      <0x20 0x10122000 0 0x1000>;
+		interrupts = <0 2 4>,
+			     <0 3 4>,
+			     <0 4 4>;
+
+		mdio-reg = <0x20 0x10090000 0 0x1000>;
+		mdio-clock = <0>;
+		phy-address = <0x1e>;
+		ad-value = <0>;
+		phy-link = "auto";
+		mac-address = [00 00 00 00 00 00];
+		status = "disabled";
+	};
+
+	soc {
+		compatible = "simple-bus";
+		device_type = "soc";
+		#address-cells = <2>;
+		#size-cells = <2>;
+		interrupt-parent = <&gic>;
+		ranges;
+
+		gpdma0: gpdma at 2020140000 {
+			compatible = "lsi,dma32";
+			reg = <0x20 0x20140000 0x00 0x1000>;
+			interrupts = <0 60 4>,
+				     <0 61 4>;
+
+			channel0 {
+				interrupts = <0 62 4>;
+			};
+
+			channel1 {
+				interrupts = <0 63 4>;
+			};
+		};
+
+		gpdma1: gpdma at 2020141000 {
+			compatible = "lsi,dma32";
+			reg = <0x20 0x20141000 0x00 0x1000>;
+			interrupts = <0 64 4>,
+				     <0 65 4>;
+
+			channel0 {
+				interrupts = <0 66 4>;
+			};
+
+			channel1 {
+				interrupts = <0 67 4>;
+			};
+		};
+
+		gpreg: gpreg at 2010094000  {
+			compatible = "lsi,gpreg";
+			reg = <0x20 0x10094000 0 0x1000>;
+		};
+
+	        pcie0: pciex at 0x3000000000 {
+	                compatible = "lsi,plb-pciex";
+	                device_type = "pci";
+	                #interrupt-cells = <1>;
+	                #size-cells = <2>;
+	                #address-cells = <3>;
+	                /* config space access MPAGE7 registers*/
+	                reg = < 0x30 0x38000000 0x0 0x01000000
+	                0x20 0x20120000 0x0 0x00008000 >;
+	                /* Outbound ranges */
+	                /* < <3-cell PCI addr> <2-cell CPU (PLB) addr> <2-cell size> >*/
+	                ranges = <0x03000000 0x00000000 0x80000000
+	                          0x30 0x00000000
+	                          0x00 0x20000000>;
+	                /* Inbound ranges */
+	                /* < <3-cell PCI addr> <2-cell CPU addr> <2-cell size> > */
+	                dma-ranges = <0x03000000 0x00000000 0x00000000
+	                              0x00 0x00000000
+	                              0x00 0x40000000>;
+	                interrupts = <0 68 4>,
+	                             <0 73 4>,
+	                             <0 74 4>,
+	                             <0 75 4>,
+	                             <0 76 4>,
+	                             <0 77 4>,
+	                             <0 78 4>,
+	                             <0 79 4>,
+	                             <0 80 4>,
+	                             <0 81 4>,
+	                             <0 82 4>,
+	                             <0 83 4>,
+	                             <0 84 4>,
+	                             <0 85 4>,
+	                             <0 86 4>,
+	                             <0 87 4>,
+	                             <0 88 4>;
+	                port = <0>;
+			status = "disabled";
+	        };
+
+	        pcie1: pciex at 0x3080000000 {
+	                compatible = "lsi,plb-pciex";
+	                device_type = "pci";
+	                #interrupt-cells = <1>;
+	                #size-cells = <2>;
+	                #address-cells = <3>;
+	                /* config space access MPAGE7 registers*/
+	                reg = <0x30 0xb8000000 0x0 0x01000000
+	                       0x20 0x20130000 0x0 0x00008000 >;
+	                /* Outbound ranges */
+	                /* < <3-cell PCI addr> <2-cell CPU (PLB) addr> <2-cell size> > */
+	                ranges = <0x03000000 0x00000000 0xc0000000
+	                          0x30 0x80000000
+	                          0x00 0x20000000>;
+	                /* Inbound ranges */
+	                /* < <3-cell PCI addr> <2-cell CPU addr> <2-cell size> > */
+	                dma-ranges = <0x03000000 0x00000000 0x00000000
+	                              0x00 0x00000000
+	                              0x00 0x40000000>;
+	                interrupts = <0 70 4>;
+	                port = <1>;
+			status = "disabled";
+	        };
+
+		rio0: rapidio at 0x3100000000 {
+			index = <0>;
+			#address-cells = <2>;
+			#size-cells = <2>;
+			compatible = "axxia,rapidio-delta";
+			device_type = "rapidio";
+			reg = <0x0020 0x20142000 0x0 0x1000>; /* SRIO Conf 0 region */
+			ranges = <0x0 0x0 0x0031 0x00000000 0x0 0x40000000>;
+			linkdown-reset = <0x0200 0x100 0x0020 0x10000000 0x0 0x000010000>;
+			interrupts = <0 89 4>;
+			outb-dmes = <2 0x00000003 1 0x00000000>;
+			enable_ds = <1>;
+			status = "disabled";
+		};
+
+		rio1: rapidio at 0x3140000000 {
+			index = <1>;
+			#address-cells = <2>;
+			#size-cells = <2>;
+			compatible = "axxia,rapidio-delta";
+			device_type = "rapidio";
+			reg = <0x0020 0x20143000 0x0 0x1000>; /* SRIO Conf 1 region */
+			ranges = <0x0 0x0 0x0031 0x40000000 0x0 0x40000000>;
+			linkdown-reset = <0x0200 0x200 0x0020 0x10000000 0x0 0x000010000>;
+			interrupts = <0 90 4>;
+			outb-dmes = <2 0x00000003 1 0x00000000>;
+			enable_ds = <1>;
+			status = "disabled";
+		};
+
+		usb0: usb at 004a4000 {
+			compatible = "lsi,acp-usb";
+			device_type = "usb";
+			reg = <0x20 0x10140000 0x0 0020000>,
+			      <0x20 0x10094000 0x0 0002000>;
+			interrupts = <0 55 4>;
+			dma-coherent = <1>;
+			status = "disabled";
+		};
+
+		i2c0: i2c at 0x02010084000 {
+			compatible = "lsi,api2c";
+			device_type = "i2c";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0x20 0x10084000 0x00 0x1000>;
+			interrupts = <0 19 4>;
+			status = "disabled";
+		};
+
+		i2c1: i2c at 0x02010085000 {
+			compatible = "lsi,api2c";
+			device_type = "i2c";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0x20 0x10085000 0x00 0x1000>;
+			interrupts = <0 20 4>;
+			status = "disabled";
+		};
+
+		i2c2: i2c at 0x02010086000 {
+			compatible = "lsi,api2c";
+			device_type = "i2c";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0x20 0x10086000 0x00 0x1000>;
+			interrupts = <0 21 4>;
+			status = "disabled";
+		};
+
+		i2c3: i2c at 0x02010087000 {
+			compatible = "lsi,api2c";
+			device_type = "i2c";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0x20 0x10087000 0x00 0x1000>;
+			interrupts = <0 22 4>;
+			status = "disabled";
+		};
+
+		mtc: mtc at 2010098000 {
+			compatible = "lsi,mtc";
+			reg = <0x20 0x10098000 0 0x3000>;
+			interrupts = <0 45 4>;
+			status = "disabled";
+		};
+
+		nca at 2020100000 {
+			compatible = "lsi,nca";
+			reg = <0x20 0x20100000 0 0x20000>;
+		};
+
+		amba {
+			compatible = "arm,amba-bus";
+			#address-cells = <2>;
+			#size-cells = <2>;
+			ranges;
+
+			serial0: uart at 2010080000 {
+				compatible = "arm,pl011", "arm,primecell";
+				reg = <0x20 0x10080000 0 0x1000>;
+				interrupts = <0 56 4>;
+				status = "disabled";
+			};
+
+			serial1: uart at 2010081000 {
+				compatible = "arm,pl011", "arm,primecell";
+				reg = <0x20 0x10081000 0 0x1000>;
+				interrupts = <0 57 4>;
+				status = "disabled";
+			};
+
+			serial2: uart at 2010082000 {
+				compatible = "arm,pl011", "arm,primecell";
+				reg = <0x20 0x10082000 0 0x1000>;
+				interrupts = <0 58 4>;
+				status = "disabled";
+			};
+
+			serial3: uart at 2010083000 {
+				compatible = "arm,pl011", "arm,primecell";
+				reg = <0x20 0x10083000 0 0x1000>;
+				interrupts = <0 59 4>;
+				status = "disabled";
+			};
+
+			timer0: timer at 2010091000 {
+				compatible = "arm,sp804", "arm,primecell";
+				reg = <0x20 0x10091000 0 0x1000>;
+				interrupts = <0 46 4>,
+					     <0 47 4>,
+					     <0 48 4>,
+					     <0 49 4>,
+					     <0 50 4>,
+					     <0 51 4>,
+					     <0 52 4>,
+					     <0 53 4>;
+			};
+
+			gpio0: gpio at 2010092000 {
+				#gpio-cells = <2>;
+				compatible = "arm,pl061", "arm,primecell";
+				gpio-controller;
+				reg = <0x20 0x10092000 0x00 0x1000>;
+				interrupts = <0 10 4>,
+					     <0 11 4>,
+					     <0 12 4>,
+					     <0 13 4>,
+					     <0 14 4>,
+					     <0 15 4>,
+					     <0 16 4>,
+					     <0 17 4>;
+				interrupt-controller;
+				#interrupt-cells = <2>;
+				status = "disabled";
+			};
+
+			gpio1: gpio at 2010093000 {
+				#gpio-cells = <2>;
+				compatible = "arm,pl061", "arm,primecell";
+				gpio-controller;
+				reg = <0x20 0x10093000 0x00 0x1000>;
+				interrupts = <0 18 4>;
+				interrupt-controller;
+				#interrupt-cells = <2>;
+				status = "disabled";
+			};
+
+			spics: sspgpio at 2010088030 {
+				#gpio-cells = <2>;
+				compatible = "lsi,ssp-gpio";
+				gpio-controller;
+				reg = <0x20 0x10088000 0x00 0x1000>;
+				status = "disabled";
+			};
+
+			spi0: ssp at 2010088000 {
+				compatible = "arm,pl022", "arm,primecell";
+				#address-cells = <1>;
+				#size-cells = <0>;
+				reg = <0x20 0x10088000 0x00 0x1000>;
+				interrupts = <0 42 4>;
+				num-cs = <5>;
+				cs-gpios = <&spics 0 1>,
+					   <&spics 1 1>,
+					   <&spics 2 1>,
+					   <&spics 3 1>,
+					   <&spics 4 1>;
+				status = "disabled";
+			};
+		};
+	};
+
+};
+
+/*
+  Local Variables:
+  mode: C
+  End:
+*/
-- 
1.7.9.5



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