[linux-yocto] [PATCH 1/1] valleyisland: enable PCI mode enumeration for LPSS devices

[rebecca.swee.fun.chang at intel.com]

From: Chang Rebecca Swee Fun <rebecca.swee.fun.chang at intel.com>

Enable PCI mode enumeration for Valley Island LPSS I/O devices.
Added feature branch merging operation in scc. Feature branch
will be name as valleyisland-io-1.0.

Signed-off-by: Chang Rebecca Swee Fun <rebecca.swee.fun.chang at intel.com>
---
 .../kernel-cache/features/valleyisland-io/valleyisland-io-pci.cfg | 8 ++++++++
 .../kernel-cache/features/valleyisland-io/valleyisland-io-pci.scc | 6 ++++++
 2 files changed, 14 insertions(+)
 create mode 100644 meta/cfg/kernel-cache/features/valleyisland-io/valleyisland-io-pci.cfg
 create mode 100644 meta/cfg/kernel-cache/features/valleyisland-io/valleyisland-io-pci.scc

diff --git a/meta/cfg/kernel-cache/features/valleyisland-io/valleyisland-io-pci.cfg b/meta/cfg/kernel-cache/features/valleyisland-io/valleyisland-io-pci.cfg
new file mode 100644
index 0000000..337bba4
--- /dev/null
+++ b/meta/cfg/kernel-cache/features/valleyisland-io/valleyisland-io-pci.cfg
@@ -0,0 +1,8 @@
+# By default, enable PCI mode enumeration
+# for Valley Island LPSS Devices
+CONFIG_BYT_LPSS_BRD=y
+CONFIG_GPIO_BAYTRAIL_DEV=y
+CONFIG_I2C_DESIGNWARE_PCI=y
+CONFIG_SPI_PXA2XX_PCI=y
+CONFIG_DW_DMAC_PCI=y
+CONFIG_PWM_LPSS_PCI=y
diff --git a/meta/cfg/kernel-cache/features/valleyisland-io/valleyisland-io-pci.scc b/meta/cfg/kernel-cache/features/valleyisland-io/valleyisland-io-pci.scc
new file mode 100644
index 0000000..e71fc86
--- /dev/null
+++ b/meta/cfg/kernel-cache/features/valleyisland-io/valleyisland-io-pci.scc
@@ -0,0 +1,6 @@
+define KFEATURE_DESCRIPTION "Enable PCI mode Valley Island LPSS I/O Devices"
+define KFEATURE_COMPATIBILITY arch
+
+kconf hardware valleyisland-io-pci.cfg
+
+merge valleyisland-io-1.0
-- 
1.9.1