[linux-yocto] [PATCH 86/94] arm/mach-axxia: L3 Cache is not available in simulation!

[Bruce Ashfield]

On 11/7/2013, 8:18 PM, Paul Butler wrote:
> From: John Jacques <john.jacques at lsi.com>
>
> Signed-off-by: John Jacques <john.jacques at lsi.com>
> ---
>   arch/arm/mach-axxia/axxia.c | 4 +++-
>   1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm/mach-axxia/axxia.c b/arch/arm/mach-axxia/axxia.c
> index 4d3b476..df63dbd 100644
> --- a/arch/arm/mach-axxia/axxia.c
> +++ b/arch/arm/mach-axxia/axxia.c
> @@ -232,7 +232,7 @@ l3_set_pstate(void __iomem *l3ctrl, unsigned int req, unsigned int act)
>
>   		if (0 == retries)
>   			return -ENODEV;
> -
> +	}

'nit. whitespace change.

Bruce

>
>   	return 0;
>   }
> @@ -243,6 +243,7 @@ void __init axxia_dt_init(void)
>   	int rc;
>
>   	/* Enable L3-cache */
> +#ifndef CONFIG_ARCH_AXXIA_SIM
>   	l3ctrl = ioremap(0x2000000000ULL, SZ_4M);
>   	if (l3ctrl) {
>   		rc = l3_set_pstate(l3ctrl, 0x3, 0xc);
> @@ -252,6 +253,7 @@ void __init axxia_dt_init(void)
>   	} else {
>   		pr_warn("axxia: Failed to map L3-cache control regs\n");
>   	}
> +#endif
>
>   	of_platform_populate(NULL, of_default_bus_match_table,
>   			     axxia_auxdata_lookup, NULL);
>