[linux-yocto] [PATCH 62/94] arm/mach-axxia: add support for SPI flash.

Paul Butler butler.paul at gmail.com
Thu Nov 7 17:13:16 PST 2013


From: John Jacques <john.jacques at lsi.com>

Signed-off-by: John Jacques <john.jacques at lsi.com>
Signed-off-by: Paul Butler <paul.butler at windriver.com>
---
 arch/arm/boot/dts/axm55xx.dts  | 157 ++++++++++++++++++++++++-----------------
 arch/arm/configs/lsi_defconfig |   3 +-
 arch/arm/mach-axxia/axxia.c    |  25 ++-----
 3 files changed, 99 insertions(+), 86 deletions(-)

diff --git a/arch/arm/boot/dts/axm55xx.dts b/arch/arm/boot/dts/axm55xx.dts
index 9315ef2..b3df3ad 100644
--- a/arch/arm/boot/dts/axm55xx.dts
+++ b/arch/arm/boot/dts/axm55xx.dts
@@ -10,12 +10,12 @@
  *
  * This program is distributed in the hope that it will be useful,
  * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
  * GNU General Public License for more details.
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307	 USA
  */
 
 /dts-v1/;
@@ -32,8 +32,8 @@
 	chosen { };
 
 	aliases {
-		serial0   = &axxia_serial0;
-		timer     = &axxia_timers;
+		serial0	  = &axxia_serial0;
+		timer	  = &axxia_timers;
 		ethernet0 = &axxia_femac0;
 	};
 
@@ -45,112 +45,112 @@
 			device_type = "cpu";
 			compatible = "arm,cortex-a15";
 			reg = <0>;
-                        cpu-release-addr = <0>; // Fixed by the boot loader
+			cpu-release-addr = <0>; // Fixed by the boot loader
 		};
 
 		cpu at 1 {
 			device_type = "cpu";
 			compatible = "arm,cortex-a15";
 			reg = <1>;
-                        cpu-release-addr = <0>; // Fixed by the boot loader
+			cpu-release-addr = <0>; // Fixed by the boot loader
 		};
 
 		cpu at 2 {
 			device_type = "cpu";
 			compatible = "arm,cortex-a15";
 			reg = <2>;
-                        cpu-release-addr = <0>; // Fixed by the boot loader
+			cpu-release-addr = <0>; // Fixed by the boot loader
 		};
 
 		cpu at 3 {
 			device_type = "cpu";
 			compatible = "arm,cortex-a15";
 			reg = <3>;
-                        cpu-release-addr = <0>; // Fixed by the boot loader
+			cpu-release-addr = <0>; // Fixed by the boot loader
 		};
 
 		cpu at 4 {
 			device_type = "cpu";
 			compatible = "arm,cortex-a15";
 			reg = <4>;
-                        cpu-release-addr = <0>; // Fixed by the boot loader
+			cpu-release-addr = <0>; // Fixed by the boot loader
 		};
 
 		cpu at 5 {
 			device_type = "cpu";
 			compatible = "arm,cortex-a15";
 			reg = <5>;
-                        cpu-release-addr = <0>; // Fixed by the boot loader
+			cpu-release-addr = <0>; // Fixed by the boot loader
 		};
 
 		cpu at 6 {
 			device_type = "cpu";
 			compatible = "arm,cortex-a15";
 			reg = <6>;
-                        cpu-release-addr = <0>; // Fixed by the boot loader
+			cpu-release-addr = <0>; // Fixed by the boot loader
 		};
 
 		cpu at 7 {
 			device_type = "cpua";
 			compatible = "arm,cortex-a15";
 			reg = <7>;
-                        cpu-release-addr = <0>; // Fixed by the boot loader
+			cpu-release-addr = <0>; // Fixed by the boot loader
 		};
 
 		cpu at 8 {
 			device_type = "cpu";
 			compatible = "arm,cortex-a15";
 			reg = <8>;
-                        cpu-release-addr = <0>; // Fixed by the boot loader
+			cpu-release-addr = <0>; // Fixed by the boot loader
 		};
 
 		cpu at 9 {
 			device_type = "cpu";
 			compatible = "arm,cortex-a15";
 			reg = <9>;
-                        cpu-release-addr = <0>; // Fixed by the boot loader
+			cpu-release-addr = <0>; // Fixed by the boot loader
 		};
 
 		cpu at 10 {
 			device_type = "cpu";
 			compatible = "arm,cortex-a15";
 			reg = <10>;
-                        cpu-release-addr = <0>; // Fixed by the boot loader
+			cpu-release-addr = <0>; // Fixed by the boot loader
 		};
 
 		cpu at 11 {
 			device_type = "cpu";
 			compatible = "arm,cortex-a15";
 			reg = <11>;
-                        cpu-release-addr = <0>; // Fixed by the boot loader
+			cpu-release-addr = <0>; // Fixed by the boot loader
 		};
 
 		cpu at 12 {
 			device_type = "cpu";
 			compatible = "arm,cortex-a15";
 			reg = <12>;
-                        cpu-release-addr = <0>; // Fixed by the boot loader
+			cpu-release-addr = <0>; // Fixed by the boot loader
 		};
 
 		cpu at 13 {
 			device_type = "cpu";
 			compatible = "arm,cortex-a15";
 			reg = <13>;
-                        cpu-release-addr = <0>; // Fixed by the boot loader
+			cpu-release-addr = <0>; // Fixed by the boot loader
 		};
 
 		cpu at 14 {
 			device_type = "cpu";
 			compatible = "arm,cortex-a15";
 			reg = <14>;
-                        cpu-release-addr = <0>; // Fixed by the boot loader
+			cpu-release-addr = <0>; // Fixed by the boot loader
 		};
 
 		cpu at 15 {
 			device_type = "cpu";
 			compatible = "arm,cortex-a15";
 			reg = <15>;
-                        cpu-release-addr = <0>; // Fixed by the boot loader
+			cpu-release-addr = <0>; // Fixed by the boot loader
 		};
 	};
 
@@ -159,7 +159,7 @@
 		#size-cells = <0>;
 
 		cpu {
-                        frequency = <0>; /* Filled in by the boot loader. */
+			frequency = <0>; /* Filled in by the boot loader. */
 		};
 
 		peripheral {
@@ -167,7 +167,7 @@
 		};
 
 		emmc {
-                        frequency = <0>; /* Filled in by the boot loader. */
+			frequency = <0>; /* Filled in by the boot loader. */
 		};
 	};
 
@@ -229,15 +229,15 @@
 		reg = <0x20 0x10094000 0 0x1000>;
 	};
 
-        axxia_femac0: femac at 0x2010120000 {
-                compatible = "acp-femac";
+	axxia_femac0: femac at 0x2010120000 {
+		compatible = "acp-femac";
 		device_type = "network";
 		reg = <0x20 0x10120000 0 0x1000>,
-   		      <0x20 0x10121000 0 0x1000>,
+		      <0x20 0x10121000 0 0x1000>,
 		      <0x20 0x10122000 0 0x1000>;
 		interrupts = <0 2 4>,
-		             <0 3 4>,
-		             <0 4 4>;
+			     <0 3 4>,
+			     <0 4 4>;
 		mdio-reg = <0x20 0x10090000 0 0x1000>;
 		mdio-clock = <0>;
 		phy-address = <0x1e>;
@@ -246,16 +246,16 @@
 		mac-address = [00 00 00 00 00 00];
 	};
 
-        USB0: usb at 004a4000 {
-                device_type = "usb";
-                compatible = "acp-usb";
-                enabled = <0>;
-                reg = <0x20 0x10140000 0x0 0020000>,
-                      <0x20 0x10094000 0x0 0002000>;
-                interrupts = <0 55 4>;
-        };
+	USB0: usb at 004a4000 {
+		device_type = "usb";
+		compatible = "acp-usb";
+		enabled = <0>;
+		reg = <0x20 0x10140000 0x0 0020000>,
+		      <0x20 0x10094000 0x0 0002000>;
+		interrupts = <0 55 4>;
+	};
 
-        amba {
+	amba {
 		compatible = "arm,amba-bus";
 		#address-cells = <2>;
 		#size-cells = <2>;
@@ -279,54 +279,81 @@
 				     <0 52 4>,
 				     <0 53 4>;
 		};
+
+		gpio at 2010092000 {
+			compatible = "arm,pl061", "arm,primecell";
+			reg = <0x20 0x10092000 0x00 0x1000>;
+			interrupts = <0 10 4>,
+				     <0 11 4>,
+				     <0 12 4>,
+				     <0 13 4>,
+				     <0 14 4>,
+				     <0 15 4>,
+				     <0 16 4>,
+				     <0 17 4>;
+		};
+
+		gpio at 2010093000 {
+			compatible = "arm,pl061", "arm,primecell";
+			reg = <0x20 0x10093000 0x00 0x1000>;
+			interrupts = <0 18 4>;
+		};
+
+		ssp at 2010088000 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			compatible = "arm,pl022", "arm,primecell";
+			reg = <0x20 0x10088000 0x00 0x1000>;
+			interrupts = <0 42 4>;
+		};
 	};
 
-        I2C0: i2c at 0x02010084000 {
+	I2C0: i2c at 0x02010084000 {
 		#address-cells = <1>;
 		#size-cells = <0>;
-                compatible = "lsi,api2c";
-                device_type = "i2c";
-                port = <0>;
-                reg = <0x20 0x10084000 0x00 0x1000>;
+		compatible = "lsi,api2c";
+		device_type = "i2c";
+		port = <0>;
+		reg = <0x20 0x10084000 0x00 0x1000>;
 		interrupts = <0 19 4>;
-        };
+	};
 
-        I2C1: i2c at 0x02010085000 {
+	I2C1: i2c at 0x02010085000 {
 		#address-cells = <1>;
 		#size-cells = <0>;
-                compatible = "lsi,api2c";
-                device_type = "i2c";
-                port = <1>;
-                reg = <0x20 0x10085000 0x00 0x1000>;
+		compatible = "lsi,api2c";
+		device_type = "i2c";
+		port = <1>;
+		reg = <0x20 0x10085000 0x00 0x1000>;
 		interrupts = <0 20 4>;
 
-                eeprom at 54 {
-                        compatible = "24c1024";
-                        reg = <0x54>;
+		eeprom at 54 {
+			compatible = "24c1024";
+			reg = <0x54>;
 			pagesize = <128>;
-                };
-        };
+		};
+	};
 
-        I2C2: i2c at 0x02010086000 {
+	I2C2: i2c at 0x02010086000 {
 		#address-cells = <1>;
 		#size-cells = <0>;
-                compatible = "lsi,api2c";
-                device_type = "i2c";
-                port = <2>;
-                reg = <0x20 0x10086000 0x00 0x1000>;
+		compatible = "lsi,api2c";
+		device_type = "i2c";
+		port = <2>;
+		reg = <0x20 0x10086000 0x00 0x1000>;
 		interrupts = <0 21 4>;
-        };
+	};
 
-        SMB: i2c at 0x02010087000 {
+	SMB: i2c at 0x02010087000 {
 		#address-cells = <1>;
 		#size-cells = <0>;
-                compatible = "lsi,api2c";
-                device_type = "i2c";
-                port = <3>;
-                bus_name = "smb";
-                reg = <0x20 0x10087000 0x00 0x1000>;
+		compatible = "lsi,api2c";
+		device_type = "i2c";
+		port = <3>;
+		bus_name = "smb";
+		reg = <0x20 0x10087000 0x00 0x1000>;
 		interrupts = <0 22 4>;
-        };
+	};
 
 	 mtc at 2010098000 {
 		compatible = "lsi,mtc";
diff --git a/arch/arm/configs/lsi_defconfig b/arch/arm/configs/lsi_defconfig
index 239c95e..13bca38 100644
--- a/arch/arm/configs/lsi_defconfig
+++ b/arch/arm/configs/lsi_defconfig
@@ -668,7 +668,8 @@ CONFIG_MTD_PHYSMAP_OF=y
 #
 # CONFIG_MTD_PMC551 is not set
 # CONFIG_MTD_DATAFLASH is not set
-# CONFIG_MTD_M25P80 is not set
+CONFIG_MTD_M25P80=y
+CONFIG_M25PXX_USE_FAST_READ=y
 # CONFIG_MTD_SST25L is not set
 # CONFIG_MTD_SLRAM is not set
 # CONFIG_MTD_PHRAM is not set
diff --git a/arch/arm/mach-axxia/axxia.c b/arch/arm/mach-axxia/axxia.c
index 28de7b6..b7db501 100644
--- a/arch/arm/mach-axxia/axxia.c
+++ b/arch/arm/mach-axxia/axxia.c
@@ -173,7 +173,6 @@ spidev_chip_select(u32 control, unsigned n)
 
 static void spi_cs_eeprom0(u32 control) { spidev_chip_select(control, 0); }
 static void spi_cs_eeprom1(u32 control) { spidev_chip_select(control, 1); }
-static void spi_cs_eeprom2(u32 control) { spidev_chip_select(control, 2); }
 
 struct pl022_config_chip spi_eeprom0 = {
 	.iface      = SSP_INTERFACE_MOTOROLA_SPI,
@@ -187,37 +186,23 @@ struct pl022_config_chip spi_eeprom1 = {
 	.cs_control = spi_cs_eeprom1
 };
 
-struct pl022_config_chip spi_eeprom2 = {
-	.iface      = SSP_INTERFACE_MOTOROLA_SPI,
-	.com_mode   = POLLING_TRANSFER,
-	.cs_control = spi_cs_eeprom2
-};
-
 static struct spi_board_info spi_devs[] __initdata = {
 	{
-		.modalias               = "spidev",
+		.modalias               = "s25fl129p1",
 		.controller_data        = &spi_eeprom0,
 		.bus_num                = 0,
 		.chip_select            = 0,
-		.max_speed_hz           = 12000000,
+		.max_speed_hz           = 25000000,
 		.mode                   = SPI_MODE_0,
 	},
 	{
-		.modalias               = "spidev",
+		.modalias               = "s25fl129p1",
 		.controller_data        = &spi_eeprom1,
 		.bus_num                = 0,
 		.chip_select            = 1,
-		.max_speed_hz           = 12000000,
-		.mode                   = SPI_MODE_0,
-	},
-	{
-		.modalias               = "spidev",
-		.controller_data        = &spi_eeprom2,
-		.bus_num                = 0,
-		.chip_select            = 2,
-		.max_speed_hz           = 12000000,
+		.max_speed_hz           = 25000000,
 		.mode                   = SPI_MODE_0,
-	},
+	}
 };
 
 void __init axxia_dt_init(void)
-- 
1.8.3.4




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