[linux-yocto] [PATCH 66/70] arm: PCIe driver DTS changes
Paul Butler
butler.paul at gmail.com
Mon Jun 10 18:46:29 PDT 2013
From: SangeethaRao <sangeetha.rao at lsi.com>
irq info is now read from DTS as well.
Signed-off-by: SangeethaRao <sangeetha.rao at lsi.com>
---
arch/arm/boot/dts/axm55xx.dts | 95 +++++++++++-----------------------------
arch/arm/boot/dts/axm55xxsim.dts | 49 +++++++++------------
arch/arm/mach-axxia/pci.c | 34 +++++++-------
3 files changed, 61 insertions(+), 117 deletions(-)
diff --git a/arch/arm/boot/dts/axm55xx.dts b/arch/arm/boot/dts/axm55xx.dts
index effb643..053ad2d 100644
--- a/arch/arm/boot/dts/axm55xx.dts
+++ b/arch/arm/boot/dts/axm55xx.dts
@@ -175,9 +175,7 @@
PCIE0: pciex at 0xf0120000 {
compatible = "lsi,plb-pciex";
device_type = "pci";
- enabled = <0>;
- plx = <0>;
- primary;
+ status = "ok";
port = <0>;
#interrupt-cells = <1>;
#size-cells = <2>;
@@ -185,7 +183,6 @@
/* config space access MPAGE7 registers*/
reg = < 0x30 0x38000000 0x0 0x01000000
0x20 0x20120000 0x0 0x00008000 >;
- bus-range = <0 0x0f>;
/* Outbound ranges */
/* < <3-cell PCI addr> <2-cell CPU (PLB) addr> <2-cell size> > *
/
@@ -194,71 +191,41 @@
0x00 0x10000000>;
/* Inbound ranges */
/* < <3-cell PCI addr> <2-cell CPU addr> <2-cell size> > */
- dma-ranges = <0x03000000 0x00000000 0xa0000000
+ dma-ranges = <0x03000000 0x00000000 0x00000000
0x00 0x00000000
- 0x00 0x10000000>;
- interrupt-parent = <&gic>;
- interrupts = <29 2>;
- interrupt-map-mask = <0000 0 0 7>;
- interrupt-map = <
- /* <3-cell dev> <irq#> <prnt> <2-cell prnt IRQ/sense> */
- 0000 0 0 1 &gic 29 2
- 0000 0 0 2 &gic 29 2
- 0000 0 0 3 &gic 29 2
- 0000 0 0 4 &gic 29 2
- >;
+ 0x00 0x40000000>;
+ interrupts = <0 68 4>,
+ <0 73 4>,
+ <0 74 4>,
+ <0 75 4>,
+ <0 76 4>,
+ <0 77 4>,
+ <0 78 4>,
+ <0 79 4>,
+ <0 80 4>,
+ <0 81 4>,
+ <0 82 4>,
+ <0 83 4>,
+ <0 84 4>,
+ <0 85 4>,
+ <0 86 4>,
+ <0 87 4>,
+ <0 88 4>;
+
};
PCIE1: pciex at 0xf0128000 {
compatible = "lsi,plb-pciex";
device_type = "pci";
- enabled = <0>;
- plx = <0>;
- primary;
+ status = "ok";
port = <1>;
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
- /* config space access MPAGE7 registers*/
- reg = <0x30 0x78000000 0x0 0x01000000
- 0x20 0x20128000 0x0 0x00008000 >;
- bus-range = <0 0x0f>;
- /* Outbound ranges */
- /* < <3-cell PCI addr> <2-cell CPU (PLB) addr> <2-cell size> > */
- ranges = <0x03000000 0x00000000 0xa0000000
- 0x30 0x40000000
- 0x00 0x10000000>;
- /* Inbound ranges */
- /* < <3-cell PCI addr> <2-cell CPU addr> <2-cell size> > */
- dma-ranges = <0x03000000 0x00000000 0xb0000000
- 0x00 0x00000000
- 0x00 0x10000000>;
- interrupt-parent = <&gic>;
- interrupts = <72 2>;
- interrupt-map-mask = <0000 0 0 7>;
- interrupt-map = <
- /* <3-cell dev> <irq#> <prnt> <2-cell prnt IRQ/sense> */
- 0000 0 0 1 &gic 72 2
- 0000 0 0 2 &gic 72 2
- 0000 0 0 3 &gic 72 2
- 0000 0 0 4 &gic 72 2
- >;
- };
- PCIE2: pciex at 0xf0130000 {
- compatible = "lsi,plb-pciex";
- device_type = "pci";
- enabled = <0>;
- plx = <0>;
- primary;
- port = <2>;
- #interrupt-cells = <1>;
- #size-cells = <2>;
- #address-cells = <3>;
/* config space access MPAGE7 registers*/
reg = <0x30 0xb8000000 0x0 0x01000000
0x20 0x20130000 0x0 0x00008000 >;
- bus-range = <0 0x0f>;
/* Outbound ranges */
/* < <3-cell PCI addr> <2-cell CPU (PLB) addr> <2-cell size> > */
ranges = <0x03000000 0x00000000 0xa0000000
@@ -266,20 +233,10 @@
0x00 0x10000000>;
/* Inbound ranges */
/* < <3-cell PCI addr> <2-cell CPU addr> <2-cell size> > */
- dma-ranges = <0x03000000 0x00000000 0xc0000000
- 0x00 0x00000000
- 0x00 0x10000000>;
-
- interrupt-parent = <&gic>;
- interrupts = <73 2>;
- interrupt-map-mask = <0000 0 0 7>;
- interrupt-map = <
- /* <3-cell dev> <irq#> <prnt> <2-cell prnt IRQ/sense> */
- 0000 0 0 1 &gic 73 2
- 0000 0 0 2 &gic 73 2
- 0000 0 0 3 &gic 73 2
- 0000 0 0 4 &gic 73 2
- >;
+ dma-ranges = <0x03000000 0x00000000 0x00000000
+ 0x00 0x00000000
+ 0x00 0x40000000>;
+ interrupts = <0 70 4>;
};
I2C0: i2c at 0x02010084000 {
diff --git a/arch/arm/boot/dts/axm55xxsim.dts b/arch/arm/boot/dts/axm55xxsim.dts
index ac1fa92..4410309 100644
--- a/arch/arm/boot/dts/axm55xxsim.dts
+++ b/arch/arm/boot/dts/axm55xxsim.dts
@@ -288,9 +288,7 @@
PCIE0: pciex at 0x3000000000 {
compatible = "lsi,plb-pciex";
device_type = "pci";
- enabled = <0>;
- plx = <0>;
- primary;
+ status = "ok";
port = <0>;
#interrupt-cells = <1>;
#size-cells = <2>;
@@ -298,7 +296,6 @@
/* config space access MPAGE7 registers*/
reg = < 0x30 0x38000000 0x0 0x01000000
0x20 0x20120000 0x0 0x00008000 >;
- bus-range = <0 0x0f>;
/* Outbound ranges */
/* < <3-cell PCI addr> <2-cell CPU (PLB) addr> <2-cell size> >*/
ranges = <0x03000000 0x00000000 0xa0000000
@@ -309,24 +306,29 @@
dma-ranges = <0x03000000 0x00000000 0x00000000
0x00 0x00000000
0x00 0x40000000>;
- interrupt-parent = <&gic>;
- interrupts = <29 2>;
- interrupt-map-mask = <0000 0 0 7>;
- interrupt-map = <
- /* <3-cell dev> <irq#> <prnt> <2-cell prnt IRQ/sense> */
- 0000 0 0 1 &gic 29 2
- 0000 0 0 2 &gic 29 2
- 0000 0 0 3 &gic 29 2
- 0000 0 0 4 &gic 29 2
- >;
+ interrupts = <0 68 4>,
+ <0 73 4>,
+ <0 74 4>,
+ <0 75 4>,
+ <0 76 4>,
+ <0 77 4>,
+ <0 78 4>,
+ <0 79 4>,
+ <0 80 4>,
+ <0 81 4>,
+ <0 82 4>,
+ <0 83 4>,
+ <0 84 4>,
+ <0 85 4>,
+ <0 86 4>,
+ <0 87 4>,
+ <0 88 4>;
};
PCIE1: pciex at 0x3080000000 {
compatible = "lsi,plb-pciex";
device_type = "pci";
- enabled = <0>;
- plx = <0>;
- primary;
+ status = "ok";
port = <1>;
#interrupt-cells = <1>;
#size-cells = <2>;
@@ -334,7 +336,6 @@
/* config space access MPAGE7 registers*/
reg = <0x30 0xb8000000 0x0 0x01000000
0x20 0x20130000 0x0 0x00008000 >;
- bus-range = <0 0x0f>;
/* Outbound ranges */
/* < <3-cell PCI addr> <2-cell CPU (PLB) addr> <2-cell size> > */
ranges = <0x03000000 0x00000000 0xa0000000
@@ -345,17 +346,7 @@
dma-ranges = <0x03000000 0x00000000 0x00000000
0x00 0x00000000
0x00 0x40000000>;
-
- interrupt-parent = <&gic>;
- interrupts = <73 2>;
- interrupt-map-mask = <0000 0 0 7>;
- interrupt-map = <
- /* <3-cell dev> <irq#> <prnt> <2-cell prnt IRQ/sense> */
- 0000 0 0 1 &gic 73 2
- 0000 0 0 2 &gic 73 2
- 0000 0 0 3 &gic 73 2
- 0000 0 0 4 &gic 73 2
- >;
+ interrupts = <0 70 4>;
};
I2C0: i2c at 0x02010084000 {
diff --git a/arch/arm/mach-axxia/pci.c b/arch/arm/mach-axxia/pci.c
index dd32a79..2b39e0d 100644
--- a/arch/arm/mach-axxia/pci.c
+++ b/arch/arm/mach-axxia/pci.c
@@ -442,7 +442,7 @@ int axxia_pcie_setup(int portno, struct pci_sys_data *sys)
u32 mpage_lower, pciah, pcial;
u64 size, bar0_size;
void __iomem *cfg_addr = NULL, *cfg_data = NULL, *tpage_base = NULL;
- int mappedIrq;
+ int mappedIrq, irq_entry;
u32 inbound_size;
port = &axxia_pciex_ports[sys->domain];
@@ -497,16 +497,9 @@ int axxia_pcie_setup(int portno, struct pci_sys_data *sys)
/* hookup an interrupt handler */
printk(KERN_INFO "PCIE%d mapping interrupt\n", port->index);
mappedIrq = irq_of_parse_and_map(port->node, 0);
-
- if (sys->domain == 0) {
- /* IRQ# 68 for PEI0 */
- mappedIrq = 100;
- } else if (sys->domain == 1) {
- /* IRQ# 70 for PEI1 */
- mappedIrq = 102;
- }
printk(KERN_INFO "Requesting irq#%d for PEI%d Legacy INTs\n",
mappedIrq, port->index);
+
err = request_irq(mappedIrq, acp_pcie_isr,
IRQF_SHARED, "acp_pcie", port);
if (err) {
@@ -518,16 +511,17 @@ int axxia_pcie_setup(int portno, struct pci_sys_data *sys)
/* MSI INTS for PEI0 */
if (sys->domain == 0) {
/* IRQ# 73-88 for PEI0 MSI INTs */
- for (mappedIrq = 73; mappedIrq <= 88; mappedIrq++) {
+ for (irq_entry = 1; irq_entry <= 16; irq_entry++) {
+ mappedIrq = irq_of_parse_and_map(port->node, irq_entry);
printk(KERN_INFO
"Requesting irq#%d for PEI0 MSI INTs\n",
- mappedIrq+32);
- err = request_irq(mappedIrq+32, acp_pcie_MSI_isr,
+ mappedIrq);
+ err = request_irq(mappedIrq, acp_pcie_MSI_isr,
IRQF_SHARED, "acp_pcie_MSI", port);
if (err) {
printk(KERN_ERR
"request_irq failed!!!! for IRQ# %d err = %d\n",
- mappedIrq+32, err);
+ mappedIrq, err);
goto fail;
}
}
@@ -735,6 +729,7 @@ static void __devinit axxia_pcie_msi_enable(struct pci_dev *dev)
}
DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, axxia_pcie_msi_enable);
+
/* Port definition struct
* Please note: PEI core#1 is not used in AXM5500 */
static struct hw_pci axxia_pcie_hw[] = {
@@ -794,16 +789,17 @@ static void axxia_probe_pciex_bridge(struct device_node *np)
int num = pna + 5;
u64 size, pci_addr;
+ /* Check if device is enabled */
+ if (!of_device_is_available(np)) {
+ printk(KERN_INFO "%s: Port disabled via device-tree\n",
+ np->full_name);
+ return;
+ }
+
/* Get the port number from the device-tree */
if (!of_property_read_u32(np, "port", &pval)) {
portno = pval;
-#if 0
- if (portno == 1) {
- /* only PCIe0 and PCIe1 are supported in AXM5500 */
- return;
- }
-#endif
printk(KERN_INFO "PCIE Port %d found\n", portno);
} else {
printk(KERN_ERR "PCIE: Can't find port number for %s\n",
--
1.8.3
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