[linux-yocto] [PATCH 19/70] arm/boot: Use supersections for the early page table in the armv7 case
Paul Butler
butler.paul at gmail.com
Mon Jun 10 18:45:42 PDT 2013
From: John Jacques <john.jacques at lsi.com>
Signed-off-by: Paul Butler <paul.butler at windriver.com>
---
arch/arm/boot/compressed/head.S | 53 +++++++++++++++++++++++++++++++++++++++++
1 file changed, 53 insertions(+)
diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S
index 87278fc..f83c98c 100644
--- a/arch/arm/boot/compressed/head.S
+++ b/arch/arm/boot/compressed/head.S
@@ -567,6 +567,58 @@ __armv3_mpu_cache_on:
mcr p15, 0, r0, c7, c0, 0 @ invalidate whole cache v3
mov pc, lr
+#if defined(CONFIG_ARCH_AXXIA)
+__setup_mmu:
+ sub r3, r4, #16384 @ Page directory size
+ bic r3, r3, #0xff @ Align the pointer
+ bic r3, r3, #0x3f00
+
+ /*
+ * Clear the level 1 page table.
+ */
+
+ mov r0, #0
+ mov r1, r3
+ add r2, r3, #0x4000
+1: str r0, [r1], #4
+ cmp r1, r2
+ blt 1b
+
+ /*
+ * First 1G is RAM, cacheable and bufferable.
+ */
+
+ ldr r0, =0x40c1e
+ mov r1, r3
+ add r2, r3, #0x1000
+1: mov r9, #0
+2: str r0, [r1], #4 @ Each supersection is repeated
+ add r9, r9, #1 @ 16 times.
+ cmp r9, #16
+ blt 2b
+ add r0, r0, #0x1000000 @ 16M
+ cmp r1, r2
+ blt 1b
+
+ /*
+ * Third 1G is IO, not cacheable or bufferable.
+ */
+
+ ldr r0,=0x10040c52 @ Start at 0x20_1000_0000
+ add r1, r3, #0x2000
+ add r2, r3, #0x3000
+1: mov r9, #0
+2: str r0, [r1], #4 @ Each supersection is repeated
+ add r9, r9, #1 @ 16 times.
+ cmp r9, #16
+ blt 2b
+ add r0, r0, #0x1000000 @ 16M
+ cmp r1, r2
+ blt 1b
+
+ mov pc, lr
+ENDPROC(__setup_mmu)
+#else
__setup_mmu: sub r3, r4, #16384 @ Page directory size
bic r3, r3, #0xff @ Align the pointer
bic r3, r3, #0x3f00
@@ -610,6 +662,7 @@ __setup_mmu: sub r3, r4, #16384 @ Page directory size
str r1, [r0]
mov pc, lr
ENDPROC(__setup_mmu)
+#endif
__arm926ejs_mmu_cache_on:
#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH
--
1.8.3
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